driver-icarus.c.bak 69 KB

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  1. /*
  2. * Copyright 2012-2013 Andrew Smith
  3. * Copyright 2012 Xiangfu <xiangfu@openmobilefree.com>
  4. * Copyright 2013-2015 Con Kolivas <kernel@kolivas.org>
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms of the GNU General Public License as published by the Free
  8. * Software Foundation; either version 3 of the License, or (at your option)
  9. * any later version. See COPYING for more details.
  10. */
  11. /*
  12. * Those code should be works fine with V2 and V3 bitstream of Icarus.
  13. * Operation:
  14. * No detection implement.
  15. * Input: 64B = 32B midstate + 20B fill bytes + last 12 bytes of block head.
  16. * Return: send back 32bits immediately when Icarus found a valid nonce.
  17. * no query protocol implemented here, if no data send back in ~11.3
  18. * seconds (full cover time on 32bit nonce range by 380MH/s speed)
  19. * just send another work.
  20. * Notice:
  21. * 1. Icarus will start calculate when you push a work to them, even they
  22. * are busy.
  23. * 2. The 2 FPGAs on Icarus will distribute the job, one will calculate the
  24. * 0 ~ 7FFFFFFF, another one will cover the 80000000 ~ FFFFFFFF.
  25. * 3. It's possible for 2 FPGAs both find valid nonce in the meantime, the 2
  26. * valid nonce will all be send back.
  27. * 4. Icarus will stop work when: a valid nonce has been found or 32 bits
  28. * nonce range is completely calculated.
  29. */
  30. #include <float.h>
  31. #include <limits.h>
  32. #include <pthread.h>
  33. #include <stdint.h>
  34. #include <stdio.h>
  35. #include <strings.h>
  36. #include <sys/time.h>
  37. #include <unistd.h>
  38. #include <math.h>
  39. #include "config.h"
  40. #ifdef WIN32
  41. #include <windows.h>
  42. #endif
  43. #include "compat.h"
  44. #include "miner.h"
  45. #include "usbutils.h"
  46. // The serial I/O speed - Linux uses a define 'B115200' in bits/termios.h
  47. #define ICARUS_IO_SPEED 115200
  48. #define ICARUS_BUF_SIZE 8
  49. // The size of a successful nonce read
  50. #define ANT_READ_SIZE 5
  51. #define ICARUS_READ_SIZE 4
  52. #define ROCK_READ_SIZE 8
  53. // Ensure the sizes are correct for the Serial read
  54. #if (ICARUS_READ_SIZE != 4)
  55. #error ICARUS_READ_SIZE must be 4
  56. #endif
  57. #define ASSERT1(condition) __maybe_unused static char sizeof_uint32_t_must_be_4[(condition)?1:-1]
  58. ASSERT1(sizeof(uint32_t) == 4);
  59. // TODO: USB? Different calculation? - see usbstats to work it out e.g. 1/2 of normal send time
  60. // or even use that number? 1/2
  61. // #define ICARUS_READ_TIME(baud) ((double)ICARUS_READ_SIZE * (double)8.0 / (double)(baud))
  62. // maybe 1ms?
  63. #define ICARUS_READ_TIME(baud) (0.001)
  64. // USB ms timeout to wait - user specified timeouts are multiples of this
  65. #define ICA_WAIT_TIMEOUT 100
  66. #define ANT_WAIT_TIMEOUT 10
  67. #define AU3_WAIT_TIMEOUT 1
  68. #define ICARUS_WAIT_TIMEOUT (info->u3 ? AU3_WAIT_TIMEOUT : (info->ant ? ANT_WAIT_TIMEOUT : ICA_WAIT_TIMEOUT))
  69. #define ICARUS_CMR2_TIMEOUT 1
  70. // Defined in multiples of ICARUS_WAIT_TIMEOUT
  71. // Must of course be greater than ICARUS_READ_COUNT_TIMING/ICARUS_WAIT_TIMEOUT
  72. // There's no need to have this bigger, since the overhead/latency of extra work
  73. // is pretty small once you get beyond a 10s nonce range time and 10s also
  74. // means that nothing slower than 429MH/s can go idle so most icarus devices
  75. // will always mine without idling
  76. #define ICARUS_READ_TIME_LIMIT_MAX 100
  77. // In timing mode: Default starting value until an estimate can be obtained
  78. // 5000 ms allows for up to a ~840MH/s device
  79. #define ICARUS_READ_COUNT_TIMING 5000
  80. // Antminer USB is > 1GH/s so use a shorter limit
  81. // 1000 ms allows for up to ~4GH/s device
  82. #define ANTUSB_READ_COUNT_TIMING 1000
  83. #define ANTU3_READ_COUNT_TIMING 100
  84. #define ICARUS_READ_COUNT_MIN ICARUS_WAIT_TIMEOUT
  85. #define SECTOMS(s) ((int)((s) * 1000))
  86. // How many ms below the expected completion time to abort work
  87. // extra in case the last read is delayed
  88. #define ICARUS_READ_REDUCE ((int)(ICARUS_WAIT_TIMEOUT * 1.5))
  89. // For a standard Icarus REV3 (to 5 places)
  90. // Since this rounds up a the last digit - it is a slight overestimate
  91. // Thus the hash rate will be a VERY slight underestimate
  92. // (by a lot less than the displayed accuracy)
  93. // Minor inaccuracy of these numbers doesn't affect the work done,
  94. // only the displayed MH/s
  95. #define ICARUS_REV3_HASH_TIME 0.0000000026316
  96. #define LANCELOT_HASH_TIME 0.0000000025000
  97. #define ASICMINERUSB_HASH_TIME 0.0000000029761
  98. // TODO: What is it?
  99. #define CAIRNSMORE1_HASH_TIME 0.0000000027000
  100. // Per FPGA
  101. #define CAIRNSMORE2_HASH_TIME 0.0000000066600
  102. #define NANOSEC 1000000000.0
  103. #define ANTMINERUSB_HASH_MHZ 0.000000125
  104. #define ANTMINERUSB_HASH_TIME (ANTMINERUSB_HASH_MHZ / (double)(opt_anu_freq))
  105. #define ANTU3_HASH_MHZ 0.0000000032
  106. #define ANTU3_HASH_TIME (ANTU3_HASH_MHZ / (double)(opt_au3_freq))
  107. #define CAIRNSMORE2_INTS 4
  108. // Icarus Rev3 doesn't send a completion message when it finishes
  109. // the full nonce range, so to avoid being idle we must abort the
  110. // work (by starting a new work item) shortly before it finishes
  111. //
  112. // Thus we need to estimate 2 things:
  113. // 1) How many hashes were done if the work was aborted
  114. // 2) How high can the timeout be before the Icarus is idle,
  115. // to minimise the number of work items started
  116. // We set 2) to 'the calculated estimate' - ICARUS_READ_REDUCE
  117. // to ensure the estimate ends before idle
  118. //
  119. // The simple calculation used is:
  120. // Tn = Total time in seconds to calculate n hashes
  121. // Hs = seconds per hash
  122. // Xn = number of hashes
  123. // W = code/usb overhead per work
  124. //
  125. // Rough but reasonable estimate:
  126. // Tn = Hs * Xn + W (of the form y = mx + b)
  127. //
  128. // Thus:
  129. // Line of best fit (using least squares)
  130. //
  131. // Hs = (n*Sum(XiTi)-Sum(Xi)*Sum(Ti))/(n*Sum(Xi^2)-Sum(Xi)^2)
  132. // W = Sum(Ti)/n - (Hs*Sum(Xi))/n
  133. //
  134. // N.B. W is less when aborting work since we aren't waiting for the reply
  135. // to be transferred back (ICARUS_READ_TIME)
  136. // Calculating the hashes aborted at n seconds is thus just n/Hs
  137. // (though this is still a slight overestimate due to code delays)
  138. //
  139. // Both below must be exceeded to complete a set of data
  140. // Minimum how long after the first, the last data point must be
  141. #define HISTORY_SEC 60
  142. // Minimum how many points a single ICARUS_HISTORY should have
  143. #define MIN_DATA_COUNT 5
  144. // The value MIN_DATA_COUNT used is doubled each history until it exceeds:
  145. #define MAX_MIN_DATA_COUNT 100
  146. static struct timeval history_sec = { HISTORY_SEC, 0 };
  147. // Store the last INFO_HISTORY data sets
  148. // [0] = current data, not yet ready to be included as an estimate
  149. // Each new data set throws the last old set off the end thus
  150. // keeping a ongoing average of recent data
  151. #define INFO_HISTORY 10
  152. struct ICARUS_HISTORY {
  153. struct timeval finish;
  154. double sumXiTi;
  155. double sumXi;
  156. double sumTi;
  157. double sumXi2;
  158. uint32_t values;
  159. uint32_t hash_count_min;
  160. uint32_t hash_count_max;
  161. };
  162. enum timing_mode { MODE_DEFAULT, MODE_SHORT, MODE_LONG, MODE_VALUE };
  163. static const char *MODE_DEFAULT_STR = "default";
  164. static const char *MODE_SHORT_STR = "short";
  165. static const char *MODE_SHORT_STREQ = "short=";
  166. static const char *MODE_LONG_STR = "long";
  167. static const char *MODE_LONG_STREQ = "long=";
  168. static const char *MODE_VALUE_STR = "value";
  169. static const char *MODE_UNKNOWN_STR = "unknown";
  170. #define MAX_DEVICE_NUM 100
  171. #define MAX_WORK_BUFFER_SIZE 2
  172. #define MAX_CHIP_NUM 24
  173. // Set it to 3, 5 or 9
  174. #define NONCE_CORRECTION_TIMES 5
  175. #define MAX_TRIES 4
  176. #define RM_CMD_MASK 0x0F
  177. #define RM_STATUS_MASK 0xF0
  178. #define RM_CHIP_MASK 0x3F
  179. #define RM_PRODUCT_MASK 0xC0
  180. #define RM_PRODUCT_RBOX 0x00
  181. #define RM_PRODUCT_T1 0x40
  182. #define RM_PRODUCT_T2 0x80
  183. #define RM_PRODUCT_TEST 0xC0
  184. #if (NONCE_CORRECTION_TIMES == 5)
  185. static int32_t rbox_corr_values[] = {0, 1, -1, -2, -4};
  186. #endif
  187. #if (NONCE_CORRECTION_TIMES == 9)
  188. static int32_t rbox_corr_values[] = {0, 1, -1, 2, -2, 3, -3, 4, -4};
  189. #endif
  190. #if (NONCE_CORRECTION_TIMES == 3)
  191. static int32_t rbox_corr_values[] = {0, 1, -1};
  192. #endif
  193. #define ANT_QUEUE_NUM 36
  194. typedef enum {
  195. NONCE_DATA1_OFFSET = 0,
  196. NONCE_DATA2_OFFSET,
  197. NONCE_DATA3_OFFSET,
  198. NONCE_DATA4_OFFSET,
  199. NONCE_TASK_CMD_OFFSET,
  200. NONCE_CHIP_NO_OFFSET,
  201. NONCE_TASK_NO_OFFSET,
  202. NONCE_COMMAND_OFFSET,
  203. NONCE_MAX_OFFSET
  204. } NONCE_OFFSET;
  205. typedef enum {
  206. NONCE_DATA_CMD = 0,
  207. NONCE_TASK_COMPLETE_CMD,
  208. NONCE_GET_TASK_CMD,
  209. } NONCE_COMMAND;
  210. typedef struct nonce_data {
  211. int chip_no;
  212. unsigned int task_no ;
  213. unsigned char work_state;
  214. int cmd_value;
  215. } NONCE_DATA;
  216. typedef enum {
  217. ROCKMINER_RBOX = 0,
  218. ROCKMINER_T1,
  219. ROCKMINER_T2,
  220. ROCKMINER_MAX
  221. } ROCKMINER_PRODUCT_T;
  222. typedef struct rockminer_chip_info {
  223. unsigned char freq;
  224. int error_cnt;
  225. time_t last_received_task_complete_time;
  226. } ROCKMINER_CHIP_INFO;
  227. typedef struct rockminer_device_info {
  228. unsigned char detect_chip_no;
  229. unsigned char chip_max;
  230. unsigned char product_id;
  231. float min_frq;
  232. float def_frq;
  233. float max_frq;
  234. ROCKMINER_CHIP_INFO chip[MAX_CHIP_NUM];
  235. time_t dev_detect_time;
  236. } ROCKMINER_DEVICE_INFO;
  237. struct ICARUS_INFO {
  238. enum sub_ident ident;
  239. int intinfo;
  240. // time to calculate the golden_ob
  241. uint64_t golden_hashes;
  242. struct timeval golden_tv;
  243. struct ICARUS_HISTORY history[INFO_HISTORY+1];
  244. uint32_t min_data_count;
  245. int timeout;
  246. // seconds per Hash
  247. double Hs;
  248. // ms til we abort
  249. int read_time;
  250. // ms limit for (short=/long=) read_time
  251. int read_time_limit;
  252. // How long without hashes is considered a failed device
  253. int fail_time;
  254. enum timing_mode timing_mode;
  255. bool do_icarus_timing;
  256. double fullnonce;
  257. int count;
  258. double W;
  259. uint32_t values;
  260. uint64_t hash_count_range;
  261. // Determine the cost of history processing
  262. // (which will only affect W)
  263. uint64_t history_count;
  264. struct timeval history_time;
  265. // icarus-options
  266. int baud;
  267. int work_division;
  268. int fpga_count;
  269. uint32_t nonce_mask;
  270. uint8_t cmr2_speed;
  271. bool speed_next_work;
  272. bool flash_next_work;
  273. int nonce_size;
  274. bool failing;
  275. pthread_mutex_t lock;
  276. ROCKMINER_DEVICE_INFO rmdev;
  277. struct work *base_work; // For when we roll work
  278. struct work *g_work[MAX_CHIP_NUM][MAX_WORK_BUFFER_SIZE];
  279. uint32_t last_nonce[MAX_CHIP_NUM][MAX_WORK_BUFFER_SIZE];
  280. char rock_init[64];
  281. uint64_t nonces_checked;
  282. uint64_t nonces_correction_times;
  283. uint64_t nonces_correction_tests;
  284. uint64_t nonces_fail;
  285. uint64_t nonces_correction[NONCE_CORRECTION_TIMES];
  286. struct work **antworks;
  287. int nonces;
  288. int workid;
  289. bool ant;
  290. bool u3;
  291. };
  292. #define ICARUS_MIDSTATE_SIZE 32
  293. #define ICARUS_UNUSED_SIZE 16
  294. #define ICARUS_WORK_SIZE 12
  295. #define ICARUS_WORK_DATA_OFFSET 64
  296. #define ICARUS_CMR2_SPEED_FACTOR 2.5
  297. #define ICARUS_CMR2_SPEED_MIN_INT 100
  298. #define ICARUS_CMR2_SPEED_DEF_INT 180
  299. #define ICARUS_CMR2_SPEED_MAX_INT 220
  300. #define CMR2_INT_TO_SPEED(_speed) ((uint8_t)((float)_speed / ICARUS_CMR2_SPEED_FACTOR))
  301. #define ICARUS_CMR2_SPEED_MIN CMR2_INT_TO_SPEED(ICARUS_CMR2_SPEED_MIN_INT)
  302. #define ICARUS_CMR2_SPEED_DEF CMR2_INT_TO_SPEED(ICARUS_CMR2_SPEED_DEF_INT)
  303. #define ICARUS_CMR2_SPEED_MAX CMR2_INT_TO_SPEED(ICARUS_CMR2_SPEED_MAX_INT)
  304. #define ICARUS_CMR2_SPEED_INC 1
  305. #define ICARUS_CMR2_SPEED_DEC -1
  306. #define ICARUS_CMR2_SPEED_FAIL -10
  307. #define ICARUS_CMR2_PREFIX ((uint8_t)0xB7)
  308. #define ICARUS_CMR2_CMD_SPEED ((uint8_t)0)
  309. #define ICARUS_CMR2_CMD_FLASH ((uint8_t)1)
  310. #define ICARUS_CMR2_DATA_FLASH_OFF ((uint8_t)0)
  311. #define ICARUS_CMR2_DATA_FLASH_ON ((uint8_t)1)
  312. #define ICARUS_CMR2_CHECK ((uint8_t)0x6D)
  313. #define ANT_UNUSED_SIZE 15
  314. struct ICARUS_WORK {
  315. uint8_t midstate[ICARUS_MIDSTATE_SIZE];
  316. // These 4 bytes are for CMR2 bitstreams that handle MHz adjustment
  317. uint8_t check;
  318. uint8_t data;
  319. uint8_t cmd;
  320. uint8_t prefix;
  321. uint8_t unused[ANT_UNUSED_SIZE];
  322. uint8_t id; // Used only by ANT, otherwise unused by other icarus
  323. uint8_t work[ICARUS_WORK_SIZE];
  324. };
  325. #define ANT_U1_DEFFREQ 200
  326. #define ANT_U3_DEFFREQ 225
  327. #define ANT_U3_MAXFREQ 250
  328. struct {
  329. float freq;
  330. uint16_t hex;
  331. } u3freqtable[] = {
  332. { 100, 0x0783 },
  333. { 125, 0x0983 },
  334. { 150, 0x0b83 },
  335. { 175, 0x0d83 },
  336. { 193.75, 0x0f03 },
  337. { 196.88, 0x1f07 },
  338. { 200, 0x0782 },
  339. { 206.25, 0x1006 },
  340. { 212.5, 0x1086 },
  341. { 218.75, 0x1106 },
  342. { 225, 0x0882 },
  343. { 237.5, 0x1286 },
  344. { 243.75, 0x1306 },
  345. { 250, 0x0982 },
  346. };
  347. #define END_CONDITION 0x0000ffff
  348. // Looking for options in --icarus-timing and --icarus-options:
  349. //
  350. // Code increments this each time we start to look at a device
  351. // However, this means that if other devices are checked by
  352. // the Icarus code (e.g. Avalon only as at 20130517)
  353. // they will count in the option offset
  354. //
  355. // This, however, is deterministic so that's OK
  356. //
  357. // If we were to increment after successfully finding an Icarus
  358. // that would be random since an Icarus may fail and thus we'd
  359. // not be able to predict the option order
  360. //
  361. // Devices are checked in the order libusb finds them which is ?
  362. //
  363. static int option_offset = -1;
  364. /*
  365. #define ICA_BUFSIZ (0x200)
  366. static void transfer_read(struct cgpu_info *icarus, uint8_t request_type, uint8_t bRequest, uint16_t wValue, uint16_t wIndex, char *buf, int bufsiz, int *amount, enum usb_cmds cmd)
  367. {
  368. int err;
  369. err = usb_transfer_read(icarus, request_type, bRequest, wValue, wIndex, buf, bufsiz, amount, cmd);
  370. applog(LOG_DEBUG, "%s: cgid %d %s got err %d",
  371. icarus->drv->name, icarus->cgminer_id,
  372. usb_cmdname(cmd), err);
  373. }
  374. */
  375. static void _transfer(struct cgpu_info *icarus, uint8_t request_type, uint8_t bRequest, uint16_t wValue, uint16_t wIndex, uint32_t *data, int siz, enum usb_cmds cmd)
  376. {
  377. int err;
  378. err = usb_transfer_data(icarus, request_type, bRequest, wValue, wIndex, data, siz, cmd);
  379. applog(LOG_DEBUG, "%s: cgid %d %s got err %d",
  380. icarus->drv->name, icarus->cgminer_id,
  381. usb_cmdname(cmd), err);
  382. }
  383. #define transfer(icarus, request_type, bRequest, wValue, wIndex, cmd) \
  384. _transfer(icarus, request_type, bRequest, wValue, wIndex, NULL, 0, cmd)
  385. static void icarus_initialise(struct cgpu_info *icarus, int baud)
  386. {
  387. struct ICARUS_INFO *info = (struct ICARUS_INFO *)(icarus->device_data);
  388. uint16_t wValue, wIndex;
  389. enum sub_ident ident;
  390. int interface;
  391. if (icarus->usbinfo.nodev)
  392. return;
  393. interface = _usb_interface(icarus, info->intinfo);
  394. ident = usb_ident(icarus);
  395. switch (ident) {
  396. case IDENT_BLT:
  397. case IDENT_LLT:
  398. case IDENT_CMR1:
  399. case IDENT_CMR2:
  400. // Reset
  401. transfer(icarus, FTDI_TYPE_OUT, FTDI_REQUEST_RESET, FTDI_VALUE_RESET,
  402. interface, C_RESET);
  403. if (icarus->usbinfo.nodev)
  404. return;
  405. // Latency
  406. _usb_ftdi_set_latency(icarus, info->intinfo);
  407. if (icarus->usbinfo.nodev)
  408. return;
  409. // Set data control
  410. transfer(icarus, FTDI_TYPE_OUT, FTDI_REQUEST_DATA, FTDI_VALUE_DATA_BLT,
  411. interface, C_SETDATA);
  412. if (icarus->usbinfo.nodev)
  413. return;
  414. // default to BLT/LLT 115200
  415. wValue = FTDI_VALUE_BAUD_BLT;
  416. wIndex = FTDI_INDEX_BAUD_BLT;
  417. if (ident == IDENT_CMR1 || ident == IDENT_CMR2) {
  418. switch (baud) {
  419. case 115200:
  420. wValue = FTDI_VALUE_BAUD_CMR_115;
  421. wIndex = FTDI_INDEX_BAUD_CMR_115;
  422. break;
  423. case 57600:
  424. wValue = FTDI_VALUE_BAUD_CMR_57;
  425. wIndex = FTDI_INDEX_BAUD_CMR_57;
  426. break;
  427. default:
  428. quit(1, "icarus_intialise() invalid baud (%d) for Cairnsmore1", baud);
  429. break;
  430. }
  431. }
  432. // Set the baud
  433. transfer(icarus, FTDI_TYPE_OUT, FTDI_REQUEST_BAUD, wValue,
  434. (wIndex & 0xff00) | interface, C_SETBAUD);
  435. if (icarus->usbinfo.nodev)
  436. return;
  437. // Set Modem Control
  438. transfer(icarus, FTDI_TYPE_OUT, FTDI_REQUEST_MODEM, FTDI_VALUE_MODEM,
  439. interface, C_SETMODEM);
  440. if (icarus->usbinfo.nodev)
  441. return;
  442. // Set Flow Control
  443. transfer(icarus, FTDI_TYPE_OUT, FTDI_REQUEST_FLOW, FTDI_VALUE_FLOW,
  444. interface, C_SETFLOW);
  445. if (icarus->usbinfo.nodev)
  446. return;
  447. // Clear any sent data
  448. transfer(icarus, FTDI_TYPE_OUT, FTDI_REQUEST_RESET, FTDI_VALUE_PURGE_TX,
  449. interface, C_PURGETX);
  450. if (icarus->usbinfo.nodev)
  451. return;
  452. // Clear any received data
  453. transfer(icarus, FTDI_TYPE_OUT, FTDI_REQUEST_RESET, FTDI_VALUE_PURGE_RX,
  454. interface, C_PURGERX);
  455. break;
  456. case IDENT_ICA:
  457. // Set Data Control
  458. transfer(icarus, PL2303_CTRL_OUT, PL2303_REQUEST_CTRL, PL2303_VALUE_CTRL,
  459. interface, C_SETDATA);
  460. if (icarus->usbinfo.nodev)
  461. return;
  462. // Set Line Control
  463. uint32_t ica_data[2] = { PL2303_VALUE_LINE0, PL2303_VALUE_LINE1 };
  464. _transfer(icarus, PL2303_CTRL_OUT, PL2303_REQUEST_LINE, PL2303_VALUE_LINE,
  465. interface, &ica_data[0], PL2303_VALUE_LINE_SIZE, C_SETLINE);
  466. if (icarus->usbinfo.nodev)
  467. return;
  468. // Vendor
  469. transfer(icarus, PL2303_VENDOR_OUT, PL2303_REQUEST_VENDOR, PL2303_VALUE_VENDOR,
  470. interface, C_VENDOR);
  471. break;
  472. case IDENT_AMU:
  473. case IDENT_ANU:
  474. case IDENT_AU3:
  475. case IDENT_LIN:
  476. // Enable the UART
  477. transfer(icarus, CP210X_TYPE_OUT, CP210X_REQUEST_IFC_ENABLE,
  478. CP210X_VALUE_UART_ENABLE,
  479. interface, C_ENABLE_UART);
  480. if (icarus->usbinfo.nodev)
  481. return;
  482. // Set data control
  483. transfer(icarus, CP210X_TYPE_OUT, CP210X_REQUEST_DATA, CP210X_VALUE_DATA,
  484. interface, C_SETDATA);
  485. if (icarus->usbinfo.nodev)
  486. return;
  487. // Set the baud
  488. uint32_t data = CP210X_DATA_BAUD;
  489. _transfer(icarus, CP210X_TYPE_OUT, CP210X_REQUEST_BAUD, 0,
  490. interface, &data, sizeof(data), C_SETBAUD);
  491. break;
  492. case IDENT_AVA:
  493. break;
  494. default:
  495. quit(1, "icarus_intialise() called with invalid %s cgid %i ident=%d",
  496. icarus->drv->name, icarus->cgminer_id, ident);
  497. }
  498. }
  499. static void rev(unsigned char *s, size_t l)
  500. {
  501. size_t i, j;
  502. unsigned char t;
  503. for (i = 0, j = l - 1; i < j; i++, j--) {
  504. t = s[i];
  505. s[i] = s[j];
  506. s[j] = t;
  507. }
  508. }
  509. #define ICA_NONCE_ERROR -1
  510. #define ICA_NONCE_OK 0
  511. #define ICA_NONCE_RESTART 1
  512. #define ICA_NONCE_TIMEOUT 2
  513. static int icarus_get_nonce(struct cgpu_info *icarus, unsigned char *buf, struct timeval *tv_start,
  514. struct timeval *tv_finish, struct thr_info *thr, int read_time)
  515. {
  516. struct ICARUS_INFO *info = (struct ICARUS_INFO *)(icarus->device_data);
  517. int err, amt, rc;
  518. if (icarus->usbinfo.nodev)
  519. return ICA_NONCE_ERROR;
  520. cgtime(tv_start);
  521. err = usb_read_ii_timeout_cancellable(icarus, info->intinfo, (char *)buf,
  522. info->nonce_size, &amt, read_time,
  523. C_GETRESULTS);
  524. cgtime(tv_finish);
  525. if (err < 0 && err != LIBUSB_ERROR_TIMEOUT) {
  526. applog(LOG_ERR, "%s %i: Comms error (rerr=%d amt=%d)", icarus->drv->name,
  527. icarus->device_id, err, amt);
  528. dev_error(icarus, REASON_DEV_COMMS_ERROR);
  529. return ICA_NONCE_ERROR;
  530. }
  531. if (amt >= info->nonce_size)
  532. return ICA_NONCE_OK;
  533. rc = SECTOMS(tdiff(tv_finish, tv_start));
  534. if (thr && thr->work_restart) {
  535. applog(LOG_DEBUG, "Icarus Read: Work restart at %d ms", rc);
  536. return ICA_NONCE_RESTART;
  537. }
  538. if (amt > 0)
  539. applog(LOG_DEBUG, "Icarus Read: Timeout reading for %d ms", rc);
  540. else
  541. applog(LOG_DEBUG, "Icarus Read: No data for %d ms", rc);
  542. return ICA_NONCE_TIMEOUT;
  543. }
  544. static const char *timing_mode_str(enum timing_mode timing_mode)
  545. {
  546. switch(timing_mode) {
  547. case MODE_DEFAULT:
  548. return MODE_DEFAULT_STR;
  549. case MODE_SHORT:
  550. return MODE_SHORT_STR;
  551. case MODE_LONG:
  552. return MODE_LONG_STR;
  553. case MODE_VALUE:
  554. return MODE_VALUE_STR;
  555. default:
  556. return MODE_UNKNOWN_STR;
  557. }
  558. }
  559. static void set_timing_mode(int this_option_offset, struct cgpu_info *icarus)
  560. {
  561. struct ICARUS_INFO *info = (struct ICARUS_INFO *)(icarus->device_data);
  562. int read_count_timing = 0;
  563. enum sub_ident ident;
  564. double Hs, fail_time;
  565. char buf[BUFSIZ+1];
  566. char *ptr, *comma, *eq;
  567. size_t max;
  568. int i;
  569. if (opt_icarus_timing == NULL)
  570. buf[0] = '\0';
  571. else {
  572. ptr = opt_icarus_timing;
  573. for (i = 0; i < this_option_offset; i++) {
  574. comma = strchr(ptr, ',');
  575. if (comma == NULL)
  576. break;
  577. ptr = comma + 1;
  578. }
  579. comma = strchr(ptr, ',');
  580. if (comma == NULL)
  581. max = strlen(ptr);
  582. else
  583. max = comma - ptr;
  584. if (max > BUFSIZ)
  585. max = BUFSIZ;
  586. strncpy(buf, ptr, max);
  587. buf[max] = '\0';
  588. }
  589. ident = usb_ident(icarus);
  590. switch (ident) {
  591. case IDENT_ICA:
  592. case IDENT_AVA:
  593. info->Hs = ICARUS_REV3_HASH_TIME;
  594. read_count_timing = ICARUS_READ_COUNT_TIMING;
  595. break;
  596. case IDENT_BLT:
  597. case IDENT_LLT:
  598. info->Hs = LANCELOT_HASH_TIME;
  599. read_count_timing = ICARUS_READ_COUNT_TIMING;
  600. break;
  601. case IDENT_AMU:
  602. info->Hs = ASICMINERUSB_HASH_TIME;
  603. read_count_timing = ICARUS_READ_COUNT_TIMING;
  604. break;
  605. case IDENT_CMR1:
  606. info->Hs = CAIRNSMORE1_HASH_TIME;
  607. read_count_timing = ICARUS_READ_COUNT_TIMING;
  608. break;
  609. case IDENT_CMR2:
  610. info->Hs = CAIRNSMORE2_HASH_TIME;
  611. read_count_timing = ICARUS_READ_COUNT_TIMING;
  612. break;
  613. case IDENT_ANU:
  614. info->Hs = ANTMINERUSB_HASH_TIME;
  615. read_count_timing = ANTUSB_READ_COUNT_TIMING;
  616. break;
  617. case IDENT_AU3:
  618. info->Hs = ANTU3_HASH_TIME;
  619. read_count_timing = ANTU3_READ_COUNT_TIMING;
  620. break;
  621. default:
  622. quit(1, "Icarus get_options() called with invalid %s ident=%d",
  623. icarus->drv->name, ident);
  624. }
  625. info->read_time = 0;
  626. info->read_time_limit = 0; // 0 = no limit
  627. if (strcasecmp(buf, MODE_SHORT_STR) == 0) {
  628. // short
  629. info->read_time = read_count_timing;
  630. info->timing_mode = MODE_SHORT;
  631. info->do_icarus_timing = true;
  632. } else if (strncasecmp(buf, MODE_SHORT_STREQ, strlen(MODE_SHORT_STREQ)) == 0) {
  633. // short=limit
  634. info->read_time = read_count_timing;
  635. info->timing_mode = MODE_SHORT;
  636. info->do_icarus_timing = true;
  637. info->read_time_limit = atoi(&buf[strlen(MODE_SHORT_STREQ)]);
  638. if (info->read_time_limit < 0)
  639. info->read_time_limit = 0;
  640. if (info->read_time_limit > ICARUS_READ_TIME_LIMIT_MAX)
  641. info->read_time_limit = ICARUS_READ_TIME_LIMIT_MAX;
  642. } else if (strcasecmp(buf, MODE_LONG_STR) == 0) {
  643. // long
  644. info->read_time = read_count_timing;
  645. info->timing_mode = MODE_LONG;
  646. info->do_icarus_timing = true;
  647. } else if (strncasecmp(buf, MODE_LONG_STREQ, strlen(MODE_LONG_STREQ)) == 0) {
  648. // long=limit
  649. info->read_time = read_count_timing;
  650. info->timing_mode = MODE_LONG;
  651. info->do_icarus_timing = true;
  652. info->read_time_limit = atoi(&buf[strlen(MODE_LONG_STREQ)]);
  653. if (info->read_time_limit < 0)
  654. info->read_time_limit = 0;
  655. if (info->read_time_limit > ICARUS_READ_TIME_LIMIT_MAX)
  656. info->read_time_limit = ICARUS_READ_TIME_LIMIT_MAX;
  657. } else if ((Hs = atof(buf)) != 0) {
  658. // ns[=read_time]
  659. info->Hs = Hs / NANOSEC;
  660. info->fullnonce = info->Hs * (((double)0xffffffff) + 1);
  661. if ((eq = strchr(buf, '=')) != NULL)
  662. info->read_time = atoi(eq+1) * ICARUS_WAIT_TIMEOUT;
  663. if (info->read_time < ICARUS_READ_COUNT_MIN)
  664. info->read_time = SECTOMS(info->fullnonce) - ICARUS_READ_REDUCE;
  665. if (unlikely(info->read_time < ICARUS_READ_COUNT_MIN))
  666. info->read_time = ICARUS_READ_COUNT_MIN;
  667. info->timing_mode = MODE_VALUE;
  668. info->do_icarus_timing = false;
  669. } else {
  670. // Anything else in buf just uses DEFAULT mode
  671. info->fullnonce = info->Hs * (((double)0xffffffff) + 1);
  672. if ((eq = strchr(buf, '=')) != NULL)
  673. info->read_time = atoi(eq+1) * ICARUS_WAIT_TIMEOUT;
  674. if (info->read_time < ICARUS_READ_COUNT_MIN)
  675. info->read_time = SECTOMS(info->fullnonce) - ICARUS_READ_REDUCE;
  676. if (unlikely(info->read_time < ICARUS_READ_COUNT_MIN))
  677. info->read_time = ICARUS_READ_COUNT_MIN;
  678. info->timing_mode = MODE_DEFAULT;
  679. info->do_icarus_timing = false;
  680. }
  681. info->min_data_count = MIN_DATA_COUNT;
  682. // All values are in multiples of ICARUS_WAIT_TIMEOUT
  683. info->read_time_limit *= ICARUS_WAIT_TIMEOUT;
  684. applog(LOG_DEBUG, "%s: cgid %d Init: mode=%s read_time=%dms limit=%dms Hs=%e",
  685. icarus->drv->name, icarus->cgminer_id,
  686. timing_mode_str(info->timing_mode),
  687. info->read_time, info->read_time_limit, info->Hs);
  688. /* Set the time to detect a dead device to 30 full nonce ranges. */
  689. fail_time = info->Hs * 0xffffffffull * 30.0;
  690. /* Integer accuracy is definitely enough. */
  691. info->fail_time = fail_time + 1;
  692. }
  693. static uint32_t mask(int work_division)
  694. {
  695. uint32_t nonce_mask = 0x7fffffff;
  696. // yes we can calculate these, but this way it's easy to see what they are
  697. switch (work_division) {
  698. case 1:
  699. nonce_mask = 0xffffffff;
  700. break;
  701. case 2:
  702. nonce_mask = 0x7fffffff;
  703. break;
  704. case 4:
  705. nonce_mask = 0x3fffffff;
  706. break;
  707. case 8:
  708. nonce_mask = 0x1fffffff;
  709. break;
  710. default:
  711. quit(1, "Invalid2 icarus-options for work_division (%d) must be 1, 2, 4 or 8", work_division);
  712. }
  713. return nonce_mask;
  714. }
  715. static void get_options(int this_option_offset, struct cgpu_info *icarus, int *baud, int *work_division, int *fpga_count)
  716. {
  717. char buf[BUFSIZ+1];
  718. char *ptr, *comma, *colon, *colon2;
  719. enum sub_ident ident;
  720. size_t max;
  721. int i, tmp;
  722. if (opt_icarus_options == NULL)
  723. buf[0] = '\0';
  724. else {
  725. ptr = opt_icarus_options;
  726. for (i = 0; i < this_option_offset; i++) {
  727. comma = strchr(ptr, ',');
  728. if (comma == NULL)
  729. break;
  730. ptr = comma + 1;
  731. }
  732. comma = strchr(ptr, ',');
  733. if (comma == NULL)
  734. max = strlen(ptr);
  735. else
  736. max = comma - ptr;
  737. if (max > BUFSIZ)
  738. max = BUFSIZ;
  739. strncpy(buf, ptr, max);
  740. buf[max] = '\0';
  741. }
  742. ident = usb_ident(icarus);
  743. switch (ident) {
  744. case IDENT_ICA:
  745. case IDENT_BLT:
  746. case IDENT_LLT:
  747. case IDENT_AVA:
  748. *baud = ICARUS_IO_SPEED;
  749. *work_division = 2;
  750. *fpga_count = 2;
  751. break;
  752. case IDENT_AMU:
  753. case IDENT_ANU:
  754. case IDENT_AU3:
  755. *baud = ICARUS_IO_SPEED;
  756. *work_division = 1;
  757. *fpga_count = 1;
  758. break;
  759. case IDENT_CMR1:
  760. *baud = ICARUS_IO_SPEED;
  761. *work_division = 2;
  762. *fpga_count = 2;
  763. break;
  764. case IDENT_CMR2:
  765. *baud = ICARUS_IO_SPEED;
  766. *work_division = 1;
  767. *fpga_count = 1;
  768. break;
  769. default:
  770. quit(1, "Icarus get_options() called with invalid %s ident=%d",
  771. icarus->drv->name, ident);
  772. }
  773. if (*buf) {
  774. colon = strchr(buf, ':');
  775. if (colon)
  776. *(colon++) = '\0';
  777. if (*buf) {
  778. tmp = atoi(buf);
  779. switch (tmp) {
  780. case 115200:
  781. *baud = 115200;
  782. break;
  783. case 57600:
  784. *baud = 57600;
  785. break;
  786. default:
  787. quit(1, "Invalid icarus-options for baud (%s) must be 115200 or 57600", buf);
  788. }
  789. }
  790. if (colon && *colon) {
  791. colon2 = strchr(colon, ':');
  792. if (colon2)
  793. *(colon2++) = '\0';
  794. if (*colon) {
  795. tmp = atoi(colon);
  796. if (tmp == 1 || tmp == 2 || tmp == 4 || tmp == 8) {
  797. *work_division = tmp;
  798. *fpga_count = tmp; // default to the same
  799. } else {
  800. quit(1, "Invalid icarus-options for work_division (%s) must be 1, 2, 4 or 8", colon);
  801. }
  802. }
  803. if (colon2 && *colon2) {
  804. tmp = atoi(colon2);
  805. if (tmp > 0 && tmp <= *work_division)
  806. *fpga_count = tmp;
  807. else {
  808. quit(1, "Invalid icarus-options for fpga_count (%s) must be >0 and <=work_division (%d)", colon2, *work_division);
  809. }
  810. }
  811. }
  812. }
  813. }
  814. unsigned char crc5(unsigned char *ptr, unsigned char len)
  815. {
  816. unsigned char i, j, k;
  817. unsigned char crc = 0x1f;
  818. unsigned char crcin[5] = {1, 1, 1, 1, 1};
  819. unsigned char crcout[5] = {1, 1, 1, 1, 1};
  820. unsigned char din = 0;
  821. j = 0x80;
  822. k = 0;
  823. for (i = 0; i < len; i++) {
  824. if (*ptr & j)
  825. din = 1;
  826. else
  827. din = 0;
  828. crcout[0] = crcin[4] ^ din;
  829. crcout[1] = crcin[0];
  830. crcout[2] = crcin[1] ^ crcin[4] ^ din;
  831. crcout[3] = crcin[2];
  832. crcout[4] = crcin[3];
  833. j = j >> 1;
  834. k++;
  835. if (k == 8) {
  836. j = 0x80;
  837. k = 0;
  838. ptr++;
  839. }
  840. memcpy(crcin, crcout, 5);
  841. }
  842. crc = 0;
  843. if (crcin[4])
  844. crc |= 0x10;
  845. if (crcin[3])
  846. crc |= 0x08;
  847. if (crcin[2])
  848. crc |= 0x04;
  849. if (crcin[1])
  850. crc |= 0x02;
  851. if (crcin[0])
  852. crc |= 0x01;
  853. return crc;
  854. }
  855. static uint16_t anu_find_freqhex(void)
  856. {
  857. float fout, best_fout = opt_anu_freq;
  858. int od, nf, nr, no, n, m, bs;
  859. uint16_t anu_freq_hex = 0;
  860. float best_diff = 1000;
  861. if (!best_fout)
  862. best_fout = ANT_U1_DEFFREQ;
  863. for (od = 0; od < 4; od++) {
  864. no = 1 << od;
  865. for (n = 0; n < 16; n++) {
  866. nr = n + 1;
  867. for (m = 0; m < 64; m++) {
  868. nf = m + 1;
  869. fout = 25 * (float)nf /((float)(nr) * (float)(no));
  870. if (fabsf(fout - opt_anu_freq) > best_diff)
  871. continue;
  872. if (500 <= (fout * no) && (fout * no) <= 1000)
  873. bs = 1;
  874. else
  875. bs = 0;
  876. best_diff = fabsf(fout - opt_anu_freq);
  877. best_fout = fout;
  878. anu_freq_hex = (bs << 14) | (m << 7) | (n << 2) | od;
  879. if (fout == opt_anu_freq) {
  880. applog(LOG_DEBUG, "ANU found exact frequency %.1f with hex %04x",
  881. opt_anu_freq, anu_freq_hex);
  882. goto out;
  883. }
  884. }
  885. }
  886. }
  887. applog(LOG_NOTICE, "ANU found nearest frequency %.1f with hex %04x", best_fout,
  888. anu_freq_hex);
  889. out:
  890. return anu_freq_hex;
  891. }
  892. static uint16_t anu3_find_freqhex(void)
  893. {
  894. int i = 0, freq = opt_au3_freq, u3freq;
  895. uint16_t anu_freq_hex = 0x0882;
  896. if (!freq)
  897. freq = ANT_U3_DEFFREQ;
  898. do {
  899. u3freq = u3freqtable[i].freq;
  900. if (u3freq <= freq)
  901. anu_freq_hex = u3freqtable[i].hex;
  902. i++;
  903. } while (u3freq < ANT_U3_MAXFREQ);
  904. return anu_freq_hex;
  905. }
  906. static bool set_anu_freq(struct cgpu_info *icarus, struct ICARUS_INFO *info, uint16_t anu_freq_hex)
  907. {
  908. unsigned char cmd_buf[4], rdreg_buf[4];
  909. int amount, err;
  910. char buf[512];
  911. if (!anu_freq_hex)
  912. anu_freq_hex = anu_find_freqhex();
  913. memset(cmd_buf, 0, 4);
  914. memset(rdreg_buf, 0, 4);
  915. cmd_buf[0] = 2 | 0x80;
  916. cmd_buf[1] = (anu_freq_hex & 0xff00u) >> 8;
  917. cmd_buf[2] = (anu_freq_hex & 0x00ffu);
  918. cmd_buf[3] = crc5(cmd_buf, 27);
  919. rdreg_buf[0] = 4 | 0x80;
  920. rdreg_buf[1] = 0; //16-23
  921. rdreg_buf[2] = 0x04; //8-15
  922. rdreg_buf[3] = crc5(rdreg_buf, 27);
  923. applog(LOG_DEBUG, "%s %i: Send frequency %02x%02x%02x%02x", icarus->drv->name, icarus->device_id,
  924. cmd_buf[0], cmd_buf[1], cmd_buf[2], cmd_buf[3]);
  925. err = usb_write_ii(icarus, info->intinfo, (char *)cmd_buf, 4, &amount, C_ANU_SEND_CMD);
  926. if (err != LIBUSB_SUCCESS || amount != 4) {
  927. applog(LOG_ERR, "%s %i: Write freq Comms error (werr=%d amount=%d)",
  928. icarus->drv->name, icarus->device_id, err, amount);
  929. return false;
  930. }
  931. err = usb_read_ii_timeout(icarus, info->intinfo, buf, 512, &amount, 100, C_GETRESULTS);
  932. if (err < 0 && err != LIBUSB_ERROR_TIMEOUT) {
  933. applog(LOG_ERR, "%s %i: Read freq Comms error (rerr=%d amount=%d)",
  934. icarus->drv->name, icarus->device_id, err, amount);
  935. return false;
  936. }
  937. applog(LOG_DEBUG, "%s %i: Send freq getstatus %02x%02x%02x%02x", icarus->drv->name, icarus->device_id,
  938. rdreg_buf[0], rdreg_buf[1], rdreg_buf[2], rdreg_buf[3]);
  939. err = usb_write_ii(icarus, info->intinfo, (char *)cmd_buf, 4, &amount, C_ANU_SEND_RDREG);
  940. if (err != LIBUSB_SUCCESS || amount != 4) {
  941. applog(LOG_ERR, "%s %i: Write freq Comms error (werr=%d amount=%d)",
  942. icarus->drv->name, icarus->device_id, err, amount);
  943. return false;
  944. }
  945. err = usb_read_ii_timeout(icarus, info->intinfo, buf, 512, &amount, 100, C_GETRESULTS);
  946. if (err < 0 && err != LIBUSB_ERROR_TIMEOUT) {
  947. applog(LOG_ERR, "%s %i: Read freq Comms error (rerr=%d amount=%d)",
  948. icarus->drv->name, icarus->device_id, err, amount);
  949. return false;
  950. }
  951. return true;
  952. }
  953. static void set_anu_volt(struct cgpu_info *icarus)
  954. {
  955. unsigned char voltage_data[2], cmd_buf[4];
  956. char volt_buf[8];
  957. int err, amount;
  958. /* Allow a zero setting to imply not to try and set voltage */
  959. if (!opt_au3_volt)
  960. return;
  961. if (opt_au3_volt < 725 || opt_au3_volt > 850) {
  962. applog(LOG_WARNING, "Invalid ANU voltage %d specified, must be 725-850", opt_au3_volt);
  963. return;
  964. }
  965. sprintf(volt_buf, "%04d", opt_au3_volt);
  966. hex2bin(voltage_data, volt_buf, 2);
  967. cmd_buf[0] = 0xaa;
  968. cmd_buf[1] = voltage_data[0];
  969. cmd_buf[1] &=0x0f;
  970. cmd_buf[1] |=0xb0;
  971. cmd_buf[2] = voltage_data[1];
  972. cmd_buf[3] = 0x00; //0-7
  973. cmd_buf[3] = crc5(cmd_buf, 4*8 - 5);
  974. cmd_buf[3] |= 0xc0;
  975. applog(LOG_INFO, "Send ANU voltage %02x%02x%02x%02x", cmd_buf[0], cmd_buf[1], cmd_buf[2], cmd_buf[3]);
  976. cgsleep_ms(500);
  977. err = usb_write(icarus, (char * )cmd_buf, 4, &amount, C_ANU_SEND_VOLT);
  978. if (err != LIBUSB_SUCCESS || amount != 4)
  979. applog(LOG_ERR, "Write voltage Comms error (werr=%d amount=%d)", err, amount);
  980. }
  981. static void rock_init_last_received_task_complete_time(struct ICARUS_INFO *info)
  982. {
  983. int i;
  984. if (opt_rock_freq < info->rmdev.min_frq ||
  985. opt_rock_freq > info->rmdev.max_frq)
  986. opt_rock_freq = info->rmdev.def_frq;
  987. for (i = 0; i < MAX_CHIP_NUM; ++i) {
  988. info->rmdev.chip[i].last_received_task_complete_time = time(NULL);
  989. info->rmdev.chip[i].freq = opt_rock_freq/10 - 1;
  990. info->rmdev.chip[i].error_cnt = 0;
  991. }
  992. info->rmdev.dev_detect_time = time(NULL);
  993. }
  994. static void icarus_clear(struct cgpu_info *icarus, struct ICARUS_INFO *info)
  995. {
  996. char buf[512];
  997. int amt;
  998. do {
  999. usb_read_ii_timeout(icarus, info->intinfo, buf, 512, &amt, 100, C_GETRESULTS);
  1000. } while (amt > 0);
  1001. }
  1002. static struct cgpu_info *icarus_detect_one(struct libusb_device *dev, struct usb_find_devices *found)
  1003. {
  1004. int this_option_offset = ++option_offset;
  1005. struct ICARUS_INFO *info;
  1006. struct timeval tv_start, tv_finish;
  1007. // Block 171874 nonce = (0xa2870100) = 0x000187a2
  1008. // N.B. golden_ob MUST take less time to calculate
  1009. // than the timeout set in icarus_open()
  1010. // This one takes ~0.53ms on Rev3 Icarus
  1011. const char golden_ob[] =
  1012. "4679ba4ec99876bf4bfe086082b40025"
  1013. "4df6c356451471139a3afa71e48f544a"
  1014. "00000000000000000000000000000000"
  1015. "0000000087320b1a1426674f2fa722ce";
  1016. const char golden_nonce[] = "000187a2";
  1017. const uint32_t golden_nonce_val = 0x000187a2;
  1018. unsigned char nonce_bin[ICARUS_BUF_SIZE];
  1019. struct ICARUS_WORK workdata;
  1020. char *nonce_hex;
  1021. int baud, uninitialised_var(work_division), uninitialised_var(fpga_count);
  1022. bool anu_freqset = false;
  1023. struct cgpu_info *icarus;
  1024. int ret, err, amount, tries, i;
  1025. bool ok;
  1026. bool cmr2_ok[CAIRNSMORE2_INTS];
  1027. int cmr2_count;
  1028. if ((sizeof(workdata) << 1) != (sizeof(golden_ob) - 1))
  1029. quithere(1, "Data and golden_ob sizes don't match");
  1030. icarus = usb_alloc_cgpu(&icarus_drv, 1);
  1031. if (!usb_init(icarus, dev, found))
  1032. goto shin;
  1033. get_options(this_option_offset, icarus, &baud, &work_division, &fpga_count);
  1034. hex2bin((void *)(&workdata), golden_ob, sizeof(workdata));
  1035. info = cgcalloc(1, sizeof(struct ICARUS_INFO));
  1036. icarus->device_data = (void *)info;
  1037. info->ident = usb_ident(icarus);
  1038. switch (info->ident) {
  1039. case IDENT_ICA:
  1040. case IDENT_AVA:
  1041. case IDENT_BLT:
  1042. case IDENT_LLT:
  1043. case IDENT_AMU:
  1044. case IDENT_CMR1:
  1045. info->timeout = ICARUS_WAIT_TIMEOUT;
  1046. break;
  1047. case IDENT_ANU:
  1048. info->timeout = ANT_WAIT_TIMEOUT;
  1049. break;
  1050. case IDENT_AU3:
  1051. info->timeout = AU3_WAIT_TIMEOUT;
  1052. break;
  1053. case IDENT_CMR2:
  1054. if (found->intinfo_count != CAIRNSMORE2_INTS) {
  1055. quithere(1, "CMR2 Interface count (%d) isn't expected: %d",
  1056. found->intinfo_count,
  1057. CAIRNSMORE2_INTS);
  1058. }
  1059. info->timeout = ICARUS_CMR2_TIMEOUT;
  1060. cmr2_count = 0;
  1061. for (i = 0; i < CAIRNSMORE2_INTS; i++)
  1062. cmr2_ok[i] = false;
  1063. break;
  1064. default:
  1065. quit(1, "%s icarus_detect_one() invalid %s ident=%d",
  1066. icarus->drv->dname, icarus->drv->dname, info->ident);
  1067. }
  1068. info->nonce_size = ICARUS_READ_SIZE;
  1069. // For CMR2 test each USB Interface
  1070. retry:
  1071. tries = 2;
  1072. ok = false;
  1073. while (!ok && tries-- > 0) {
  1074. icarus_clear(icarus, info);
  1075. icarus_initialise(icarus, baud);
  1076. if (info->u3) {
  1077. uint16_t anu_freq_hex = anu3_find_freqhex();
  1078. set_anu_volt(icarus);
  1079. if (!set_anu_freq(icarus, info, anu_freq_hex)) {
  1080. applog(LOG_WARNING, "%s %i: Failed to set frequency, too much overclock?",
  1081. icarus->drv->name, icarus->device_id);
  1082. continue;
  1083. }
  1084. icarus->usbdev->ident = info->ident = IDENT_AU3;
  1085. info->Hs = ANTU3_HASH_TIME;
  1086. icarus->drv->name = "AU3";
  1087. applog(LOG_DEBUG, "%s %i: Detected Antminer U3", icarus->drv->name,
  1088. icarus->device_id);
  1089. } else if (info->ident == IDENT_ANU && !info->u3) {
  1090. if (!set_anu_freq(icarus, info, 0)) {
  1091. applog(LOG_WARNING, "%s %i: Failed to set frequency, too much overclock?",
  1092. icarus->drv->name, icarus->device_id);
  1093. continue;
  1094. }
  1095. }
  1096. err = usb_write_ii(icarus, info->intinfo,
  1097. (char *)(&workdata), sizeof(workdata), &amount, C_SENDWORK);
  1098. if (err != LIBUSB_SUCCESS || amount != sizeof(workdata))
  1099. continue;
  1100. memset(nonce_bin, 0, sizeof(nonce_bin));
  1101. ret = icarus_get_nonce(icarus, nonce_bin, &tv_start, &tv_finish, NULL, 300);
  1102. if (ret != ICA_NONCE_OK)
  1103. continue;
  1104. if (info->nonce_size == ICARUS_READ_SIZE && usb_buffer_size(icarus) == 4) {
  1105. applog(LOG_DEBUG, "%s %i: Detected Rockminer, deferring detection",
  1106. icarus->drv->name, icarus->device_id);
  1107. usb_buffer_clear(icarus);
  1108. break;
  1109. }
  1110. if (info->nonce_size == ICARUS_READ_SIZE && usb_buffer_size(icarus) == 1) {
  1111. info->ant = true;
  1112. usb_buffer_clear(icarus);
  1113. icarus->usbdev->ident = info->ident = IDENT_ANU;
  1114. info->nonce_size = ANT_READ_SIZE;
  1115. info->Hs = ANTMINERUSB_HASH_TIME;
  1116. icarus->drv->name = "ANU";
  1117. applog(LOG_DEBUG, "%s %i: Detected Antminer U1/2/3, changing nonce size to %d",
  1118. icarus->drv->name, icarus->device_id, ANT_READ_SIZE);
  1119. }
  1120. nonce_hex = bin2hex(nonce_bin, sizeof(nonce_bin));
  1121. if (strncmp(nonce_hex, golden_nonce, 8) == 0) {
  1122. if (info->ant && !anu_freqset)
  1123. anu_freqset = true;
  1124. else
  1125. ok = true;
  1126. } else {
  1127. if (tries < 0 && info->ident != IDENT_CMR2) {
  1128. applog(LOG_ERR,
  1129. "Icarus Detect: "
  1130. "Test failed at %s: get %s, should: %s",
  1131. icarus->device_path, nonce_hex, golden_nonce);
  1132. }
  1133. }
  1134. free(nonce_hex);
  1135. }
  1136. if (!ok) {
  1137. if (info->ident != IDENT_CMR2) {
  1138. if (info->u3)
  1139. goto unshin;
  1140. info->u3 = true;
  1141. goto retry;
  1142. }
  1143. if (info->intinfo < CAIRNSMORE2_INTS-1) {
  1144. info->intinfo++;
  1145. goto retry;
  1146. }
  1147. } else {
  1148. if (info->ident == IDENT_CMR2) {
  1149. applog(LOG_DEBUG,
  1150. "Icarus Detect: "
  1151. "Test succeeded at %s i%d: got %s",
  1152. icarus->device_path, info->intinfo, golden_nonce);
  1153. cmr2_ok[info->intinfo] = true;
  1154. cmr2_count++;
  1155. if (info->intinfo < CAIRNSMORE2_INTS-1) {
  1156. info->intinfo++;
  1157. goto retry;
  1158. }
  1159. }
  1160. }
  1161. if (info->ident == IDENT_CMR2) {
  1162. if (cmr2_count == 0) {
  1163. applog(LOG_ERR,
  1164. "Icarus Detect: Test failed at %s: for all %d CMR2 Interfaces",
  1165. icarus->device_path, CAIRNSMORE2_INTS);
  1166. goto unshin;
  1167. }
  1168. // set the interface to the first one that succeeded
  1169. for (i = 0; i < CAIRNSMORE2_INTS; i++)
  1170. if (cmr2_ok[i]) {
  1171. info->intinfo = i;
  1172. break;
  1173. }
  1174. } else {
  1175. applog(LOG_DEBUG,
  1176. "Icarus Detect: "
  1177. "Test succeeded at %s: got %s",
  1178. icarus->device_path, golden_nonce);
  1179. }
  1180. /* We have a real Icarus! */
  1181. if (!add_cgpu(icarus))
  1182. goto unshin;
  1183. update_usb_stats(icarus);
  1184. applog(LOG_INFO, "%s %d: Found at %s",
  1185. icarus->drv->name, icarus->device_id, icarus->device_path);
  1186. if (info->ident == IDENT_CMR2) {
  1187. applog(LOG_INFO, "%s %d: with %d Interface%s",
  1188. icarus->drv->name, icarus->device_id,
  1189. cmr2_count, cmr2_count > 1 ? "s" : "");
  1190. // Assume 1 or 2 are running FPGA pairs
  1191. if (cmr2_count < 3) {
  1192. work_division = fpga_count = 2;
  1193. info->Hs /= 2;
  1194. }
  1195. }
  1196. applog(LOG_DEBUG, "%s %d: Init baud=%d work_division=%d fpga_count=%d",
  1197. icarus->drv->name, icarus->device_id, baud, work_division, fpga_count);
  1198. info->baud = baud;
  1199. info->work_division = work_division;
  1200. info->fpga_count = fpga_count;
  1201. info->nonce_mask = mask(work_division);
  1202. info->golden_hashes = (golden_nonce_val & info->nonce_mask) * fpga_count;
  1203. timersub(&tv_finish, &tv_start, &(info->golden_tv));
  1204. set_timing_mode(this_option_offset, icarus);
  1205. if (info->ident == IDENT_CMR2) {
  1206. int i;
  1207. for (i = info->intinfo + 1; i < icarus->usbdev->found->intinfo_count; i++) {
  1208. struct cgpu_info *cgtmp;
  1209. struct ICARUS_INFO *intmp;
  1210. if (!cmr2_ok[i])
  1211. continue;
  1212. cgtmp = usb_copy_cgpu(icarus);
  1213. if (!cgtmp) {
  1214. applog(LOG_ERR, "%s %d: Init failed initinfo %d",
  1215. icarus->drv->name, icarus->device_id, i);
  1216. continue;
  1217. }
  1218. cgtmp->usbinfo.usbstat = USB_NOSTAT;
  1219. intmp = cgmalloc(sizeof(struct ICARUS_INFO));
  1220. cgtmp->device_data = (void *)intmp;
  1221. // Initialise everything to match
  1222. memcpy(intmp, info, sizeof(struct ICARUS_INFO));
  1223. intmp->intinfo = i;
  1224. icarus_initialise(cgtmp, baud);
  1225. if (!add_cgpu(cgtmp)) {
  1226. usb_uninit(cgtmp);
  1227. free(intmp);
  1228. continue;
  1229. }
  1230. update_usb_stats(cgtmp);
  1231. }
  1232. }
  1233. return icarus;
  1234. unshin:
  1235. usb_uninit(icarus);
  1236. free(info);
  1237. icarus->device_data = NULL;
  1238. shin:
  1239. icarus = usb_free_cgpu(icarus);
  1240. return NULL;
  1241. }
  1242. static int64_t rock_scanwork(struct thr_info *thr);
  1243. static void rock_statline_before(char *buf, size_t bufsiz, struct cgpu_info *cgpu)
  1244. {
  1245. if (cgpu->temp)
  1246. tailsprintf(buf, bufsiz, "%3.0fMHz %3.0fC", opt_rock_freq, cgpu->temp);
  1247. else
  1248. tailsprintf(buf, bufsiz, "%.0fMHz", opt_rock_freq);
  1249. }
  1250. /* The only thing to do on flush_work is to remove the base work to prevent us
  1251. * rolling what is now stale work */
  1252. static void rock_flush(struct cgpu_info *icarus)
  1253. {
  1254. struct ICARUS_INFO *info = icarus->device_data;
  1255. struct work *work;
  1256. mutex_lock(&info->lock);
  1257. work = info->base_work;
  1258. info->base_work = NULL;
  1259. mutex_unlock(&info->lock);
  1260. if (work)
  1261. free_work(work);
  1262. }
  1263. static struct cgpu_info *rock_detect_one(struct libusb_device *dev, struct usb_find_devices *found)
  1264. {
  1265. struct ICARUS_INFO *info;
  1266. struct timeval tv_start, tv_finish;
  1267. char *ob_hex = NULL;
  1268. // Block 171874 nonce = (0xa2870100) = 0x000187a2
  1269. // N.B. golden_ob MUST take less time to calculate
  1270. // than the timeout set in icarus_open()
  1271. // This one takes ~0.53ms on Rev3 Icarus
  1272. const char golden_ob[] =
  1273. "4679ba4ec99876bf4bfe086082b40025"
  1274. "4df6c356451471139a3afa71e48f544a"
  1275. "00000000000000000000000000000000"
  1276. "aa1ff05587320b1a1426674f2fa722ce";
  1277. const char golden_nonce[] = "000187a2";
  1278. const uint32_t golden_nonce_val = 0x000187a2;
  1279. unsigned char nonce_bin[ICARUS_BUF_SIZE];
  1280. struct ICARUS_WORK workdata;
  1281. char *nonce_hex;
  1282. struct cgpu_info *icarus;
  1283. int ret, err, amount, tries;
  1284. bool ok;
  1285. int correction_times = 0;
  1286. NONCE_DATA nonce_data;
  1287. uint32_t nonce;
  1288. char *newname = NULL;
  1289. if ((sizeof(workdata) << 1) != (sizeof(golden_ob) - 1))
  1290. quithere(1, "Data and golden_ob sizes don't match");
  1291. icarus = usb_alloc_cgpu(&icarus_drv, 1);
  1292. if (!usb_init(icarus, dev, found))
  1293. goto shin;
  1294. hex2bin((void *)(&workdata), golden_ob, sizeof(workdata));
  1295. rev((void *)(&(workdata.midstate)), ICARUS_MIDSTATE_SIZE);
  1296. rev((void *)(&(workdata.work)), ICARUS_WORK_SIZE);
  1297. if (opt_debug) {
  1298. ob_hex = bin2hex((void *)(&workdata), sizeof(workdata));
  1299. applog(LOG_WARNING, "%s %d: send_gold_nonce %s",
  1300. icarus->drv->name, icarus->device_id, ob_hex);
  1301. free(ob_hex);
  1302. }
  1303. info = cgcalloc(1, sizeof(struct ICARUS_INFO));
  1304. (void)memset(info, 0, sizeof(struct ICARUS_INFO));
  1305. icarus->device_data = (void *)info;
  1306. icarus->usbdev->ident = info->ident = IDENT_LIN;
  1307. info->nonce_size = ROCK_READ_SIZE;
  1308. info->fail_time = 10;
  1309. info->nonce_mask = 0xffffffff;
  1310. update_usb_stats(icarus);
  1311. tries = MAX_TRIES;
  1312. ok = false;
  1313. while (!ok && tries-- > 0) {
  1314. icarus_initialise(icarus, info->baud);
  1315. applog(LOG_DEBUG, "tries: %d", tries);
  1316. workdata.unused[ICARUS_UNUSED_SIZE - 3] = opt_rock_freq/10 - 1;
  1317. workdata.unused[ICARUS_UNUSED_SIZE - 2] = (MAX_TRIES-1-tries);
  1318. info->rmdev.detect_chip_no++;
  1319. if (info->rmdev.detect_chip_no >= MAX_TRIES)
  1320. info->rmdev.detect_chip_no = 0;
  1321. //g_detect_chip_no = (g_detect_chip_no + 1) & MAX_CHIP_NUM;
  1322. usb_buffer_clear(icarus);
  1323. err = usb_write_ii(icarus, info->intinfo,
  1324. (char *)(&workdata), sizeof(workdata), &amount, C_SENDWORK);
  1325. if (err != LIBUSB_SUCCESS || amount != sizeof(workdata))
  1326. continue;
  1327. memset(nonce_bin, 0, sizeof(nonce_bin));
  1328. ret = icarus_get_nonce(icarus, nonce_bin, &tv_start, &tv_finish, NULL, 100);
  1329. applog(LOG_DEBUG, "Rockminer nonce_bin: %02x %02x %02x %02x %02x %02x %02x %02x",
  1330. nonce_bin[0], nonce_bin[1], nonce_bin[2], nonce_bin[3],
  1331. nonce_bin[4], nonce_bin[5], nonce_bin[6], nonce_bin[7]);
  1332. if (ret != ICA_NONCE_OK) {
  1333. applog(LOG_DEBUG, "detect_one get_gold_nonce error, tries = %d", tries);
  1334. continue;
  1335. }
  1336. if (usb_buffer_size(icarus) == 1) {
  1337. applog(LOG_INFO, "Rock detect found an ANU, skipping");
  1338. usb_buffer_clear(icarus);
  1339. break;
  1340. }
  1341. newname = NULL;
  1342. switch (nonce_bin[NONCE_CHIP_NO_OFFSET] & RM_PRODUCT_MASK) {
  1343. case RM_PRODUCT_T1:
  1344. newname = "LIR"; // Rocketbox
  1345. info->rmdev.product_id = ROCKMINER_T1;
  1346. info->rmdev.chip_max = 12;
  1347. info->rmdev.min_frq = 200;
  1348. info->rmdev.def_frq = 330;
  1349. info->rmdev.max_frq = 400;
  1350. break;
  1351. #if 0
  1352. case RM_PRODUCT_T2: // what's this?
  1353. newname = "LIX";
  1354. info->rmdev.product_id = ROCKMINER_T2;
  1355. info->rmdev.chip_max = 16;
  1356. info->rmdev.min_frq = 200;
  1357. info->rmdev.def_frq = 300;
  1358. info->rmdev.max_frq = 400;
  1359. break;
  1360. #endif
  1361. case RM_PRODUCT_RBOX:
  1362. newname = "LIN"; // R-Box
  1363. info->rmdev.product_id = ROCKMINER_RBOX;
  1364. info->rmdev.chip_max = 4;
  1365. info->rmdev.min_frq = 200;
  1366. info->rmdev.def_frq = 270;
  1367. info->rmdev.max_frq = 400;
  1368. break;
  1369. default:
  1370. continue;
  1371. }
  1372. snprintf(info->rock_init, sizeof(info->rock_init), "%02x %02x %02x %02x",
  1373. nonce_bin[4], nonce_bin[5], nonce_bin[6], nonce_bin[7]);
  1374. nonce_data.chip_no = nonce_bin[NONCE_CHIP_NO_OFFSET] & RM_CHIP_MASK;
  1375. if (nonce_data.chip_no >= info->rmdev.chip_max)
  1376. nonce_data.chip_no = 0;
  1377. nonce_data.cmd_value = nonce_bin[NONCE_TASK_CMD_OFFSET] & RM_CMD_MASK;
  1378. if (nonce_data.cmd_value == NONCE_TASK_COMPLETE_CMD) {
  1379. applog(LOG_DEBUG, "complete g_detect_chip_no: %d", info->rmdev.detect_chip_no);
  1380. workdata.unused[ICARUS_UNUSED_SIZE - 3] = opt_rock_freq/10 - 1;
  1381. workdata.unused[ICARUS_UNUSED_SIZE - 2] = info->rmdev.detect_chip_no;
  1382. info->rmdev.detect_chip_no++;
  1383. if (info->rmdev.detect_chip_no >= MAX_TRIES)
  1384. info->rmdev.detect_chip_no = 0;
  1385. err = usb_write_ii(icarus, info->intinfo,
  1386. (char *)(&workdata), sizeof(workdata), &amount, C_SENDWORK);
  1387. if (err != LIBUSB_SUCCESS || amount != sizeof(workdata))
  1388. continue;
  1389. applog(LOG_DEBUG, "send_gold_nonce usb_write_ii");
  1390. continue;
  1391. }
  1392. memcpy((char *)&nonce, nonce_bin, ICARUS_READ_SIZE);
  1393. nonce = htobe32(nonce);
  1394. applog(LOG_DEBUG, "Rockminer nonce: %08X", nonce);
  1395. correction_times = 0;
  1396. while (correction_times < NONCE_CORRECTION_TIMES) {
  1397. nonce_hex = bin2hex(nonce_bin, 4);
  1398. if (golden_nonce_val == nonce + rbox_corr_values[correction_times]) {
  1399. memset(&(info->g_work[0]), 0, sizeof(info->g_work));
  1400. rock_init_last_received_task_complete_time(info);
  1401. ok = true;
  1402. break;
  1403. } else {
  1404. applog(LOG_DEBUG, "detect_one gold_nonce compare error times = %d",
  1405. correction_times);
  1406. if (tries < 0 && info->ident != IDENT_CMR2) {
  1407. applog(LOG_WARNING,
  1408. "Icarus Detect: "
  1409. "Test failed at %s: get %s, should: %s",
  1410. icarus->device_path, nonce_hex, golden_nonce);
  1411. }
  1412. if (nonce == 0)
  1413. break;
  1414. }
  1415. free(nonce_hex);
  1416. correction_times++;
  1417. }
  1418. }
  1419. if (!ok)
  1420. goto unshin;
  1421. if (newname) {
  1422. if (!icarus->drv->copy)
  1423. icarus->drv = copy_drv(icarus->drv);
  1424. icarus->drv->name = newname;
  1425. }
  1426. applog(LOG_DEBUG, "Icarus Detect: Test succeeded at %s: got %s",
  1427. icarus->device_path, golden_nonce);
  1428. /* We have a real Rockminer! */
  1429. if (!add_cgpu(icarus))
  1430. goto unshin;
  1431. icarus->drv->scanwork = rock_scanwork;
  1432. icarus->drv->dname = "Rockminer";
  1433. icarus->drv->get_statline_before = &rock_statline_before;
  1434. icarus->drv->flush_work = &rock_flush;
  1435. mutex_init(&info->lock);
  1436. applog(LOG_INFO, "%s %d: Found at %s",
  1437. icarus->drv->name, icarus->device_id,
  1438. icarus->device_path);
  1439. timersub(&tv_finish, &tv_start, &(info->golden_tv));
  1440. return icarus;
  1441. unshin:
  1442. usb_uninit(icarus);
  1443. free(info);
  1444. icarus->device_data = NULL;
  1445. shin:
  1446. icarus = usb_free_cgpu(icarus);
  1447. return NULL;
  1448. }
  1449. static void icarus_detect(bool __maybe_unused hotplug)
  1450. {
  1451. usb_detect(&icarus_drv, rock_detect_one);
  1452. usb_detect(&icarus_drv, icarus_detect_one);
  1453. }
  1454. static bool icarus_prepare(struct thr_info *thr)
  1455. {
  1456. struct cgpu_info *icarus = thr->cgpu;
  1457. struct ICARUS_INFO *info = (struct ICARUS_INFO *)(icarus->device_data);
  1458. if (info->ant)
  1459. info->antworks = cgcalloc(sizeof(struct work *), ANT_QUEUE_NUM);
  1460. return true;
  1461. }
  1462. static void cmr2_command(struct cgpu_info *icarus, uint8_t cmd, uint8_t data)
  1463. {
  1464. struct ICARUS_INFO *info = (struct ICARUS_INFO *)(icarus->device_data);
  1465. struct ICARUS_WORK workdata;
  1466. int amount;
  1467. memset((void *)(&workdata), 0, sizeof(workdata));
  1468. workdata.prefix = ICARUS_CMR2_PREFIX;
  1469. workdata.cmd = cmd;
  1470. workdata.data = data;
  1471. workdata.check = workdata.data ^ workdata.cmd ^ workdata.prefix ^ ICARUS_CMR2_CHECK;
  1472. usb_write_ii(icarus, info->intinfo, (char *)(&workdata), sizeof(workdata), &amount, C_SENDWORK);
  1473. }
  1474. static void cmr2_commands(struct cgpu_info *icarus)
  1475. {
  1476. struct ICARUS_INFO *info = (struct ICARUS_INFO *)(icarus->device_data);
  1477. if (info->speed_next_work) {
  1478. info->speed_next_work = false;
  1479. cmr2_command(icarus, ICARUS_CMR2_CMD_SPEED, info->cmr2_speed);
  1480. return;
  1481. }
  1482. if (info->flash_next_work) {
  1483. info->flash_next_work = false;
  1484. cmr2_command(icarus, ICARUS_CMR2_CMD_FLASH, ICARUS_CMR2_DATA_FLASH_ON);
  1485. cgsleep_ms(250);
  1486. cmr2_command(icarus, ICARUS_CMR2_CMD_FLASH, ICARUS_CMR2_DATA_FLASH_OFF);
  1487. cgsleep_ms(250);
  1488. cmr2_command(icarus, ICARUS_CMR2_CMD_FLASH, ICARUS_CMR2_DATA_FLASH_ON);
  1489. cgsleep_ms(250);
  1490. cmr2_command(icarus, ICARUS_CMR2_CMD_FLASH, ICARUS_CMR2_DATA_FLASH_OFF);
  1491. return;
  1492. }
  1493. }
  1494. void rock_send_task(unsigned char chip_no, unsigned int current_task_id, struct thr_info *thr)
  1495. {
  1496. struct cgpu_info *icarus = thr->cgpu;
  1497. struct ICARUS_INFO *info = (struct ICARUS_INFO *)(icarus->device_data);
  1498. int err, amount;
  1499. struct ICARUS_WORK workdata;
  1500. char *ob_hex;
  1501. struct work *work = NULL;
  1502. /* Only base_work needs locking since it can be asynchronously deleted
  1503. * by flush work */
  1504. if (info->g_work[chip_no][current_task_id] == NULL) {
  1505. mutex_lock(&info->lock);
  1506. if (!info->base_work)
  1507. info->base_work = get_work(thr, thr->id);
  1508. if (info->base_work->drv_rolllimit > 0) {
  1509. info->base_work->drv_rolllimit--;
  1510. roll_work(info->base_work);
  1511. work = make_clone(info->base_work);
  1512. } else {
  1513. work = info->base_work;
  1514. info->base_work = NULL;
  1515. }
  1516. mutex_unlock(&info->lock);
  1517. info->g_work[chip_no][current_task_id] = work;
  1518. } else {
  1519. work = info->g_work[chip_no][current_task_id];
  1520. applog(LOG_DEBUG, "::resend work");
  1521. }
  1522. memset((void *)(&workdata), 0, sizeof(workdata));
  1523. memcpy(&(workdata.midstate), work->midstate, ICARUS_MIDSTATE_SIZE);
  1524. memcpy(&(workdata.work), work->data + ICARUS_WORK_DATA_OFFSET, ICARUS_WORK_SIZE);
  1525. workdata.unused[ICARUS_UNUSED_SIZE - 4] = 0xaa;
  1526. if (info->rmdev.chip[chip_no].freq > (info->rmdev.max_frq/10 - 1) ||
  1527. info->rmdev.chip[chip_no].freq < (info->rmdev.min_frq/10 - 1))
  1528. rock_init_last_received_task_complete_time(info);
  1529. workdata.unused[ICARUS_UNUSED_SIZE - 3] = info->rmdev.chip[chip_no].freq; //icarus->freq/10 - 1; ;
  1530. workdata.unused[ICARUS_UNUSED_SIZE - 2] = chip_no ;
  1531. workdata.id = 0x55;
  1532. if (opt_debug) {
  1533. ob_hex = bin2hex((void *)(work->data), 128);
  1534. applog(LOG_WARNING, "%s %d: work->data %s",
  1535. icarus->drv->name, icarus->device_id, ob_hex);
  1536. free(ob_hex);
  1537. }
  1538. // We only want results for the work we are about to send
  1539. usb_buffer_clear(icarus);
  1540. err = usb_write_ii(icarus, info->intinfo, (char *)(&workdata), sizeof(workdata), &amount, C_SENDWORK);
  1541. if (err < 0 || amount != sizeof(workdata)) {
  1542. applog(LOG_ERR, "%s %i: Comms error (werr=%d amt=%d)",
  1543. icarus->drv->name, icarus->device_id, err, amount);
  1544. dev_error(icarus, REASON_DEV_COMMS_ERROR);
  1545. icarus_initialise(icarus, info->baud);
  1546. if (info->g_work[chip_no][current_task_id])
  1547. {
  1548. free_work(info->g_work[chip_no][current_task_id]);
  1549. info->g_work[chip_no][current_task_id] = NULL;
  1550. }
  1551. return;
  1552. }
  1553. return;
  1554. }
  1555. static void process_history(struct cgpu_info *icarus, struct ICARUS_INFO *info, uint32_t nonce,
  1556. uint64_t hash_count, struct timeval *elapsed, struct timeval *tv_start)
  1557. {
  1558. struct ICARUS_HISTORY *history0, *history;
  1559. struct timeval tv_history_start, tv_history_finish;
  1560. int count;
  1561. double Hs, W, fullnonce;
  1562. int read_time, i;
  1563. bool limited;
  1564. uint32_t values;
  1565. int64_t hash_count_range;
  1566. double Ti, Xi;
  1567. // Ignore possible end condition values ...
  1568. // TODO: set limitations on calculated values depending on the device
  1569. // to avoid crap values caused by CPU/Task Switching/Swapping/etc
  1570. if ((nonce & info->nonce_mask) <= END_CONDITION ||
  1571. (nonce & info->nonce_mask) >= (info->nonce_mask & ~END_CONDITION))
  1572. return;
  1573. cgtime(&tv_history_start);
  1574. history0 = &(info->history[0]);
  1575. if (history0->values == 0)
  1576. timeradd(tv_start, &history_sec, &(history0->finish));
  1577. Ti = (double)(elapsed->tv_sec)
  1578. + ((double)(elapsed->tv_usec))/((double)1000000)
  1579. - ((double)ICARUS_READ_TIME(info->baud));
  1580. Xi = (double)hash_count;
  1581. history0->sumXiTi += Xi * Ti;
  1582. history0->sumXi += Xi;
  1583. history0->sumTi += Ti;
  1584. history0->sumXi2 += Xi * Xi;
  1585. history0->values++;
  1586. if (history0->hash_count_max < hash_count)
  1587. history0->hash_count_max = hash_count;
  1588. if (history0->hash_count_min > hash_count || history0->hash_count_min == 0)
  1589. history0->hash_count_min = hash_count;
  1590. if (history0->values >= info->min_data_count
  1591. && timercmp(tv_start, &(history0->finish), >)) {
  1592. for (i = INFO_HISTORY; i > 0; i--)
  1593. memcpy(&(info->history[i]),
  1594. &(info->history[i-1]),
  1595. sizeof(struct ICARUS_HISTORY));
  1596. // Initialise history0 to zero for summary calculation
  1597. memset(history0, 0, sizeof(struct ICARUS_HISTORY));
  1598. // We just completed a history data set
  1599. // So now recalc read_time based on the whole history thus we will
  1600. // initially get more accurate until it completes INFO_HISTORY
  1601. // total data sets
  1602. count = 0;
  1603. for (i = 1 ; i <= INFO_HISTORY; i++) {
  1604. history = &(info->history[i]);
  1605. if (history->values >= MIN_DATA_COUNT) {
  1606. count++;
  1607. history0->sumXiTi += history->sumXiTi;
  1608. history0->sumXi += history->sumXi;
  1609. history0->sumTi += history->sumTi;
  1610. history0->sumXi2 += history->sumXi2;
  1611. history0->values += history->values;
  1612. if (history0->hash_count_max < history->hash_count_max)
  1613. history0->hash_count_max = history->hash_count_max;
  1614. if (history0->hash_count_min > history->hash_count_min || history0->hash_count_min == 0)
  1615. history0->hash_count_min = history->hash_count_min;
  1616. }
  1617. }
  1618. // All history data
  1619. Hs = (history0->values*history0->sumXiTi - history0->sumXi*history0->sumTi)
  1620. / (history0->values*history0->sumXi2 - history0->sumXi*history0->sumXi);
  1621. W = history0->sumTi/history0->values - Hs*history0->sumXi/history0->values;
  1622. hash_count_range = history0->hash_count_max - history0->hash_count_min;
  1623. values = history0->values;
  1624. // Initialise history0 to zero for next data set
  1625. memset(history0, 0, sizeof(struct ICARUS_HISTORY));
  1626. fullnonce = W + Hs * (((double)0xffffffff) + 1);
  1627. read_time = SECTOMS(fullnonce) - ICARUS_READ_REDUCE;
  1628. if (info->read_time_limit > 0 && read_time > info->read_time_limit) {
  1629. read_time = info->read_time_limit;
  1630. limited = true;
  1631. } else
  1632. limited = false;
  1633. info->Hs = Hs;
  1634. info->read_time = read_time;
  1635. info->fullnonce = fullnonce;
  1636. info->count = count;
  1637. info->W = W;
  1638. info->values = values;
  1639. info->hash_count_range = hash_count_range;
  1640. if (info->min_data_count < MAX_MIN_DATA_COUNT)
  1641. info->min_data_count *= 2;
  1642. else if (info->timing_mode == MODE_SHORT)
  1643. info->do_icarus_timing = false;
  1644. applog(LOG_WARNING, "%s %d Re-estimate: Hs=%e W=%e read_time=%dms%s fullnonce=%.3fs",
  1645. icarus->drv->name, icarus->device_id, Hs, W, read_time,
  1646. limited ? " (limited)" : "", fullnonce);
  1647. }
  1648. info->history_count++;
  1649. cgtime(&tv_history_finish);
  1650. timersub(&tv_history_finish, &tv_history_start, &tv_history_finish);
  1651. timeradd(&tv_history_finish, &(info->history_time), &(info->history_time));
  1652. }
  1653. static int64_t icarus_scanwork(struct thr_info *thr)
  1654. {
  1655. struct cgpu_info *icarus = thr->cgpu;
  1656. struct ICARUS_INFO *info = (struct ICARUS_INFO *)(icarus->device_data);
  1657. int ret, err, amount;
  1658. unsigned char nonce_bin[ICARUS_BUF_SIZE];
  1659. struct ICARUS_WORK workdata;
  1660. char *ob_hex;
  1661. uint32_t nonce;
  1662. int64_t hash_count = 0;
  1663. struct timeval tv_start, tv_finish, elapsed;
  1664. int curr_hw_errors;
  1665. bool was_hw_error;
  1666. struct work *work;
  1667. int64_t estimate_hashes;
  1668. uint8_t workid = 0;
  1669. if (unlikely(share_work_tdiff(icarus) > info->fail_time)) {
  1670. if (info->failing) {
  1671. if (share_work_tdiff(icarus) > info->fail_time + 60) {
  1672. applog(LOG_ERR, "%s %d: Device failed to respond to restart",
  1673. icarus->drv->name, icarus->device_id);
  1674. usb_nodev(icarus);
  1675. return -1;
  1676. }
  1677. } else {
  1678. applog(LOG_WARNING, "%s %d: No valid hashes for over %d secs, attempting to reset",
  1679. icarus->drv->name, icarus->device_id, info->fail_time);
  1680. usb_reset(icarus);
  1681. info->failing = true;
  1682. }
  1683. }
  1684. // Device is gone
  1685. if (icarus->usbinfo.nodev)
  1686. return -1;
  1687. elapsed.tv_sec = elapsed.tv_usec = 0;
  1688. work = get_work(thr, thr->id);
  1689. memset((void *)(&workdata), 0, sizeof(workdata));
  1690. memcpy(&(workdata.midstate), work->midstate, ICARUS_MIDSTATE_SIZE);
  1691. memcpy(&(workdata.work), work->data + ICARUS_WORK_DATA_OFFSET, ICARUS_WORK_SIZE);
  1692. rev((void *)(&(workdata.midstate)), ICARUS_MIDSTATE_SIZE);
  1693. rev((void *)(&(workdata.work)), ICARUS_WORK_SIZE);
  1694. if (info->ant) {
  1695. workid = info->workid;
  1696. if (++info->workid >= 0x1F)
  1697. info->workid = 0;
  1698. if (info->antworks[workid])
  1699. free_work(info->antworks[workid]);
  1700. info->antworks[workid] = work;
  1701. workdata.id = workid;
  1702. }
  1703. if (info->speed_next_work || info->flash_next_work)
  1704. cmr2_commands(icarus);
  1705. // We only want results for the work we are about to send
  1706. usb_buffer_clear(icarus);
  1707. err = usb_write_ii(icarus, info->intinfo, (char *)(&workdata), sizeof(workdata), &amount, C_SENDWORK);
  1708. if (err < 0 || amount != sizeof(workdata)) {
  1709. applog(LOG_ERR, "%s %i: Comms error (werr=%d amt=%d)",
  1710. icarus->drv->name, icarus->device_id, err, amount);
  1711. dev_error(icarus, REASON_DEV_COMMS_ERROR);
  1712. icarus_initialise(icarus, info->baud);
  1713. goto out;
  1714. }
  1715. if (opt_debug) {
  1716. ob_hex = bin2hex((void *)(&workdata), sizeof(workdata));
  1717. applog(LOG_DEBUG, "%s %d: sent %s",
  1718. icarus->drv->name, icarus->device_id, ob_hex);
  1719. free(ob_hex);
  1720. }
  1721. more_nonces:
  1722. /* Icarus will return nonces or nothing. If we know we have enough data
  1723. * for a response in the buffer already, there will be no usb read
  1724. * performed. */
  1725. memset(nonce_bin, 0, sizeof(nonce_bin));
  1726. ret = icarus_get_nonce(icarus, nonce_bin, &tv_start, &tv_finish, thr, info->read_time);
  1727. if (ret == ICA_NONCE_ERROR)
  1728. goto out;
  1729. // aborted before becoming idle, get new work
  1730. if (ret == ICA_NONCE_TIMEOUT || ret == ICA_NONCE_RESTART) {
  1731. if (info->ant)
  1732. goto out;
  1733. timersub(&tv_finish, &tv_start, &elapsed);
  1734. // ONLY up to just when it aborted
  1735. // We didn't read a reply so we don't subtract ICARUS_READ_TIME
  1736. estimate_hashes = ((double)(elapsed.tv_sec)
  1737. + ((double)(elapsed.tv_usec))/((double)1000000)) / info->Hs;
  1738. // If some Serial-USB delay allowed the full nonce range to
  1739. // complete it can't have done more than a full nonce
  1740. if (unlikely(estimate_hashes > 0xffffffff))
  1741. estimate_hashes = 0xffffffff;
  1742. applog(LOG_DEBUG, "%s %d: no nonce = 0x%08lX hashes (%ld.%06lds)",
  1743. icarus->drv->name, icarus->device_id,
  1744. (long unsigned int)estimate_hashes,
  1745. (long)elapsed.tv_sec, (long)elapsed.tv_usec);
  1746. hash_count = estimate_hashes;
  1747. goto out;
  1748. }
  1749. if (info->ant) {
  1750. workid = nonce_bin[4] & 0x1F;
  1751. if (info->antworks[workid])
  1752. work = info->antworks[workid];
  1753. else
  1754. goto out;
  1755. }
  1756. memcpy((char *)&nonce, nonce_bin, ICARUS_READ_SIZE);
  1757. nonce = htobe32(nonce);
  1758. curr_hw_errors = icarus->hw_errors;
  1759. if (submit_nonce(thr, work, nonce))
  1760. info->failing = false;
  1761. was_hw_error = (curr_hw_errors < icarus->hw_errors);
  1762. /* U3s return shares fast enough to use just that for hashrate
  1763. * calculation, otherwise the result is inaccurate instead. */
  1764. if (info->ant) {
  1765. info->nonces++;
  1766. if (usb_buffer_size(icarus) >= ANT_READ_SIZE)
  1767. goto more_nonces;
  1768. } else {
  1769. hash_count = (nonce & info->nonce_mask);
  1770. hash_count++;
  1771. hash_count *= info->fpga_count;
  1772. }
  1773. #if 0
  1774. // This appears to only return zero nonce values
  1775. if (usb_buffer_size(icarus) > 3) {
  1776. memcpy((char *)&nonce, icarus->usbdev->buffer, sizeof(nonce_bin));
  1777. nonce = htobe32(nonce);
  1778. applog(LOG_WARNING, "%s %d: attempting to submit 2nd nonce = 0x%08lX",
  1779. icarus->drv->name, icarus->device_id,
  1780. (long unsigned int)nonce);
  1781. curr_hw_errors = icarus->hw_errors;
  1782. submit_nonce(thr, work, nonce);
  1783. was_hw_error = (curr_hw_errors > icarus->hw_errors);
  1784. }
  1785. #endif
  1786. if (opt_debug || info->do_icarus_timing)
  1787. timersub(&tv_finish, &tv_start, &elapsed);
  1788. applog(LOG_DEBUG, "%s %d: nonce = 0x%08x = 0x%08lX hashes (%ld.%06lds)",
  1789. icarus->drv->name, icarus->device_id,
  1790. nonce, (long unsigned int)hash_count,
  1791. (long)elapsed.tv_sec, (long)elapsed.tv_usec);
  1792. if (info->do_icarus_timing && !was_hw_error)
  1793. process_history(icarus, info, nonce, hash_count, &elapsed, &tv_start);
  1794. out:
  1795. if (!info->ant)
  1796. free_work(work);
  1797. else {
  1798. /* Ant USBs free the work themselves. Return only one full
  1799. * nonce worth on each pass to smooth out displayed hashrate */
  1800. if (info->nonces) {
  1801. hash_count = 0xffffffff;
  1802. info->nonces--;
  1803. }
  1804. }
  1805. return hash_count;
  1806. }
  1807. static int64_t rock_scanwork(struct thr_info *thr)
  1808. {
  1809. struct cgpu_info *icarus = thr->cgpu;
  1810. struct ICARUS_INFO *info = (struct ICARUS_INFO *)(icarus->device_data);
  1811. int ret;
  1812. unsigned char nonce_bin[ICARUS_BUF_SIZE];
  1813. uint32_t nonce;
  1814. int64_t hash_count = 0;
  1815. struct timeval tv_start, tv_finish, elapsed;
  1816. struct work *work = NULL;
  1817. int64_t estimate_hashes;
  1818. int correction_times = 0;
  1819. NONCE_DATA nonce_data;
  1820. double temp;
  1821. int chip_no = 0;
  1822. time_t recv_time = 0;
  1823. if (unlikely(share_work_tdiff(icarus) > info->fail_time)) {
  1824. if (info->failing) {
  1825. if (share_work_tdiff(icarus) > info->fail_time + 60) {
  1826. applog(LOG_ERR, "%s %d: Device failed to respond to restart",
  1827. icarus->drv->name, icarus->device_id);
  1828. usb_nodev(icarus);
  1829. return -1;
  1830. }
  1831. } else {
  1832. applog(LOG_WARNING, "%s %d: No valid hashes for over %d secs, attempting to reset",
  1833. icarus->drv->name, icarus->device_id, info->fail_time);
  1834. usb_reset(icarus);
  1835. info->failing = true;
  1836. }
  1837. }
  1838. // Device is gone
  1839. if (icarus->usbinfo.nodev)
  1840. return -1;
  1841. elapsed.tv_sec = elapsed.tv_usec = 0;
  1842. for (chip_no = 0; chip_no < info->rmdev.chip_max; chip_no++) {
  1843. recv_time = time(NULL);
  1844. if (recv_time > info->rmdev.chip[chip_no].last_received_task_complete_time + 1) {
  1845. info->rmdev.chip[chip_no].last_received_task_complete_time = recv_time;
  1846. rock_send_task(chip_no, 0,thr);
  1847. break;
  1848. }
  1849. }
  1850. memset(nonce_bin, 0, sizeof(nonce_bin));
  1851. ret = icarus_get_nonce(icarus, nonce_bin, &tv_start, &tv_finish, thr, 3000);//info->read_time);
  1852. nonce_data.chip_no = nonce_bin[NONCE_CHIP_NO_OFFSET] & RM_CHIP_MASK;
  1853. if (nonce_data.chip_no >= info->rmdev.chip_max)
  1854. nonce_data.chip_no = 0;
  1855. nonce_data.task_no = nonce_bin[NONCE_TASK_NO_OFFSET] & 0x1;
  1856. nonce_data.cmd_value = nonce_bin[NONCE_TASK_CMD_OFFSET] & RM_CMD_MASK;
  1857. nonce_data.work_state = nonce_bin[NONCE_TASK_CMD_OFFSET] & RM_STATUS_MASK;
  1858. temp = (double)nonce_bin[NONCE_COMMAND_OFFSET];
  1859. if (temp != 128)
  1860. icarus->temp = temp;
  1861. if (nonce_data.cmd_value == NONCE_TASK_COMPLETE_CMD) {
  1862. info->rmdev.chip[nonce_data.chip_no].last_received_task_complete_time = time(NULL);
  1863. if (info->g_work[nonce_data.chip_no][nonce_data.task_no]) {
  1864. free_work(info->g_work[nonce_data.chip_no][nonce_data.task_no]);
  1865. info->g_work[nonce_data.chip_no][nonce_data.task_no] = NULL;
  1866. }
  1867. goto out;
  1868. }
  1869. if (nonce_data.cmd_value == NONCE_GET_TASK_CMD) {
  1870. rock_send_task(nonce_data.chip_no, nonce_data.task_no, thr);
  1871. goto out;
  1872. }
  1873. if (ret == ICA_NONCE_TIMEOUT)
  1874. rock_send_task(nonce_data.chip_no, nonce_data.task_no, thr);
  1875. work = info->g_work[nonce_data.chip_no][nonce_data.task_no];
  1876. if (work == NULL)
  1877. goto out;
  1878. if (ret == ICA_NONCE_ERROR)
  1879. goto out;
  1880. // aborted before becoming idle, get new work
  1881. if (ret == ICA_NONCE_TIMEOUT || ret == ICA_NONCE_RESTART) {
  1882. timersub(&tv_finish, &tv_start, &elapsed);
  1883. // ONLY up to just when it aborted
  1884. // We didn't read a reply so we don't subtract ICARUS_READ_TIME
  1885. estimate_hashes = ((double)(elapsed.tv_sec)
  1886. + ((double)(elapsed.tv_usec))/((double)1000000)) / info->Hs;
  1887. // If some Serial-USB delay allowed the full nonce range to
  1888. // complete it can't have done more than a full nonce
  1889. if (unlikely(estimate_hashes > 0xffffffff))
  1890. estimate_hashes = 0xffffffff;
  1891. applog(LOG_DEBUG, "%s %d: no nonce = 0x%08lX hashes (%ld.%06lds)",
  1892. icarus->drv->name, icarus->device_id,
  1893. (long unsigned int)estimate_hashes,
  1894. (long)elapsed.tv_sec, (long)elapsed.tv_usec);
  1895. goto out;
  1896. }
  1897. memcpy((char *)&nonce, nonce_bin, ICARUS_READ_SIZE);
  1898. nonce = htobe32(nonce);
  1899. recv_time = time(NULL);
  1900. if ((recv_time-info->rmdev.dev_detect_time) >= 60) {
  1901. unsigned char i;
  1902. info->rmdev.dev_detect_time = recv_time;
  1903. for (i = 0; i < info->rmdev.chip_max; i ++) {
  1904. if (info->rmdev.chip[i].error_cnt >= 12) {
  1905. if (info->rmdev.chip[i].freq > info->rmdev.min_frq)
  1906. info->rmdev.chip[i].freq--;
  1907. } else if (info->rmdev.chip[i].error_cnt <= 1) {
  1908. if (info->rmdev.chip[i].freq < (info->rmdev.def_frq / 10 - 1))
  1909. info->rmdev.chip[i].freq++;
  1910. }
  1911. info->rmdev.chip[i].error_cnt = 0;
  1912. }
  1913. }
  1914. correction_times = 0;
  1915. info->nonces_checked++;
  1916. while (correction_times < NONCE_CORRECTION_TIMES) {
  1917. uint32_t new_nonce;
  1918. if (correction_times > 0) {
  1919. info->nonces_correction_tests++;
  1920. if (correction_times == 1)
  1921. info->nonces_correction_times++;
  1922. }
  1923. new_nonce = nonce + rbox_corr_values[correction_times];
  1924. /* Basic dupe testing */
  1925. if (new_nonce == info->last_nonce[nonce_data.chip_no][nonce_data.task_no])
  1926. break;
  1927. if (test_nonce(work, new_nonce)) {
  1928. nonce = new_nonce;
  1929. submit_tested_work(thr, work);
  1930. info->last_nonce[nonce_data.chip_no][nonce_data.task_no] = nonce;
  1931. info->nonces_correction[correction_times]++;
  1932. hash_count++;
  1933. info->failing = false;
  1934. applog(LOG_DEBUG, "Rockminer nonce :::OK:::");
  1935. break;
  1936. } else {
  1937. applog(LOG_DEBUG, "Rockminer nonce error times = %d", correction_times);
  1938. if (new_nonce == 0)
  1939. break;
  1940. }
  1941. correction_times++;
  1942. }
  1943. if (correction_times >= NONCE_CORRECTION_TIMES) {
  1944. inc_hw_errors(thr);
  1945. info->nonces_fail++;
  1946. }
  1947. hash_count = (hash_count * info->nonce_mask);
  1948. if (opt_debug || info->do_icarus_timing)
  1949. timersub(&tv_finish, &tv_start, &elapsed);
  1950. applog(LOG_DEBUG, "%s %d: nonce = 0x%08x = 0x%08lX hashes (%ld.%06lds)",
  1951. icarus->drv->name, icarus->device_id,
  1952. nonce, (long unsigned int)hash_count,
  1953. (long)elapsed.tv_sec, (long)elapsed.tv_usec);
  1954. out:
  1955. return hash_count;
  1956. }
  1957. static struct api_data *icarus_api_stats(struct cgpu_info *cgpu)
  1958. {
  1959. struct api_data *root = NULL;
  1960. struct ICARUS_INFO *info = (struct ICARUS_INFO *)(cgpu->device_data);
  1961. char data[4096];
  1962. int i, off;
  1963. size_t len;
  1964. float avg;
  1965. // Warning, access to these is not locked - but we don't really
  1966. // care since hashing performance is way more important than
  1967. // locking access to displaying API debug 'stats'
  1968. // If locking becomes an issue for any of them, use copy_data=true also
  1969. root = api_add_int(root, "read_time", &(info->read_time), false);
  1970. root = api_add_int(root, "read_time_limit", &(info->read_time_limit), false);
  1971. root = api_add_double(root, "fullnonce", &(info->fullnonce), false);
  1972. root = api_add_int(root, "count", &(info->count), false);
  1973. root = api_add_hs(root, "Hs", &(info->Hs), false);
  1974. root = api_add_double(root, "W", &(info->W), false);
  1975. root = api_add_uint(root, "total_values", &(info->values), false);
  1976. root = api_add_uint64(root, "range", &(info->hash_count_range), false);
  1977. root = api_add_uint64(root, "history_count", &(info->history_count), false);
  1978. root = api_add_timeval(root, "history_time", &(info->history_time), false);
  1979. root = api_add_uint(root, "min_data_count", &(info->min_data_count), false);
  1980. root = api_add_uint(root, "timing_values", &(info->history[0].values), false);
  1981. root = api_add_const(root, "timing_mode", timing_mode_str(info->timing_mode), false);
  1982. root = api_add_bool(root, "is_timing", &(info->do_icarus_timing), false);
  1983. root = api_add_int(root, "baud", &(info->baud), false);
  1984. root = api_add_int(root, "work_division", &(info->work_division), false);
  1985. root = api_add_int(root, "fpga_count", &(info->fpga_count), false);
  1986. if (info->ident == IDENT_LIN) {
  1987. root = api_add_string(root, "rock_init", info->rock_init, false);
  1988. root = api_add_uint8(root, "rock_chips", &(info->rmdev.detect_chip_no), false);
  1989. root = api_add_uint8(root, "rock_chip_max", &(info->rmdev.chip_max), false);
  1990. root = api_add_uint8(root, "rock_prod_id", &(info->rmdev.product_id), false);
  1991. root = api_add_avg(root, "rock_min_freq", &(info->rmdev.min_frq), false);
  1992. root = api_add_avg(root, "rock_max_freq", &(info->rmdev.max_frq), false);
  1993. root = api_add_uint64(root, "rock_check", &(info->nonces_checked), false);
  1994. root = api_add_uint64(root, "rock_corr", &(info->nonces_correction_times), false);
  1995. root = api_add_uint64(root, "rock_corr_tests", &(info->nonces_correction_tests), false);
  1996. root = api_add_uint64(root, "rock_corr_fail", &(info->nonces_fail), false);
  1997. if (info->nonces_checked <= 0)
  1998. avg = 0;
  1999. else
  2000. avg = (float)(info->nonces_correction_tests) / (float)(info->nonces_checked);
  2001. root = api_add_avg(root, "rock_corr_avg", &avg, true);
  2002. data[0] = '\0';
  2003. off = 0;
  2004. for (i = 0; i < NONCE_CORRECTION_TIMES; i++) {
  2005. len = snprintf(data+off, sizeof(data)-off,
  2006. "%s%"PRIu64,
  2007. i > 0 ? "/" : "",
  2008. info->nonces_correction[i]);
  2009. if (len >= (sizeof(data)-off))
  2010. off = sizeof(data)-1;
  2011. else {
  2012. if (len > 0)
  2013. off += len;
  2014. }
  2015. }
  2016. root = api_add_string(root, "rock_corr_finds", data, true);
  2017. }
  2018. return root;
  2019. }
  2020. static void icarus_statline_before(char *buf, size_t bufsiz, struct cgpu_info *cgpu)
  2021. {
  2022. struct ICARUS_INFO *info = (struct ICARUS_INFO *)(cgpu->device_data);
  2023. if (info->ant) {
  2024. if (info->u3)
  2025. tailsprintf(buf, bufsiz, "%3.0fMHz %3dmV", opt_au3_freq, opt_au3_volt);
  2026. else
  2027. tailsprintf(buf, bufsiz, "%3.0fMHz", opt_anu_freq);
  2028. } else if (info->ident == IDENT_CMR2 && info->cmr2_speed > 0)
  2029. tailsprintf(buf, bufsiz, "%5.1fMhz", (float)(info->cmr2_speed) * ICARUS_CMR2_SPEED_FACTOR);
  2030. }
  2031. static void icarus_shutdown(__maybe_unused struct thr_info *thr)
  2032. {
  2033. // TODO: ?
  2034. }
  2035. static void icarus_identify(struct cgpu_info *cgpu)
  2036. {
  2037. struct ICARUS_INFO *info = (struct ICARUS_INFO *)(cgpu->device_data);
  2038. if (info->ident == IDENT_CMR2)
  2039. info->flash_next_work = true;
  2040. }
  2041. static char *icarus_set(struct cgpu_info *cgpu, char *option, char *setting, char *replybuf)
  2042. {
  2043. struct ICARUS_INFO *info = (struct ICARUS_INFO *)(cgpu->device_data);
  2044. int val;
  2045. if (info->ident != IDENT_CMR2) {
  2046. strcpy(replybuf, "no set options available");
  2047. return replybuf;
  2048. }
  2049. if (strcasecmp(option, "help") == 0) {
  2050. sprintf(replybuf, "clock: range %d-%d",
  2051. ICARUS_CMR2_SPEED_MIN_INT, ICARUS_CMR2_SPEED_MAX_INT);
  2052. return replybuf;
  2053. }
  2054. if (strcasecmp(option, "clock") == 0) {
  2055. if (!setting || !*setting) {
  2056. sprintf(replybuf, "missing clock setting");
  2057. return replybuf;
  2058. }
  2059. val = atoi(setting);
  2060. if (val < ICARUS_CMR2_SPEED_MIN_INT || val > ICARUS_CMR2_SPEED_MAX_INT) {
  2061. sprintf(replybuf, "invalid clock: '%s' valid range %d-%d",
  2062. setting,
  2063. ICARUS_CMR2_SPEED_MIN_INT,
  2064. ICARUS_CMR2_SPEED_MAX_INT);
  2065. }
  2066. info->cmr2_speed = CMR2_INT_TO_SPEED(val);
  2067. info->speed_next_work = true;
  2068. return NULL;
  2069. }
  2070. sprintf(replybuf, "Unknown option: %s", option);
  2071. return replybuf;
  2072. }
  2073. struct device_drv icarus_drv = {
  2074. .drv_id = DRIVER_icarus,
  2075. .dname = "Icarus",
  2076. .name = "ICA",
  2077. .drv_detect = icarus_detect,
  2078. .hash_work = &hash_driver_work,
  2079. .get_api_stats = icarus_api_stats,
  2080. .get_statline_before = icarus_statline_before,
  2081. .set_device = icarus_set,
  2082. .identify_device = icarus_identify,
  2083. .thread_prepare = icarus_prepare,
  2084. .scanwork = icarus_scanwork,
  2085. .thread_shutdown = icarus_shutdown,
  2086. };