driver-icarus.c 69 KB

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  1. /*
  2. * Copyright 2012-2013 Andrew Smith
  3. * Copyright 2012 Xiangfu <xiangfu@openmobilefree.com>
  4. * Copyright 2013-2015 Con Kolivas <kernel@kolivas.org>
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms of the GNU General Public License as published by the Free
  8. * Software Foundation; either version 3 of the License, or (at your option)
  9. * any later version. See COPYING for more details.
  10. */
  11. /*
  12. * Those code should be works fine with V2 and V3 bitstream of Icarus.
  13. * Operation:
  14. * No detection implement.
  15. * Input: 64B = 32B midstate + 20B fill bytes + last 12 bytes of block head.
  16. * Return: send back 32bits immediately when Icarus found a valid nonce.
  17. * no query protocol implemented here, if no data send back in ~11.3
  18. * seconds (full cover time on 32bit nonce range by 380MH/s speed)
  19. * just send another work.
  20. * Notice:
  21. * 1. Icarus will start calculate when you push a work to them, even they
  22. * are busy.
  23. * 2. The 2 FPGAs on Icarus will distribute the job, one will calculate the
  24. * 0 ~ 7FFFFFFF, another one will cover the 80000000 ~ FFFFFFFF.
  25. * 3. It's possible for 2 FPGAs both find valid nonce in the meantime, the 2
  26. * valid nonce will all be send back.
  27. * 4. Icarus will stop work when: a valid nonce has been found or 32 bits
  28. * nonce range is completely calculated.
  29. */
  30. #include <float.h>
  31. #include <limits.h>
  32. #include <pthread.h>
  33. #include <stdint.h>
  34. #include <stdio.h>
  35. #include <strings.h>
  36. #include <sys/time.h>
  37. #include <unistd.h>
  38. #include <math.h>
  39. #include "config.h"
  40. #include "compat.h"
  41. #include "miner.h"
  42. #include "usbutils.h"
  43. // The serial I/O speed - Linux uses a define 'B115200' in bits/termios.h
  44. #define ICARUS_IO_SPEED 115200
  45. #define ICARUS_BUF_SIZE 8
  46. // The size of a successful nonce read
  47. #define ANT_READ_SIZE 5
  48. #define ICARUS_READ_SIZE 4
  49. #define ROCK_READ_SIZE 8
  50. // Ensure the sizes are correct for the Serial read
  51. #if (ICARUS_READ_SIZE != 4)
  52. #error ICARUS_READ_SIZE must be 4
  53. #endif
  54. #define ASSERT1(condition) __maybe_unused static char sizeof_uint32_t_must_be_4[(condition)?1:-1]
  55. ASSERT1(sizeof(uint32_t) == 4);
  56. // TODO: USB? Different calculation? - see usbstats to work it out e.g. 1/2 of normal send time
  57. // or even use that number? 1/2
  58. // #define ICARUS_READ_TIME(baud) ((double)ICARUS_READ_SIZE * (double)8.0 / (double)(baud))
  59. // maybe 1ms?
  60. #define ICARUS_READ_TIME(baud) (0.001)
  61. // USB ms timeout to wait - user specified timeouts are multiples of this
  62. #define ICA_WAIT_TIMEOUT 100
  63. #define ANT_WAIT_TIMEOUT 10
  64. #define AU3_WAIT_TIMEOUT 1
  65. #define ICARUS_WAIT_TIMEOUT (info->u3 ? AU3_WAIT_TIMEOUT : (info->ant ? ANT_WAIT_TIMEOUT : ICA_WAIT_TIMEOUT))
  66. #define ICARUS_CMR2_TIMEOUT 1
  67. // Defined in multiples of ICARUS_WAIT_TIMEOUT
  68. // Must of course be greater than ICARUS_READ_COUNT_TIMING/ICARUS_WAIT_TIMEOUT
  69. // There's no need to have this bigger, since the overhead/latency of extra work
  70. // is pretty small once you get beyond a 10s nonce range time and 10s also
  71. // means that nothing slower than 429MH/s can go idle so most icarus devices
  72. // will always mine without idling
  73. #define ICARUS_READ_TIME_LIMIT_MAX 100
  74. // In timing mode: Default starting value until an estimate can be obtained
  75. // 5000 ms allows for up to a ~840MH/s device
  76. #define ICARUS_READ_COUNT_TIMING 5000
  77. // Antminer USB is > 1GH/s so use a shorter limit
  78. // 1000 ms allows for up to ~4GH/s device
  79. #define ANTUSB_READ_COUNT_TIMING 1000
  80. #define ANTU3_READ_COUNT_TIMING 100
  81. #define ICARUS_READ_COUNT_MIN ICARUS_WAIT_TIMEOUT
  82. #define SECTOMS(s) ((int)((s) * 1000))
  83. // How many ms below the expected completion time to abort work
  84. // extra in case the last read is delayed
  85. #define ICARUS_READ_REDUCE ((int)(ICARUS_WAIT_TIMEOUT * 1.5))
  86. // For a standard Icarus REV3 (to 5 places)
  87. // Since this rounds up a the last digit - it is a slight overestimate
  88. // Thus the hash rate will be a VERY slight underestimate
  89. // (by a lot less than the displayed accuracy)
  90. // Minor inaccuracy of these numbers doesn't affect the work done,
  91. // only the displayed MH/s
  92. #define ICARUS_REV3_HASH_TIME 0.0000000026316
  93. #define LANCELOT_HASH_TIME 0.0000000025000
  94. #define ASICMINERUSB_HASH_TIME 0.0000000029761
  95. // TODO: What is it?
  96. #define CAIRNSMORE1_HASH_TIME 0.0000000027000
  97. // Per FPGA
  98. #define CAIRNSMORE2_HASH_TIME 0.0000000066600
  99. #define NANOSEC 1000000000.0
  100. #define ANTMINERUSB_HASH_MHZ 0.000000125
  101. #define ANTMINERUSB_HASH_TIME (ANTMINERUSB_HASH_MHZ / (double)(opt_anu_freq))
  102. #define ANTU3_HASH_MHZ 0.0000000032
  103. #define ANTU3_HASH_TIME (ANTU3_HASH_MHZ / (double)(opt_au3_freq))
  104. #define CAIRNSMORE2_INTS 4
  105. // Icarus Rev3 doesn't send a completion message when it finishes
  106. // the full nonce range, so to avoid being idle we must abort the
  107. // work (by starting a new work item) shortly before it finishes
  108. //
  109. // Thus we need to estimate 2 things:
  110. // 1) How many hashes were done if the work was aborted
  111. // 2) How high can the timeout be before the Icarus is idle,
  112. // to minimise the number of work items started
  113. // We set 2) to 'the calculated estimate' - ICARUS_READ_REDUCE
  114. // to ensure the estimate ends before idle
  115. //
  116. // The simple calculation used is:
  117. // Tn = Total time in seconds to calculate n hashes
  118. // Hs = seconds per hash
  119. // Xn = number of hashes
  120. // W = code/usb overhead per work
  121. //
  122. // Rough but reasonable estimate:
  123. // Tn = Hs * Xn + W (of the form y = mx + b)
  124. //
  125. // Thus:
  126. // Line of best fit (using least squares)
  127. //
  128. // Hs = (n*Sum(XiTi)-Sum(Xi)*Sum(Ti))/(n*Sum(Xi^2)-Sum(Xi)^2)
  129. // W = Sum(Ti)/n - (Hs*Sum(Xi))/n
  130. //
  131. // N.B. W is less when aborting work since we aren't waiting for the reply
  132. // to be transferred back (ICARUS_READ_TIME)
  133. // Calculating the hashes aborted at n seconds is thus just n/Hs
  134. // (though this is still a slight overestimate due to code delays)
  135. //
  136. // Both below must be exceeded to complete a set of data
  137. // Minimum how long after the first, the last data point must be
  138. #define HISTORY_SEC 60
  139. // Minimum how many points a single ICARUS_HISTORY should have
  140. #define MIN_DATA_COUNT 5
  141. // The value MIN_DATA_COUNT used is doubled each history until it exceeds:
  142. #define MAX_MIN_DATA_COUNT 100
  143. static struct timeval history_sec = { HISTORY_SEC, 0 };
  144. // Store the last INFO_HISTORY data sets
  145. // [0] = current data, not yet ready to be included as an estimate
  146. // Each new data set throws the last old set off the end thus
  147. // keeping a ongoing average of recent data
  148. #define INFO_HISTORY 10
  149. struct ICARUS_HISTORY {
  150. struct timeval finish;
  151. double sumXiTi;
  152. double sumXi;
  153. double sumTi;
  154. double sumXi2;
  155. uint32_t values;
  156. uint32_t hash_count_min;
  157. uint32_t hash_count_max;
  158. };
  159. enum timing_mode { MODE_DEFAULT, MODE_SHORT, MODE_LONG, MODE_VALUE };
  160. static const char *MODE_DEFAULT_STR = "default";
  161. static const char *MODE_SHORT_STR = "short";
  162. static const char *MODE_SHORT_STREQ = "short=";
  163. static const char *MODE_LONG_STR = "long";
  164. static const char *MODE_LONG_STREQ = "long=";
  165. static const char *MODE_VALUE_STR = "value";
  166. static const char *MODE_UNKNOWN_STR = "unknown";
  167. #define MAX_DEVICE_NUM 100
  168. #define MAX_WORK_BUFFER_SIZE 2
  169. #define MAX_CHIP_NUM 24
  170. // Set it to 3, 5 or 9
  171. #define NONCE_CORRECTION_TIMES 5
  172. #define MAX_TRIES 4
  173. #define RM_CMD_MASK 0x0F
  174. #define RM_STATUS_MASK 0xF0
  175. #define RM_CHIP_MASK 0x3F
  176. #define RM_PRODUCT_MASK 0xC0
  177. #define RM_PRODUCT_RBOX 0x00
  178. #define RM_PRODUCT_T1 0x40
  179. #define RM_PRODUCT_T2 0x80
  180. #define RM_PRODUCT_TEST 0xC0
  181. #if (NONCE_CORRECTION_TIMES == 5)
  182. static int32_t rbox_corr_values[] = {0, 1, -1, -2, -4};
  183. #endif
  184. #if (NONCE_CORRECTION_TIMES == 9)
  185. static int32_t rbox_corr_values[] = {0, 1, -1, 2, -2, 3, -3, 4, -4};
  186. #endif
  187. #if (NONCE_CORRECTION_TIMES == 3)
  188. static int32_t rbox_corr_values[] = {0, 1, -1};
  189. #endif
  190. #define ANT_QUEUE_NUM 36
  191. typedef enum {
  192. NONCE_DATA1_OFFSET = 0,
  193. NONCE_DATA2_OFFSET,
  194. NONCE_DATA3_OFFSET,
  195. NONCE_DATA4_OFFSET,
  196. NONCE_TASK_CMD_OFFSET,
  197. NONCE_CHIP_NO_OFFSET,
  198. NONCE_TASK_NO_OFFSET,
  199. NONCE_COMMAND_OFFSET,
  200. NONCE_MAX_OFFSET
  201. } NONCE_OFFSET;
  202. typedef enum {
  203. NONCE_DATA_CMD = 0,
  204. NONCE_TASK_COMPLETE_CMD,
  205. NONCE_GET_TASK_CMD,
  206. } NONCE_COMMAND;
  207. typedef struct nonce_data {
  208. int chip_no;
  209. unsigned int task_no ;
  210. unsigned char work_state;
  211. int cmd_value;
  212. } NONCE_DATA;
  213. typedef enum {
  214. ROCKMINER_RBOX = 0,
  215. ROCKMINER_T1,
  216. ROCKMINER_T2,
  217. ROCKMINER_MAX
  218. } ROCKMINER_PRODUCT_T;
  219. typedef struct rockminer_chip_info {
  220. unsigned char freq;
  221. int error_cnt;
  222. time_t last_received_task_complete_time;
  223. } ROCKMINER_CHIP_INFO;
  224. typedef struct rockminer_device_info {
  225. unsigned char detect_chip_no;
  226. unsigned char chip_max;
  227. unsigned char product_id;
  228. float min_frq;
  229. float def_frq;
  230. float max_frq;
  231. ROCKMINER_CHIP_INFO chip[MAX_CHIP_NUM];
  232. time_t dev_detect_time;
  233. } ROCKMINER_DEVICE_INFO;
  234. struct ICARUS_INFO {
  235. enum sub_ident ident;
  236. int intinfo;
  237. // time to calculate the golden_ob
  238. uint64_t golden_hashes;
  239. struct timeval golden_tv;
  240. struct ICARUS_HISTORY history[INFO_HISTORY+1];
  241. uint32_t min_data_count;
  242. int timeout;
  243. // seconds per Hash
  244. double Hs;
  245. // ms til we abort
  246. int read_time;
  247. // ms limit for (short=/long=) read_time
  248. int read_time_limit;
  249. // How long without hashes is considered a failed device
  250. int fail_time;
  251. enum timing_mode timing_mode;
  252. bool do_icarus_timing;
  253. double fullnonce;
  254. int count;
  255. double W;
  256. uint32_t values;
  257. uint64_t hash_count_range;
  258. // Determine the cost of history processing
  259. // (which will only affect W)
  260. uint64_t history_count;
  261. struct timeval history_time;
  262. // icarus-options
  263. int baud;
  264. int work_division;
  265. int fpga_count;
  266. uint32_t nonce_mask;
  267. uint8_t cmr2_speed;
  268. bool speed_next_work;
  269. bool flash_next_work;
  270. int nonce_size;
  271. bool failing;
  272. pthread_mutex_t lock;
  273. ROCKMINER_DEVICE_INFO rmdev;
  274. struct work *base_work; // For when we roll work
  275. struct work *g_work[MAX_CHIP_NUM][MAX_WORK_BUFFER_SIZE];
  276. uint32_t last_nonce[MAX_CHIP_NUM][MAX_WORK_BUFFER_SIZE];
  277. char rock_init[64];
  278. uint64_t nonces_checked;
  279. uint64_t nonces_correction_times;
  280. uint64_t nonces_correction_tests;
  281. uint64_t nonces_fail;
  282. uint64_t nonces_correction[NONCE_CORRECTION_TIMES];
  283. struct work **antworks;
  284. int nonces;
  285. int workid;
  286. bool ant;
  287. bool u3;
  288. };
  289. #define ICARUS_MIDSTATE_SIZE 32
  290. #define ICARUS_UNUSED_SIZE 16
  291. #define ICARUS_WORK_SIZE 12
  292. #define ICARUS_WORK_DATA_OFFSET 64
  293. #define ICARUS_CMR2_SPEED_FACTOR 2.5
  294. #define ICARUS_CMR2_SPEED_MIN_INT 100
  295. #define ICARUS_CMR2_SPEED_DEF_INT 180
  296. #define ICARUS_CMR2_SPEED_MAX_INT 220
  297. #define CMR2_INT_TO_SPEED(_speed) ((uint8_t)((float)_speed / ICARUS_CMR2_SPEED_FACTOR))
  298. #define ICARUS_CMR2_SPEED_MIN CMR2_INT_TO_SPEED(ICARUS_CMR2_SPEED_MIN_INT)
  299. #define ICARUS_CMR2_SPEED_DEF CMR2_INT_TO_SPEED(ICARUS_CMR2_SPEED_DEF_INT)
  300. #define ICARUS_CMR2_SPEED_MAX CMR2_INT_TO_SPEED(ICARUS_CMR2_SPEED_MAX_INT)
  301. #define ICARUS_CMR2_SPEED_INC 1
  302. #define ICARUS_CMR2_SPEED_DEC -1
  303. #define ICARUS_CMR2_SPEED_FAIL -10
  304. #define ICARUS_CMR2_PREFIX ((uint8_t)0xB7)
  305. #define ICARUS_CMR2_CMD_SPEED ((uint8_t)0)
  306. #define ICARUS_CMR2_CMD_FLASH ((uint8_t)1)
  307. #define ICARUS_CMR2_DATA_FLASH_OFF ((uint8_t)0)
  308. #define ICARUS_CMR2_DATA_FLASH_ON ((uint8_t)1)
  309. #define ICARUS_CMR2_CHECK ((uint8_t)0x6D)
  310. #define ANT_UNUSED_SIZE 15
  311. struct ICARUS_WORK {
  312. uint8_t midstate[ICARUS_MIDSTATE_SIZE];
  313. // These 4 bytes are for CMR2 bitstreams that handle MHz adjustment
  314. uint8_t check;
  315. uint8_t data;
  316. uint8_t cmd;
  317. uint8_t prefix;
  318. uint8_t unused[ANT_UNUSED_SIZE];
  319. uint8_t id; // Used only by ANT, otherwise unused by other icarus
  320. uint8_t work[ICARUS_WORK_SIZE];
  321. };
  322. #define ANT_U1_DEFFREQ 200
  323. #define ANT_U3_DEFFREQ 225
  324. #define ANT_U3_MAXFREQ 250
  325. struct {
  326. float freq;
  327. uint16_t hex;
  328. } u3freqtable[] = {
  329. { 100, 0x0783 },
  330. { 125, 0x0983 },
  331. { 150, 0x0b83 },
  332. { 175, 0x0d83 },
  333. { 193.75, 0x0f03 },
  334. { 196.88, 0x1f07 },
  335. { 200, 0x0782 },
  336. { 206.25, 0x1006 },
  337. { 212.5, 0x1086 },
  338. { 218.75, 0x1106 },
  339. { 225, 0x0882 },
  340. { 237.5, 0x1286 },
  341. { 243.75, 0x1306 },
  342. { 250, 0x0982 },
  343. };
  344. #define END_CONDITION 0x0000ffff
  345. // Looking for options in --icarus-timing and --icarus-options:
  346. //
  347. // Code increments this each time we start to look at a device
  348. // However, this means that if other devices are checked by
  349. // the Icarus code (e.g. Avalon only as at 20130517)
  350. // they will count in the option offset
  351. //
  352. // This, however, is deterministic so that's OK
  353. //
  354. // If we were to increment after successfully finding an Icarus
  355. // that would be random since an Icarus may fail and thus we'd
  356. // not be able to predict the option order
  357. //
  358. // Devices are checked in the order libusb finds them which is ?
  359. //
  360. static int option_offset = -1;
  361. /*
  362. #define ICA_BUFSIZ (0x200)
  363. static void transfer_read(struct cgpu_info *icarus, uint8_t request_type, uint8_t bRequest, uint16_t wValue, uint16_t wIndex, char *buf, int bufsiz, int *amount, enum usb_cmds cmd)
  364. {
  365. int err;
  366. err = usb_transfer_read(icarus, request_type, bRequest, wValue, wIndex, buf, bufsiz, amount, cmd);
  367. applog(LOG_DEBUG, "%s: cgid %d %s got err %d",
  368. icarus->drv->name, icarus->cgminer_id,
  369. usb_cmdname(cmd), err);
  370. }
  371. */
  372. static void _transfer(struct cgpu_info *icarus, uint8_t request_type, uint8_t bRequest, uint16_t wValue, uint16_t wIndex, uint32_t *data, int siz, enum usb_cmds cmd)
  373. {
  374. int err;
  375. err = usb_transfer_data(icarus, request_type, bRequest, wValue, wIndex, data, siz, cmd);
  376. applog(LOG_DEBUG, "%s: cgid %d %s got err %d",
  377. icarus->drv->name, icarus->cgminer_id,
  378. usb_cmdname(cmd), err);
  379. }
  380. #define transfer(icarus, request_type, bRequest, wValue, wIndex, cmd) \
  381. _transfer(icarus, request_type, bRequest, wValue, wIndex, NULL, 0, cmd)
  382. static void icarus_initialise(struct cgpu_info *icarus, int baud)
  383. {
  384. struct ICARUS_INFO *info = (struct ICARUS_INFO *)(icarus->device_data);
  385. uint16_t wValue, wIndex;
  386. enum sub_ident ident;
  387. int interface;
  388. if (icarus->usbinfo.nodev)
  389. return;
  390. interface = _usb_interface(icarus, info->intinfo);
  391. ident = usb_ident(icarus);
  392. switch (ident) {
  393. case IDENT_BLT:
  394. case IDENT_LLT:
  395. case IDENT_CMR1:
  396. case IDENT_CMR2:
  397. // Reset
  398. transfer(icarus, FTDI_TYPE_OUT, FTDI_REQUEST_RESET, FTDI_VALUE_RESET,
  399. interface, C_RESET);
  400. if (icarus->usbinfo.nodev)
  401. return;
  402. // Latency
  403. _usb_ftdi_set_latency(icarus, info->intinfo);
  404. if (icarus->usbinfo.nodev)
  405. return;
  406. // Set data control
  407. transfer(icarus, FTDI_TYPE_OUT, FTDI_REQUEST_DATA, FTDI_VALUE_DATA_BLT,
  408. interface, C_SETDATA);
  409. if (icarus->usbinfo.nodev)
  410. return;
  411. // default to BLT/LLT 115200
  412. wValue = FTDI_VALUE_BAUD_BLT;
  413. wIndex = FTDI_INDEX_BAUD_BLT;
  414. if (ident == IDENT_CMR1 || ident == IDENT_CMR2) {
  415. switch (baud) {
  416. case 115200:
  417. wValue = FTDI_VALUE_BAUD_CMR_115;
  418. wIndex = FTDI_INDEX_BAUD_CMR_115;
  419. break;
  420. case 57600:
  421. wValue = FTDI_VALUE_BAUD_CMR_57;
  422. wIndex = FTDI_INDEX_BAUD_CMR_57;
  423. break;
  424. default:
  425. quit(1, "icarus_intialise() invalid baud (%d) for Cairnsmore1", baud);
  426. break;
  427. }
  428. }
  429. // Set the baud
  430. transfer(icarus, FTDI_TYPE_OUT, FTDI_REQUEST_BAUD, wValue,
  431. (wIndex & 0xff00) | interface, C_SETBAUD);
  432. if (icarus->usbinfo.nodev)
  433. return;
  434. // Set Modem Control
  435. transfer(icarus, FTDI_TYPE_OUT, FTDI_REQUEST_MODEM, FTDI_VALUE_MODEM,
  436. interface, C_SETMODEM);
  437. if (icarus->usbinfo.nodev)
  438. return;
  439. // Set Flow Control
  440. transfer(icarus, FTDI_TYPE_OUT, FTDI_REQUEST_FLOW, FTDI_VALUE_FLOW,
  441. interface, C_SETFLOW);
  442. if (icarus->usbinfo.nodev)
  443. return;
  444. // Clear any sent data
  445. transfer(icarus, FTDI_TYPE_OUT, FTDI_REQUEST_RESET, FTDI_VALUE_PURGE_TX,
  446. interface, C_PURGETX);
  447. if (icarus->usbinfo.nodev)
  448. return;
  449. // Clear any received data
  450. transfer(icarus, FTDI_TYPE_OUT, FTDI_REQUEST_RESET, FTDI_VALUE_PURGE_RX,
  451. interface, C_PURGERX);
  452. break;
  453. case IDENT_ICA:
  454. // Set Data Control
  455. transfer(icarus, PL2303_CTRL_OUT, PL2303_REQUEST_CTRL, PL2303_VALUE_CTRL,
  456. interface, C_SETDATA);
  457. if (icarus->usbinfo.nodev)
  458. return;
  459. // Set Line Control
  460. uint32_t ica_data[2] = { PL2303_VALUE_LINE0, PL2303_VALUE_LINE1 };
  461. _transfer(icarus, PL2303_CTRL_OUT, PL2303_REQUEST_LINE, PL2303_VALUE_LINE,
  462. interface, &ica_data[0], PL2303_VALUE_LINE_SIZE, C_SETLINE);
  463. if (icarus->usbinfo.nodev)
  464. return;
  465. // Vendor
  466. transfer(icarus, PL2303_VENDOR_OUT, PL2303_REQUEST_VENDOR, PL2303_VALUE_VENDOR,
  467. interface, C_VENDOR);
  468. break;
  469. case IDENT_AMU:
  470. case IDENT_ANU:
  471. case IDENT_AU3:
  472. case IDENT_LIN:
  473. // Enable the UART
  474. transfer(icarus, CP210X_TYPE_OUT, CP210X_REQUEST_IFC_ENABLE,
  475. CP210X_VALUE_UART_ENABLE,
  476. interface, C_ENABLE_UART);
  477. if (icarus->usbinfo.nodev)
  478. return;
  479. // Set data control
  480. transfer(icarus, CP210X_TYPE_OUT, CP210X_REQUEST_DATA, CP210X_VALUE_DATA,
  481. interface, C_SETDATA);
  482. if (icarus->usbinfo.nodev)
  483. return;
  484. // Set the baud
  485. uint32_t data = CP210X_DATA_BAUD;
  486. _transfer(icarus, CP210X_TYPE_OUT, CP210X_REQUEST_BAUD, 0,
  487. interface, &data, sizeof(data), C_SETBAUD);
  488. break;
  489. case IDENT_AVA:
  490. break;
  491. default:
  492. quit(1, "icarus_intialise() called with invalid %s cgid %i ident=%d",
  493. icarus->drv->name, icarus->cgminer_id, ident);
  494. }
  495. }
  496. static void rev(unsigned char *s, size_t l)
  497. {
  498. size_t i, j;
  499. unsigned char t;
  500. for (i = 0, j = l - 1; i < j; i++, j--) {
  501. t = s[i];
  502. s[i] = s[j];
  503. s[j] = t;
  504. }
  505. }
  506. #define ICA_NONCE_ERROR -1
  507. #define ICA_NONCE_OK 0
  508. #define ICA_NONCE_RESTART 1
  509. #define ICA_NONCE_TIMEOUT 2
  510. static int icarus_get_nonce(struct cgpu_info *icarus, unsigned char *buf, struct timeval *tv_start,
  511. struct timeval *tv_finish, struct thr_info *thr, int read_time)
  512. {
  513. struct ICARUS_INFO *info = (struct ICARUS_INFO *)(icarus->device_data);
  514. int err, amt, rc;
  515. if (icarus->usbinfo.nodev)
  516. return ICA_NONCE_ERROR;
  517. cgtime(tv_start);
  518. err = usb_read_ii_timeout_cancellable(icarus, info->intinfo, (char *)buf,
  519. info->nonce_size, &amt, read_time,
  520. C_GETRESULTS);
  521. cgtime(tv_finish);
  522. if (err < 0 && err != LIBUSB_ERROR_TIMEOUT) {
  523. applog(LOG_ERR, "%s %i: Comms error (rerr=%d amt=%d)", icarus->drv->name,
  524. icarus->device_id, err, amt);
  525. dev_error(icarus, REASON_DEV_COMMS_ERROR);
  526. return ICA_NONCE_ERROR;
  527. }
  528. if (amt >= info->nonce_size)
  529. return ICA_NONCE_OK;
  530. rc = SECTOMS(tdiff(tv_finish, tv_start));
  531. if (thr && thr->work_restart) {
  532. applog(LOG_DEBUG, "Icarus Read: Work restart at %d ms", rc);
  533. return ICA_NONCE_RESTART;
  534. }
  535. if (amt > 0)
  536. applog(LOG_DEBUG, "Icarus Read: Timeout reading for %d ms", rc);
  537. else
  538. applog(LOG_DEBUG, "Icarus Read: No data for %d ms", rc);
  539. return ICA_NONCE_TIMEOUT;
  540. }
  541. static const char *timing_mode_str(enum timing_mode timing_mode)
  542. {
  543. switch(timing_mode) {
  544. case MODE_DEFAULT:
  545. return MODE_DEFAULT_STR;
  546. case MODE_SHORT:
  547. return MODE_SHORT_STR;
  548. case MODE_LONG:
  549. return MODE_LONG_STR;
  550. case MODE_VALUE:
  551. return MODE_VALUE_STR;
  552. default:
  553. return MODE_UNKNOWN_STR;
  554. }
  555. }
  556. static void set_timing_mode(int this_option_offset, struct cgpu_info *icarus)
  557. {
  558. struct ICARUS_INFO *info = (struct ICARUS_INFO *)(icarus->device_data);
  559. int read_count_timing = 0;
  560. enum sub_ident ident;
  561. double Hs, fail_time;
  562. char buf[BUFSIZ+1];
  563. char *ptr, *comma, *eq;
  564. size_t max;
  565. int i;
  566. if (opt_icarus_timing == NULL)
  567. buf[0] = '\0';
  568. else {
  569. ptr = opt_icarus_timing;
  570. for (i = 0; i < this_option_offset; i++) {
  571. comma = strchr(ptr, ',');
  572. if (comma == NULL)
  573. break;
  574. ptr = comma + 1;
  575. }
  576. comma = strchr(ptr, ',');
  577. if (comma == NULL)
  578. max = strlen(ptr);
  579. else
  580. max = comma - ptr;
  581. if (max > BUFSIZ)
  582. max = BUFSIZ;
  583. strncpy(buf, ptr, max);
  584. buf[max] = '\0';
  585. }
  586. ident = usb_ident(icarus);
  587. switch (ident) {
  588. case IDENT_ICA:
  589. case IDENT_AVA:
  590. info->Hs = ICARUS_REV3_HASH_TIME;
  591. read_count_timing = ICARUS_READ_COUNT_TIMING;
  592. break;
  593. case IDENT_BLT:
  594. case IDENT_LLT:
  595. info->Hs = LANCELOT_HASH_TIME;
  596. read_count_timing = ICARUS_READ_COUNT_TIMING;
  597. break;
  598. case IDENT_AMU:
  599. info->Hs = ASICMINERUSB_HASH_TIME;
  600. read_count_timing = ICARUS_READ_COUNT_TIMING;
  601. break;
  602. case IDENT_CMR1:
  603. info->Hs = CAIRNSMORE1_HASH_TIME;
  604. read_count_timing = ICARUS_READ_COUNT_TIMING;
  605. break;
  606. case IDENT_CMR2:
  607. info->Hs = CAIRNSMORE2_HASH_TIME;
  608. read_count_timing = ICARUS_READ_COUNT_TIMING;
  609. break;
  610. case IDENT_ANU:
  611. info->Hs = ANTMINERUSB_HASH_TIME;
  612. read_count_timing = ANTUSB_READ_COUNT_TIMING;
  613. break;
  614. case IDENT_AU3:
  615. info->Hs = ANTU3_HASH_TIME;
  616. read_count_timing = ANTU3_READ_COUNT_TIMING;
  617. break;
  618. default:
  619. quit(1, "Icarus get_options() called with invalid %s ident=%d",
  620. icarus->drv->name, ident);
  621. }
  622. info->read_time = 0;
  623. info->read_time_limit = 0; // 0 = no limit
  624. if (strcasecmp(buf, MODE_SHORT_STR) == 0) {
  625. // short
  626. info->read_time = read_count_timing;
  627. info->timing_mode = MODE_SHORT;
  628. info->do_icarus_timing = true;
  629. } else if (strncasecmp(buf, MODE_SHORT_STREQ, strlen(MODE_SHORT_STREQ)) == 0) {
  630. // short=limit
  631. info->read_time = read_count_timing;
  632. info->timing_mode = MODE_SHORT;
  633. info->do_icarus_timing = true;
  634. info->read_time_limit = atoi(&buf[strlen(MODE_SHORT_STREQ)]);
  635. if (info->read_time_limit < 0)
  636. info->read_time_limit = 0;
  637. if (info->read_time_limit > ICARUS_READ_TIME_LIMIT_MAX)
  638. info->read_time_limit = ICARUS_READ_TIME_LIMIT_MAX;
  639. } else if (strcasecmp(buf, MODE_LONG_STR) == 0) {
  640. // long
  641. info->read_time = read_count_timing;
  642. info->timing_mode = MODE_LONG;
  643. info->do_icarus_timing = true;
  644. } else if (strncasecmp(buf, MODE_LONG_STREQ, strlen(MODE_LONG_STREQ)) == 0) {
  645. // long=limit
  646. info->read_time = read_count_timing;
  647. info->timing_mode = MODE_LONG;
  648. info->do_icarus_timing = true;
  649. info->read_time_limit = atoi(&buf[strlen(MODE_LONG_STREQ)]);
  650. if (info->read_time_limit < 0)
  651. info->read_time_limit = 0;
  652. if (info->read_time_limit > ICARUS_READ_TIME_LIMIT_MAX)
  653. info->read_time_limit = ICARUS_READ_TIME_LIMIT_MAX;
  654. } else if ((Hs = atof(buf)) != 0) {
  655. // ns[=read_time]
  656. info->Hs = Hs / NANOSEC;
  657. info->fullnonce = info->Hs * (((double)0xffffffff) + 1);
  658. if ((eq = strchr(buf, '=')) != NULL)
  659. info->read_time = atoi(eq+1) * ICARUS_WAIT_TIMEOUT;
  660. if (info->read_time < ICARUS_READ_COUNT_MIN)
  661. info->read_time = SECTOMS(info->fullnonce) - ICARUS_READ_REDUCE;
  662. if (unlikely(info->read_time < ICARUS_READ_COUNT_MIN))
  663. info->read_time = ICARUS_READ_COUNT_MIN;
  664. info->timing_mode = MODE_VALUE;
  665. info->do_icarus_timing = false;
  666. } else {
  667. // Anything else in buf just uses DEFAULT mode
  668. info->fullnonce = info->Hs * (((double)0xffffffff) + 1);
  669. if ((eq = strchr(buf, '=')) != NULL)
  670. info->read_time = atoi(eq+1) * ICARUS_WAIT_TIMEOUT;
  671. if (info->read_time < ICARUS_READ_COUNT_MIN)
  672. info->read_time = SECTOMS(info->fullnonce) - ICARUS_READ_REDUCE;
  673. if (unlikely(info->read_time < ICARUS_READ_COUNT_MIN))
  674. info->read_time = ICARUS_READ_COUNT_MIN;
  675. info->timing_mode = MODE_DEFAULT;
  676. info->do_icarus_timing = false;
  677. }
  678. info->min_data_count = MIN_DATA_COUNT;
  679. // All values are in multiples of ICARUS_WAIT_TIMEOUT
  680. info->read_time_limit *= ICARUS_WAIT_TIMEOUT;
  681. applog(LOG_DEBUG, "%s: cgid %d Init: mode=%s read_time=%dms limit=%dms Hs=%e",
  682. icarus->drv->name, icarus->cgminer_id,
  683. timing_mode_str(info->timing_mode),
  684. info->read_time, info->read_time_limit, info->Hs);
  685. /* Set the time to detect a dead device to 30 full nonce ranges. */
  686. fail_time = info->Hs * 0xffffffffull * 30.0;
  687. /* Integer accuracy is definitely enough. */
  688. info->fail_time = fail_time + 1;
  689. }
  690. static uint32_t mask(int work_division)
  691. {
  692. uint32_t nonce_mask = 0x7fffffff;
  693. // yes we can calculate these, but this way it's easy to see what they are
  694. switch (work_division) {
  695. case 1:
  696. nonce_mask = 0xffffffff;
  697. break;
  698. case 2:
  699. nonce_mask = 0x7fffffff;
  700. break;
  701. case 4:
  702. nonce_mask = 0x3fffffff;
  703. break;
  704. case 8:
  705. nonce_mask = 0x1fffffff;
  706. break;
  707. default:
  708. quit(1, "Invalid2 icarus-options for work_division (%d) must be 1, 2, 4 or 8", work_division);
  709. }
  710. return nonce_mask;
  711. }
  712. static void get_options(int this_option_offset, struct cgpu_info *icarus, int *baud, int *work_division, int *fpga_count)
  713. {
  714. char buf[BUFSIZ+1];
  715. char *ptr, *comma, *colon, *colon2;
  716. enum sub_ident ident;
  717. size_t max;
  718. int i, tmp;
  719. if (opt_icarus_options == NULL)
  720. buf[0] = '\0';
  721. else {
  722. ptr = opt_icarus_options;
  723. for (i = 0; i < this_option_offset; i++) {
  724. comma = strchr(ptr, ',');
  725. if (comma == NULL)
  726. break;
  727. ptr = comma + 1;
  728. }
  729. comma = strchr(ptr, ',');
  730. if (comma == NULL)
  731. max = strlen(ptr);
  732. else
  733. max = comma - ptr;
  734. if (max > BUFSIZ)
  735. max = BUFSIZ;
  736. strncpy(buf, ptr, max);
  737. buf[max] = '\0';
  738. }
  739. ident = usb_ident(icarus);
  740. switch (ident) {
  741. case IDENT_ICA:
  742. case IDENT_BLT:
  743. case IDENT_LLT:
  744. case IDENT_AVA:
  745. *baud = ICARUS_IO_SPEED;
  746. *work_division = 2;
  747. *fpga_count = 2;
  748. break;
  749. case IDENT_AMU:
  750. case IDENT_ANU:
  751. case IDENT_AU3:
  752. *baud = ICARUS_IO_SPEED;
  753. *work_division = 1;
  754. *fpga_count = 1;
  755. break;
  756. case IDENT_CMR1:
  757. *baud = ICARUS_IO_SPEED;
  758. *work_division = 2;
  759. *fpga_count = 2;
  760. break;
  761. case IDENT_CMR2:
  762. *baud = ICARUS_IO_SPEED;
  763. *work_division = 1;
  764. *fpga_count = 1;
  765. break;
  766. default:
  767. quit(1, "Icarus get_options() called with invalid %s ident=%d",
  768. icarus->drv->name, ident);
  769. }
  770. if (*buf) {
  771. colon = strchr(buf, ':');
  772. if (colon)
  773. *(colon++) = '\0';
  774. if (*buf) {
  775. tmp = atoi(buf);
  776. switch (tmp) {
  777. case 115200:
  778. *baud = 115200;
  779. break;
  780. case 57600:
  781. *baud = 57600;
  782. break;
  783. default:
  784. quit(1, "Invalid icarus-options for baud (%s) must be 115200 or 57600", buf);
  785. }
  786. }
  787. if (colon && *colon) {
  788. colon2 = strchr(colon, ':');
  789. if (colon2)
  790. *(colon2++) = '\0';
  791. if (*colon) {
  792. tmp = atoi(colon);
  793. if (tmp == 1 || tmp == 2 || tmp == 4 || tmp == 8) {
  794. *work_division = tmp;
  795. *fpga_count = tmp; // default to the same
  796. } else {
  797. quit(1, "Invalid icarus-options for work_division (%s) must be 1, 2, 4 or 8", colon);
  798. }
  799. }
  800. if (colon2 && *colon2) {
  801. tmp = atoi(colon2);
  802. if (tmp > 0 && tmp <= *work_division)
  803. *fpga_count = tmp;
  804. else {
  805. quit(1, "Invalid icarus-options for fpga_count (%s) must be >0 and <=work_division (%d)", colon2, *work_division);
  806. }
  807. }
  808. }
  809. }
  810. }
  811. unsigned char crc5(unsigned char *ptr, unsigned char len)
  812. {
  813. unsigned char i, j, k;
  814. unsigned char crc = 0x1f;
  815. unsigned char crcin[5] = {1, 1, 1, 1, 1};
  816. unsigned char crcout[5] = {1, 1, 1, 1, 1};
  817. unsigned char din = 0;
  818. j = 0x80;
  819. k = 0;
  820. for (i = 0; i < len; i++) {
  821. if (*ptr & j)
  822. din = 1;
  823. else
  824. din = 0;
  825. crcout[0] = crcin[4] ^ din;
  826. crcout[1] = crcin[0];
  827. crcout[2] = crcin[1] ^ crcin[4] ^ din;
  828. crcout[3] = crcin[2];
  829. crcout[4] = crcin[3];
  830. j = j >> 1;
  831. k++;
  832. if (k == 8) {
  833. j = 0x80;
  834. k = 0;
  835. ptr++;
  836. }
  837. memcpy(crcin, crcout, 5);
  838. }
  839. crc = 0;
  840. if (crcin[4])
  841. crc |= 0x10;
  842. if (crcin[3])
  843. crc |= 0x08;
  844. if (crcin[2])
  845. crc |= 0x04;
  846. if (crcin[1])
  847. crc |= 0x02;
  848. if (crcin[0])
  849. crc |= 0x01;
  850. return crc;
  851. }
  852. static uint16_t anu_find_freqhex(void)
  853. {
  854. float fout, best_fout = opt_anu_freq;
  855. int od, nf, nr, no, n, m, bs;
  856. uint16_t anu_freq_hex = 0;
  857. float best_diff = 1000;
  858. if (!best_fout)
  859. best_fout = ANT_U1_DEFFREQ;
  860. for (od = 0; od < 4; od++) {
  861. no = 1 << od;
  862. for (n = 0; n < 16; n++) {
  863. nr = n + 1;
  864. for (m = 0; m < 64; m++) {
  865. nf = m + 1;
  866. fout = 25 * (float)nf /((float)(nr) * (float)(no));
  867. if (fabsf(fout - opt_anu_freq) > best_diff)
  868. continue;
  869. if (500 <= (fout * no) && (fout * no) <= 1000)
  870. bs = 1;
  871. else
  872. bs = 0;
  873. best_diff = fabsf(fout - opt_anu_freq);
  874. best_fout = fout;
  875. anu_freq_hex = (bs << 14) | (m << 7) | (n << 2) | od;
  876. if (fout == opt_anu_freq) {
  877. applog(LOG_DEBUG, "ANU found exact frequency %.1f with hex %04x",
  878. opt_anu_freq, anu_freq_hex);
  879. goto out;
  880. }
  881. }
  882. }
  883. }
  884. applog(LOG_NOTICE, "ANU found nearest frequency %.1f with hex %04x", best_fout,
  885. anu_freq_hex);
  886. out:
  887. return anu_freq_hex;
  888. }
  889. static uint16_t anu3_find_freqhex(void)
  890. {
  891. int i = 0, freq = opt_au3_freq, u3freq;
  892. uint16_t anu_freq_hex = 0x0882;
  893. if (!freq)
  894. freq = ANT_U3_DEFFREQ;
  895. do {
  896. u3freq = u3freqtable[i].freq;
  897. if (u3freq <= freq)
  898. anu_freq_hex = u3freqtable[i].hex;
  899. i++;
  900. } while (u3freq < ANT_U3_MAXFREQ);
  901. return anu_freq_hex;
  902. }
  903. static bool set_anu_freq(struct cgpu_info *icarus, struct ICARUS_INFO *info, uint16_t anu_freq_hex)
  904. {
  905. unsigned char cmd_buf[4], rdreg_buf[4];
  906. int amount, err;
  907. char buf[512];
  908. if (!anu_freq_hex)
  909. anu_freq_hex = anu_find_freqhex();
  910. memset(cmd_buf, 0, 4);
  911. memset(rdreg_buf, 0, 4);
  912. cmd_buf[0] = 2 | 0x80;
  913. cmd_buf[1] = (anu_freq_hex & 0xff00u) >> 8;
  914. cmd_buf[2] = (anu_freq_hex & 0x00ffu);
  915. cmd_buf[3] = crc5(cmd_buf, 27);
  916. rdreg_buf[0] = 4 | 0x80;
  917. rdreg_buf[1] = 0; //16-23
  918. rdreg_buf[2] = 0x04; //8-15
  919. rdreg_buf[3] = crc5(rdreg_buf, 27);
  920. applog(LOG_DEBUG, "%s %i: Send frequency %02x%02x%02x%02x", icarus->drv->name, icarus->device_id,
  921. cmd_buf[0], cmd_buf[1], cmd_buf[2], cmd_buf[3]);
  922. err = usb_write_ii(icarus, info->intinfo, (char *)cmd_buf, 4, &amount, C_ANU_SEND_CMD);
  923. if (err != LIBUSB_SUCCESS || amount != 4) {
  924. applog(LOG_ERR, "%s %i: Write freq Comms error (werr=%d amount=%d)",
  925. icarus->drv->name, icarus->device_id, err, amount);
  926. return false;
  927. }
  928. err = usb_read_ii_timeout(icarus, info->intinfo, buf, 512, &amount, 100, C_GETRESULTS);
  929. if (err < 0 && err != LIBUSB_ERROR_TIMEOUT) {
  930. applog(LOG_ERR, "%s %i: Read freq Comms error (rerr=%d amount=%d)",
  931. icarus->drv->name, icarus->device_id, err, amount);
  932. return false;
  933. }
  934. applog(LOG_DEBUG, "%s %i: Send freq getstatus %02x%02x%02x%02x", icarus->drv->name, icarus->device_id,
  935. rdreg_buf[0], rdreg_buf[1], rdreg_buf[2], rdreg_buf[3]);
  936. err = usb_write_ii(icarus, info->intinfo, (char *)cmd_buf, 4, &amount, C_ANU_SEND_RDREG);
  937. if (err != LIBUSB_SUCCESS || amount != 4) {
  938. applog(LOG_ERR, "%s %i: Write freq Comms error (werr=%d amount=%d)",
  939. icarus->drv->name, icarus->device_id, err, amount);
  940. return false;
  941. }
  942. err = usb_read_ii_timeout(icarus, info->intinfo, buf, 512, &amount, 100, C_GETRESULTS);
  943. if (err < 0 && err != LIBUSB_ERROR_TIMEOUT) {
  944. applog(LOG_ERR, "%s %i: Read freq Comms error (rerr=%d amount=%d)",
  945. icarus->drv->name, icarus->device_id, err, amount);
  946. return false;
  947. }
  948. return true;
  949. }
  950. static void set_anu_volt(struct cgpu_info *icarus)
  951. {
  952. unsigned char voltage_data[2], cmd_buf[4];
  953. char volt_buf[8];
  954. int err, amount;
  955. /* Allow a zero setting to imply not to try and set voltage */
  956. if (!opt_au3_volt)
  957. return;
  958. if (opt_au3_volt < 725 || opt_au3_volt > 850) {
  959. applog(LOG_WARNING, "Invalid ANU voltage %d specified, must be 725-850", opt_au3_volt);
  960. return;
  961. }
  962. sprintf(volt_buf, "%04d", opt_au3_volt);
  963. hex2bin(voltage_data, volt_buf, 2);
  964. cmd_buf[0] = 0xaa;
  965. cmd_buf[1] = voltage_data[0];
  966. cmd_buf[1] &=0x0f;
  967. cmd_buf[1] |=0xb0;
  968. cmd_buf[2] = voltage_data[1];
  969. cmd_buf[3] = 0x00; //0-7
  970. cmd_buf[3] = crc5(cmd_buf, 4*8 - 5);
  971. cmd_buf[3] |= 0xc0;
  972. applog(LOG_INFO, "Send ANU voltage %02x%02x%02x%02x", cmd_buf[0], cmd_buf[1], cmd_buf[2], cmd_buf[3]);
  973. cgsleep_ms(500);
  974. err = usb_write(icarus, (char * )cmd_buf, 4, &amount, C_ANU_SEND_VOLT);
  975. if (err != LIBUSB_SUCCESS || amount != 4)
  976. applog(LOG_ERR, "Write voltage Comms error (werr=%d amount=%d)", err, amount);
  977. }
  978. static void rock_init_last_received_task_complete_time(struct ICARUS_INFO *info)
  979. {
  980. int i;
  981. if (opt_rock_freq < info->rmdev.min_frq ||
  982. opt_rock_freq > info->rmdev.max_frq)
  983. opt_rock_freq = info->rmdev.def_frq;
  984. for (i = 0; i < MAX_CHIP_NUM; ++i) {
  985. info->rmdev.chip[i].last_received_task_complete_time = time(NULL);
  986. info->rmdev.chip[i].freq = opt_rock_freq/10 - 1;
  987. info->rmdev.chip[i].error_cnt = 0;
  988. }
  989. info->rmdev.dev_detect_time = time(NULL);
  990. }
  991. static void icarus_clear(struct cgpu_info *icarus, struct ICARUS_INFO *info)
  992. {
  993. char buf[512];
  994. int amt;
  995. do {
  996. usb_read_ii_timeout(icarus, info->intinfo, buf, 512, &amt, 100, C_GETRESULTS);
  997. } while (amt > 0);
  998. }
  999. static struct cgpu_info *icarus_detect_one(struct libusb_device *dev, struct usb_find_devices *found)
  1000. {
  1001. int this_option_offset = ++option_offset;
  1002. struct ICARUS_INFO *info;
  1003. struct timeval tv_start, tv_finish;
  1004. // Block 171874 nonce = (0xa2870100) = 0x000187a2
  1005. // N.B. golden_ob MUST take less time to calculate
  1006. // than the timeout set in icarus_open()
  1007. // This one takes ~0.53ms on Rev3 Icarus
  1008. const char golden_ob[] =
  1009. "4679ba4ec99876bf4bfe086082b40025"
  1010. "4df6c356451471139a3afa71e48f544a"
  1011. "00000000000000000000000000000000"
  1012. "0000000087320b1a1426674f2fa722ce";
  1013. const char golden_nonce[] = "000187a2";
  1014. const uint32_t golden_nonce_val = 0x000187a2;
  1015. unsigned char nonce_bin[ICARUS_BUF_SIZE];
  1016. struct ICARUS_WORK workdata;
  1017. char *nonce_hex;
  1018. int baud, uninitialised_var(work_division), uninitialised_var(fpga_count);
  1019. bool anu_freqset = false;
  1020. struct cgpu_info *icarus;
  1021. int ret, err, amount, tries, i;
  1022. bool ok;
  1023. bool cmr2_ok[CAIRNSMORE2_INTS];
  1024. int cmr2_count;
  1025. if ((sizeof(workdata) << 1) != (sizeof(golden_ob) - 1))
  1026. quithere(1, "Data and golden_ob sizes don't match");
  1027. icarus = usb_alloc_cgpu(&icarus_drv, 1);
  1028. if (!usb_init(icarus, dev, found))
  1029. goto shin;
  1030. get_options(this_option_offset, icarus, &baud, &work_division, &fpga_count);
  1031. hex2bin((void *)(&workdata), golden_ob, sizeof(workdata));
  1032. info = cgcalloc(1, sizeof(struct ICARUS_INFO));
  1033. icarus->device_data = (void *)info;
  1034. info->ident = usb_ident(icarus);
  1035. switch (info->ident) {
  1036. case IDENT_ICA:
  1037. case IDENT_AVA:
  1038. case IDENT_BLT:
  1039. case IDENT_LLT:
  1040. case IDENT_AMU:
  1041. case IDENT_CMR1:
  1042. info->timeout = ICARUS_WAIT_TIMEOUT;
  1043. break;
  1044. case IDENT_ANU:
  1045. info->timeout = ANT_WAIT_TIMEOUT;
  1046. break;
  1047. case IDENT_AU3:
  1048. info->timeout = AU3_WAIT_TIMEOUT;
  1049. break;
  1050. case IDENT_CMR2:
  1051. if (found->intinfo_count != CAIRNSMORE2_INTS) {
  1052. quithere(1, "CMR2 Interface count (%d) isn't expected: %d",
  1053. found->intinfo_count,
  1054. CAIRNSMORE2_INTS);
  1055. }
  1056. info->timeout = ICARUS_CMR2_TIMEOUT;
  1057. cmr2_count = 0;
  1058. for (i = 0; i < CAIRNSMORE2_INTS; i++)
  1059. cmr2_ok[i] = false;
  1060. break;
  1061. default:
  1062. quit(1, "%s icarus_detect_one() invalid %s ident=%d",
  1063. icarus->drv->dname, icarus->drv->dname, info->ident);
  1064. }
  1065. info->nonce_size = ICARUS_READ_SIZE;
  1066. // For CMR2 test each USB Interface
  1067. retry:
  1068. tries = 2;
  1069. ok = false;
  1070. while (!ok && tries-- > 0) {
  1071. icarus_clear(icarus, info);
  1072. icarus_initialise(icarus, baud);
  1073. if (info->u3) {
  1074. uint16_t anu_freq_hex = anu3_find_freqhex();
  1075. set_anu_volt(icarus);
  1076. if (!set_anu_freq(icarus, info, anu_freq_hex)) {
  1077. applog(LOG_WARNING, "%s %i: Failed to set frequency, too much overclock?",
  1078. icarus->drv->name, icarus->device_id);
  1079. continue;
  1080. }
  1081. icarus->usbdev->ident = info->ident = IDENT_AU3;
  1082. info->Hs = ANTU3_HASH_TIME;
  1083. icarus->drv->name = "AU3";
  1084. applog(LOG_DEBUG, "%s %i: Detected Antminer U3", icarus->drv->name,
  1085. icarus->device_id);
  1086. } else if (info->ident == IDENT_ANU && !info->u3) {
  1087. if (!set_anu_freq(icarus, info, 0)) {
  1088. applog(LOG_WARNING, "%s %i: Failed to set frequency, too much overclock?",
  1089. icarus->drv->name, icarus->device_id);
  1090. continue;
  1091. }
  1092. }
  1093. err = usb_write_ii(icarus, info->intinfo,
  1094. (char *)(&workdata), sizeof(workdata), &amount, C_SENDWORK);
  1095. if (err != LIBUSB_SUCCESS || amount != sizeof(workdata))
  1096. continue;
  1097. memset(nonce_bin, 0, sizeof(nonce_bin));
  1098. ret = icarus_get_nonce(icarus, nonce_bin, &tv_start, &tv_finish, NULL, 300);
  1099. if (ret != ICA_NONCE_OK)
  1100. continue;
  1101. if (info->nonce_size == ICARUS_READ_SIZE && usb_buffer_size(icarus) == 4) {
  1102. applog(LOG_DEBUG, "%s %i: Detected Rockminer, deferring detection",
  1103. icarus->drv->name, icarus->device_id);
  1104. usb_buffer_clear(icarus);
  1105. break;
  1106. }
  1107. if (info->nonce_size == ICARUS_READ_SIZE && usb_buffer_size(icarus) == 1) {
  1108. info->ant = true;
  1109. usb_buffer_clear(icarus);
  1110. icarus->usbdev->ident = info->ident = IDENT_ANU;
  1111. info->nonce_size = ANT_READ_SIZE;
  1112. info->Hs = ANTMINERUSB_HASH_TIME;
  1113. icarus->drv->name = "ANU";
  1114. applog(LOG_DEBUG, "%s %i: Detected Antminer U1/2/3, changing nonce size to %d",
  1115. icarus->drv->name, icarus->device_id, ANT_READ_SIZE);
  1116. }
  1117. nonce_hex = bin2hex(nonce_bin, sizeof(nonce_bin));
  1118. if (strncmp(nonce_hex, golden_nonce, 8) == 0) {
  1119. if (info->ant && !anu_freqset)
  1120. anu_freqset = true;
  1121. else
  1122. ok = true;
  1123. } else {
  1124. if (tries < 0 && info->ident != IDENT_CMR2) {
  1125. applog(LOG_ERR,
  1126. "Icarus Detect: "
  1127. "Test failed at %s: get %s, should: %s",
  1128. icarus->device_path, nonce_hex, golden_nonce);
  1129. }
  1130. }
  1131. free(nonce_hex);
  1132. }
  1133. if (!ok) {
  1134. if (info->ident != IDENT_CMR2) {
  1135. if (info->u3)
  1136. goto unshin;
  1137. info->u3 = true;
  1138. goto retry;
  1139. }
  1140. if (info->intinfo < CAIRNSMORE2_INTS-1) {
  1141. info->intinfo++;
  1142. goto retry;
  1143. }
  1144. } else {
  1145. if (info->ident == IDENT_CMR2) {
  1146. applog(LOG_DEBUG,
  1147. "Icarus Detect: "
  1148. "Test succeeded at %s i%d: got %s",
  1149. icarus->device_path, info->intinfo, golden_nonce);
  1150. cmr2_ok[info->intinfo] = true;
  1151. cmr2_count++;
  1152. if (info->intinfo < CAIRNSMORE2_INTS-1) {
  1153. info->intinfo++;
  1154. goto retry;
  1155. }
  1156. }
  1157. }
  1158. if (info->ident == IDENT_CMR2) {
  1159. if (cmr2_count == 0) {
  1160. applog(LOG_ERR,
  1161. "Icarus Detect: Test failed at %s: for all %d CMR2 Interfaces",
  1162. icarus->device_path, CAIRNSMORE2_INTS);
  1163. goto unshin;
  1164. }
  1165. // set the interface to the first one that succeeded
  1166. for (i = 0; i < CAIRNSMORE2_INTS; i++)
  1167. if (cmr2_ok[i]) {
  1168. info->intinfo = i;
  1169. break;
  1170. }
  1171. } else {
  1172. applog(LOG_DEBUG,
  1173. "Icarus Detect: "
  1174. "Test succeeded at %s: got %s",
  1175. icarus->device_path, golden_nonce);
  1176. }
  1177. /* We have a real Icarus! */
  1178. if (!add_cgpu(icarus))
  1179. goto unshin;
  1180. update_usb_stats(icarus);
  1181. applog(LOG_INFO, "%s %d: Found at %s",
  1182. icarus->drv->name, icarus->device_id, icarus->device_path);
  1183. if (info->ident == IDENT_CMR2) {
  1184. applog(LOG_INFO, "%s %d: with %d Interface%s",
  1185. icarus->drv->name, icarus->device_id,
  1186. cmr2_count, cmr2_count > 1 ? "s" : "");
  1187. // Assume 1 or 2 are running FPGA pairs
  1188. if (cmr2_count < 3) {
  1189. work_division = fpga_count = 2;
  1190. info->Hs /= 2;
  1191. }
  1192. }
  1193. applog(LOG_DEBUG, "%s %d: Init baud=%d work_division=%d fpga_count=%d",
  1194. icarus->drv->name, icarus->device_id, baud, work_division, fpga_count);
  1195. info->baud = baud;
  1196. info->work_division = work_division;
  1197. info->fpga_count = fpga_count;
  1198. info->nonce_mask = mask(work_division);
  1199. info->golden_hashes = (golden_nonce_val & info->nonce_mask) * fpga_count;
  1200. timersub(&tv_finish, &tv_start, &(info->golden_tv));
  1201. set_timing_mode(this_option_offset, icarus);
  1202. if (info->ident == IDENT_CMR2) {
  1203. int i;
  1204. for (i = info->intinfo + 1; i < icarus->usbdev->found->intinfo_count; i++) {
  1205. struct cgpu_info *cgtmp;
  1206. struct ICARUS_INFO *intmp;
  1207. if (!cmr2_ok[i])
  1208. continue;
  1209. cgtmp = usb_copy_cgpu(icarus);
  1210. if (!cgtmp) {
  1211. applog(LOG_ERR, "%s %d: Init failed initinfo %d",
  1212. icarus->drv->name, icarus->device_id, i);
  1213. continue;
  1214. }
  1215. cgtmp->usbinfo.usbstat = USB_NOSTAT;
  1216. intmp = cgmalloc(sizeof(struct ICARUS_INFO));
  1217. cgtmp->device_data = (void *)intmp;
  1218. // Initialise everything to match
  1219. memcpy(intmp, info, sizeof(struct ICARUS_INFO));
  1220. intmp->intinfo = i;
  1221. icarus_initialise(cgtmp, baud);
  1222. if (!add_cgpu(cgtmp)) {
  1223. usb_uninit(cgtmp);
  1224. free(intmp);
  1225. continue;
  1226. }
  1227. update_usb_stats(cgtmp);
  1228. }
  1229. }
  1230. return icarus;
  1231. unshin:
  1232. usb_uninit(icarus);
  1233. free(info);
  1234. icarus->device_data = NULL;
  1235. shin:
  1236. icarus = usb_free_cgpu(icarus);
  1237. return NULL;
  1238. }
  1239. static int64_t rock_scanwork(struct thr_info *thr);
  1240. static void rock_statline_before(char *buf, size_t bufsiz, struct cgpu_info *cgpu)
  1241. {
  1242. if (cgpu->temp)
  1243. tailsprintf(buf, bufsiz, "%3.0fMHz %3.0fC", opt_rock_freq, cgpu->temp);
  1244. else
  1245. tailsprintf(buf, bufsiz, "%.0fMHz", opt_rock_freq);
  1246. }
  1247. /* The only thing to do on flush_work is to remove the base work to prevent us
  1248. * rolling what is now stale work */
  1249. static void rock_flush(struct cgpu_info *icarus)
  1250. {
  1251. struct ICARUS_INFO *info = icarus->device_data;
  1252. struct work *work;
  1253. mutex_lock(&info->lock);
  1254. work = info->base_work;
  1255. info->base_work = NULL;
  1256. mutex_unlock(&info->lock);
  1257. if (work)
  1258. free_work(work);
  1259. }
  1260. static struct cgpu_info *rock_detect_one(struct libusb_device *dev, struct usb_find_devices *found)
  1261. {
  1262. struct ICARUS_INFO *info;
  1263. struct timeval tv_start, tv_finish;
  1264. char *ob_hex = NULL;
  1265. // Block 171874 nonce = (0xa2870100) = 0x000187a2
  1266. // N.B. golden_ob MUST take less time to calculate
  1267. // than the timeout set in icarus_open()
  1268. // This one takes ~0.53ms on Rev3 Icarus
  1269. const char golden_ob[] =
  1270. "4679ba4ec99876bf4bfe086082b40025"
  1271. "4df6c356451471139a3afa71e48f544a"
  1272. "00000000000000000000000000000000"
  1273. "aa1ff05587320b1a1426674f2fa722ce";
  1274. const char golden_nonce[] = "000187a2";
  1275. const uint32_t golden_nonce_val = 0x000187a2;
  1276. unsigned char nonce_bin[ICARUS_BUF_SIZE];
  1277. struct ICARUS_WORK workdata;
  1278. char *nonce_hex;
  1279. struct cgpu_info *icarus;
  1280. int ret, err, amount, tries;
  1281. bool ok;
  1282. int correction_times = 0;
  1283. NONCE_DATA nonce_data;
  1284. uint32_t nonce;
  1285. char *newname = NULL;
  1286. if ((sizeof(workdata) << 1) != (sizeof(golden_ob) - 1))
  1287. quithere(1, "Data and golden_ob sizes don't match");
  1288. icarus = usb_alloc_cgpu(&icarus_drv, 1);
  1289. if (!usb_init(icarus, dev, found))
  1290. goto shin;
  1291. hex2bin((void *)(&workdata), golden_ob, sizeof(workdata));
  1292. rev((void *)(&(workdata.midstate)), ICARUS_MIDSTATE_SIZE);
  1293. rev((void *)(&(workdata.work)), ICARUS_WORK_SIZE);
  1294. if (opt_debug) {
  1295. ob_hex = bin2hex((void *)(&workdata), sizeof(workdata));
  1296. applog(LOG_WARNING, "%s %d: send_gold_nonce %s",
  1297. icarus->drv->name, icarus->device_id, ob_hex);
  1298. free(ob_hex);
  1299. }
  1300. info = cgcalloc(1, sizeof(struct ICARUS_INFO));
  1301. (void)memset(info, 0, sizeof(struct ICARUS_INFO));
  1302. icarus->device_data = (void *)info;
  1303. icarus->usbdev->ident = info->ident = IDENT_LIN;
  1304. info->nonce_size = ROCK_READ_SIZE;
  1305. info->fail_time = 10;
  1306. info->nonce_mask = 0xffffffff;
  1307. update_usb_stats(icarus);
  1308. tries = MAX_TRIES;
  1309. ok = false;
  1310. while (!ok && tries-- > 0) {
  1311. icarus_initialise(icarus, info->baud);
  1312. applog(LOG_DEBUG, "tries: %d", tries);
  1313. workdata.unused[ICARUS_UNUSED_SIZE - 3] = opt_rock_freq/10 - 1;
  1314. workdata.unused[ICARUS_UNUSED_SIZE - 2] = (MAX_TRIES-1-tries);
  1315. info->rmdev.detect_chip_no++;
  1316. if (info->rmdev.detect_chip_no >= MAX_TRIES)
  1317. info->rmdev.detect_chip_no = 0;
  1318. //g_detect_chip_no = (g_detect_chip_no + 1) & MAX_CHIP_NUM;
  1319. usb_buffer_clear(icarus);
  1320. err = usb_write_ii(icarus, info->intinfo,
  1321. (char *)(&workdata), sizeof(workdata), &amount, C_SENDWORK);
  1322. if (err != LIBUSB_SUCCESS || amount != sizeof(workdata))
  1323. continue;
  1324. memset(nonce_bin, 0, sizeof(nonce_bin));
  1325. ret = icarus_get_nonce(icarus, nonce_bin, &tv_start, &tv_finish, NULL, 100);
  1326. applog(LOG_DEBUG, "Rockminer nonce_bin: %02x %02x %02x %02x %02x %02x %02x %02x",
  1327. nonce_bin[0], nonce_bin[1], nonce_bin[2], nonce_bin[3],
  1328. nonce_bin[4], nonce_bin[5], nonce_bin[6], nonce_bin[7]);
  1329. if (ret != ICA_NONCE_OK) {
  1330. applog(LOG_DEBUG, "detect_one get_gold_nonce error, tries = %d", tries);
  1331. continue;
  1332. }
  1333. if (usb_buffer_size(icarus) == 1) {
  1334. applog(LOG_INFO, "Rock detect found an ANU, skipping");
  1335. usb_buffer_clear(icarus);
  1336. break;
  1337. }
  1338. newname = NULL;
  1339. switch (nonce_bin[NONCE_CHIP_NO_OFFSET] & RM_PRODUCT_MASK) {
  1340. case RM_PRODUCT_T1:
  1341. newname = "LIR"; // Rocketbox
  1342. info->rmdev.product_id = ROCKMINER_T1;
  1343. info->rmdev.chip_max = 12;
  1344. info->rmdev.min_frq = 200;
  1345. info->rmdev.def_frq = 330;
  1346. info->rmdev.max_frq = 400;
  1347. break;
  1348. #if 0
  1349. case RM_PRODUCT_T2: // what's this?
  1350. newname = "LIX";
  1351. info->rmdev.product_id = ROCKMINER_T2;
  1352. info->rmdev.chip_max = 16;
  1353. info->rmdev.min_frq = 200;
  1354. info->rmdev.def_frq = 300;
  1355. info->rmdev.max_frq = 400;
  1356. break;
  1357. #endif
  1358. case RM_PRODUCT_RBOX:
  1359. newname = "LIN"; // R-Box
  1360. info->rmdev.product_id = ROCKMINER_RBOX;
  1361. info->rmdev.chip_max = 4;
  1362. info->rmdev.min_frq = 200;
  1363. info->rmdev.def_frq = 270;
  1364. info->rmdev.max_frq = 400;
  1365. break;
  1366. default:
  1367. continue;
  1368. }
  1369. snprintf(info->rock_init, sizeof(info->rock_init), "%02x %02x %02x %02x",
  1370. nonce_bin[4], nonce_bin[5], nonce_bin[6], nonce_bin[7]);
  1371. nonce_data.chip_no = nonce_bin[NONCE_CHIP_NO_OFFSET] & RM_CHIP_MASK;
  1372. if (nonce_data.chip_no >= info->rmdev.chip_max)
  1373. nonce_data.chip_no = 0;
  1374. nonce_data.cmd_value = nonce_bin[NONCE_TASK_CMD_OFFSET] & RM_CMD_MASK;
  1375. if (nonce_data.cmd_value == NONCE_TASK_COMPLETE_CMD) {
  1376. applog(LOG_DEBUG, "complete g_detect_chip_no: %d", info->rmdev.detect_chip_no);
  1377. workdata.unused[ICARUS_UNUSED_SIZE - 3] = opt_rock_freq/10 - 1;
  1378. workdata.unused[ICARUS_UNUSED_SIZE - 2] = info->rmdev.detect_chip_no;
  1379. info->rmdev.detect_chip_no++;
  1380. if (info->rmdev.detect_chip_no >= MAX_TRIES)
  1381. info->rmdev.detect_chip_no = 0;
  1382. err = usb_write_ii(icarus, info->intinfo,
  1383. (char *)(&workdata), sizeof(workdata), &amount, C_SENDWORK);
  1384. if (err != LIBUSB_SUCCESS || amount != sizeof(workdata))
  1385. continue;
  1386. applog(LOG_DEBUG, "send_gold_nonce usb_write_ii");
  1387. continue;
  1388. }
  1389. memcpy((char *)&nonce, nonce_bin, ICARUS_READ_SIZE);
  1390. nonce = htobe32(nonce);
  1391. applog(LOG_DEBUG, "Rockminer nonce: %08X", nonce);
  1392. correction_times = 0;
  1393. while (correction_times < NONCE_CORRECTION_TIMES) {
  1394. nonce_hex = bin2hex(nonce_bin, 4);
  1395. if (golden_nonce_val == nonce + rbox_corr_values[correction_times]) {
  1396. memset(&(info->g_work[0]), 0, sizeof(info->g_work));
  1397. rock_init_last_received_task_complete_time(info);
  1398. ok = true;
  1399. break;
  1400. } else {
  1401. applog(LOG_DEBUG, "detect_one gold_nonce compare error times = %d",
  1402. correction_times);
  1403. if (tries < 0 && info->ident != IDENT_CMR2) {
  1404. applog(LOG_WARNING,
  1405. "Icarus Detect: "
  1406. "Test failed at %s: get %s, should: %s",
  1407. icarus->device_path, nonce_hex, golden_nonce);
  1408. }
  1409. if (nonce == 0)
  1410. break;
  1411. }
  1412. free(nonce_hex);
  1413. correction_times++;
  1414. }
  1415. }
  1416. if (!ok)
  1417. goto unshin;
  1418. if (newname) {
  1419. if (!icarus->drv->copy)
  1420. icarus->drv = copy_drv(icarus->drv);
  1421. icarus->drv->name = newname;
  1422. }
  1423. applog(LOG_DEBUG, "Icarus Detect: Test succeeded at %s: got %s",
  1424. icarus->device_path, golden_nonce);
  1425. /* We have a real Rockminer! */
  1426. if (!add_cgpu(icarus))
  1427. goto unshin;
  1428. icarus->drv->scanwork = rock_scanwork;
  1429. icarus->drv->dname = "Rockminer";
  1430. icarus->drv->get_statline_before = &rock_statline_before;
  1431. icarus->drv->flush_work = &rock_flush;
  1432. mutex_init(&info->lock);
  1433. applog(LOG_INFO, "%s %d: Found at %s",
  1434. icarus->drv->name, icarus->device_id,
  1435. icarus->device_path);
  1436. timersub(&tv_finish, &tv_start, &(info->golden_tv));
  1437. return icarus;
  1438. unshin:
  1439. usb_uninit(icarus);
  1440. free(info);
  1441. icarus->device_data = NULL;
  1442. shin:
  1443. icarus = usb_free_cgpu(icarus);
  1444. return NULL;
  1445. }
  1446. static void icarus_detect(bool __maybe_unused hotplug)
  1447. {
  1448. usb_detect(&icarus_drv, rock_detect_one);
  1449. usb_detect(&icarus_drv, icarus_detect_one);
  1450. }
  1451. static bool icarus_prepare(struct thr_info *thr)
  1452. {
  1453. struct cgpu_info *icarus = thr->cgpu;
  1454. struct ICARUS_INFO *info = (struct ICARUS_INFO *)(icarus->device_data);
  1455. if (info->ant)
  1456. info->antworks = cgcalloc(sizeof(struct work *), ANT_QUEUE_NUM);
  1457. return true;
  1458. }
  1459. static void cmr2_command(struct cgpu_info *icarus, uint8_t cmd, uint8_t data)
  1460. {
  1461. struct ICARUS_INFO *info = (struct ICARUS_INFO *)(icarus->device_data);
  1462. struct ICARUS_WORK workdata;
  1463. int amount;
  1464. memset((void *)(&workdata), 0, sizeof(workdata));
  1465. workdata.prefix = ICARUS_CMR2_PREFIX;
  1466. workdata.cmd = cmd;
  1467. workdata.data = data;
  1468. workdata.check = workdata.data ^ workdata.cmd ^ workdata.prefix ^ ICARUS_CMR2_CHECK;
  1469. usb_write_ii(icarus, info->intinfo, (char *)(&workdata), sizeof(workdata), &amount, C_SENDWORK);
  1470. }
  1471. static void cmr2_commands(struct cgpu_info *icarus)
  1472. {
  1473. struct ICARUS_INFO *info = (struct ICARUS_INFO *)(icarus->device_data);
  1474. if (info->speed_next_work) {
  1475. info->speed_next_work = false;
  1476. cmr2_command(icarus, ICARUS_CMR2_CMD_SPEED, info->cmr2_speed);
  1477. return;
  1478. }
  1479. if (info->flash_next_work) {
  1480. info->flash_next_work = false;
  1481. cmr2_command(icarus, ICARUS_CMR2_CMD_FLASH, ICARUS_CMR2_DATA_FLASH_ON);
  1482. cgsleep_ms(250);
  1483. cmr2_command(icarus, ICARUS_CMR2_CMD_FLASH, ICARUS_CMR2_DATA_FLASH_OFF);
  1484. cgsleep_ms(250);
  1485. cmr2_command(icarus, ICARUS_CMR2_CMD_FLASH, ICARUS_CMR2_DATA_FLASH_ON);
  1486. cgsleep_ms(250);
  1487. cmr2_command(icarus, ICARUS_CMR2_CMD_FLASH, ICARUS_CMR2_DATA_FLASH_OFF);
  1488. return;
  1489. }
  1490. }
  1491. void rock_send_task(unsigned char chip_no, unsigned int current_task_id, struct thr_info *thr)
  1492. {
  1493. struct cgpu_info *icarus = thr->cgpu;
  1494. struct ICARUS_INFO *info = (struct ICARUS_INFO *)(icarus->device_data);
  1495. int err, amount;
  1496. struct ICARUS_WORK workdata;
  1497. char *ob_hex;
  1498. struct work *work = NULL;
  1499. /* Only base_work needs locking since it can be asynchronously deleted
  1500. * by flush work */
  1501. if (info->g_work[chip_no][current_task_id] == NULL) {
  1502. mutex_lock(&info->lock);
  1503. if (!info->base_work)
  1504. info->base_work = get_work(thr, thr->id);
  1505. if (info->base_work->drv_rolllimit > 0) {
  1506. info->base_work->drv_rolllimit--;
  1507. roll_work(info->base_work);
  1508. work = make_clone(info->base_work);
  1509. } else {
  1510. work = info->base_work;
  1511. info->base_work = NULL;
  1512. }
  1513. mutex_unlock(&info->lock);
  1514. info->g_work[chip_no][current_task_id] = work;
  1515. } else {
  1516. work = info->g_work[chip_no][current_task_id];
  1517. applog(LOG_DEBUG, "::resend work");
  1518. }
  1519. memset((void *)(&workdata), 0, sizeof(workdata));
  1520. memcpy(&(workdata.midstate), work->midstate, ICARUS_MIDSTATE_SIZE);
  1521. memcpy(&(workdata.work), work->data + ICARUS_WORK_DATA_OFFSET, ICARUS_WORK_SIZE);
  1522. workdata.unused[ICARUS_UNUSED_SIZE - 4] = 0xaa;
  1523. if (info->rmdev.chip[chip_no].freq > (info->rmdev.max_frq/10 - 1) ||
  1524. info->rmdev.chip[chip_no].freq < (info->rmdev.min_frq/10 - 1))
  1525. rock_init_last_received_task_complete_time(info);
  1526. workdata.unused[ICARUS_UNUSED_SIZE - 3] = info->rmdev.chip[chip_no].freq; //icarus->freq/10 - 1; ;
  1527. workdata.unused[ICARUS_UNUSED_SIZE - 2] = chip_no ;
  1528. workdata.id = 0x55;
  1529. if (opt_debug) {
  1530. ob_hex = bin2hex((void *)(work->data), 128);
  1531. applog(LOG_WARNING, "%s %d: work->data %s",
  1532. icarus->drv->name, icarus->device_id, ob_hex);
  1533. free(ob_hex);
  1534. }
  1535. // We only want results for the work we are about to send
  1536. usb_buffer_clear(icarus);
  1537. err = usb_write_ii(icarus, info->intinfo, (char *)(&workdata), sizeof(workdata), &amount, C_SENDWORK);
  1538. if (err < 0 || amount != sizeof(workdata)) {
  1539. applog(LOG_ERR, "%s %i: Comms error (werr=%d amt=%d)",
  1540. icarus->drv->name, icarus->device_id, err, amount);
  1541. dev_error(icarus, REASON_DEV_COMMS_ERROR);
  1542. icarus_initialise(icarus, info->baud);
  1543. if (info->g_work[chip_no][current_task_id])
  1544. {
  1545. free_work(info->g_work[chip_no][current_task_id]);
  1546. info->g_work[chip_no][current_task_id] = NULL;
  1547. }
  1548. return;
  1549. }
  1550. return;
  1551. }
  1552. static void process_history(struct cgpu_info *icarus, struct ICARUS_INFO *info, uint32_t nonce,
  1553. uint64_t hash_count, struct timeval *elapsed, struct timeval *tv_start)
  1554. {
  1555. struct ICARUS_HISTORY *history0, *history;
  1556. struct timeval tv_history_start, tv_history_finish;
  1557. int count;
  1558. double Hs, W, fullnonce;
  1559. int read_time, i;
  1560. bool limited;
  1561. uint32_t values;
  1562. int64_t hash_count_range;
  1563. double Ti, Xi;
  1564. // Ignore possible end condition values ...
  1565. // TODO: set limitations on calculated values depending on the device
  1566. // to avoid crap values caused by CPU/Task Switching/Swapping/etc
  1567. if ((nonce & info->nonce_mask) <= END_CONDITION ||
  1568. (nonce & info->nonce_mask) >= (info->nonce_mask & ~END_CONDITION))
  1569. return;
  1570. cgtime(&tv_history_start);
  1571. history0 = &(info->history[0]);
  1572. if (history0->values == 0)
  1573. timeradd(tv_start, &history_sec, &(history0->finish));
  1574. Ti = (double)(elapsed->tv_sec)
  1575. + ((double)(elapsed->tv_usec))/((double)1000000)
  1576. - ((double)ICARUS_READ_TIME(info->baud));
  1577. Xi = (double)hash_count;
  1578. history0->sumXiTi += Xi * Ti;
  1579. history0->sumXi += Xi;
  1580. history0->sumTi += Ti;
  1581. history0->sumXi2 += Xi * Xi;
  1582. history0->values++;
  1583. if (history0->hash_count_max < hash_count)
  1584. history0->hash_count_max = hash_count;
  1585. if (history0->hash_count_min > hash_count || history0->hash_count_min == 0)
  1586. history0->hash_count_min = hash_count;
  1587. if (history0->values >= info->min_data_count
  1588. && timercmp(tv_start, &(history0->finish), >)) {
  1589. for (i = INFO_HISTORY; i > 0; i--)
  1590. memcpy(&(info->history[i]),
  1591. &(info->history[i-1]),
  1592. sizeof(struct ICARUS_HISTORY));
  1593. // Initialise history0 to zero for summary calculation
  1594. memset(history0, 0, sizeof(struct ICARUS_HISTORY));
  1595. // We just completed a history data set
  1596. // So now recalc read_time based on the whole history thus we will
  1597. // initially get more accurate until it completes INFO_HISTORY
  1598. // total data sets
  1599. count = 0;
  1600. for (i = 1 ; i <= INFO_HISTORY; i++) {
  1601. history = &(info->history[i]);
  1602. if (history->values >= MIN_DATA_COUNT) {
  1603. count++;
  1604. history0->sumXiTi += history->sumXiTi;
  1605. history0->sumXi += history->sumXi;
  1606. history0->sumTi += history->sumTi;
  1607. history0->sumXi2 += history->sumXi2;
  1608. history0->values += history->values;
  1609. if (history0->hash_count_max < history->hash_count_max)
  1610. history0->hash_count_max = history->hash_count_max;
  1611. if (history0->hash_count_min > history->hash_count_min || history0->hash_count_min == 0)
  1612. history0->hash_count_min = history->hash_count_min;
  1613. }
  1614. }
  1615. // All history data
  1616. Hs = (history0->values*history0->sumXiTi - history0->sumXi*history0->sumTi)
  1617. / (history0->values*history0->sumXi2 - history0->sumXi*history0->sumXi);
  1618. W = history0->sumTi/history0->values - Hs*history0->sumXi/history0->values;
  1619. hash_count_range = history0->hash_count_max - history0->hash_count_min;
  1620. values = history0->values;
  1621. // Initialise history0 to zero for next data set
  1622. memset(history0, 0, sizeof(struct ICARUS_HISTORY));
  1623. fullnonce = W + Hs * (((double)0xffffffff) + 1);
  1624. read_time = SECTOMS(fullnonce) - ICARUS_READ_REDUCE;
  1625. if (info->read_time_limit > 0 && read_time > info->read_time_limit) {
  1626. read_time = info->read_time_limit;
  1627. limited = true;
  1628. } else
  1629. limited = false;
  1630. info->Hs = Hs;
  1631. info->read_time = read_time;
  1632. info->fullnonce = fullnonce;
  1633. info->count = count;
  1634. info->W = W;
  1635. info->values = values;
  1636. info->hash_count_range = hash_count_range;
  1637. if (info->min_data_count < MAX_MIN_DATA_COUNT)
  1638. info->min_data_count *= 2;
  1639. else if (info->timing_mode == MODE_SHORT)
  1640. info->do_icarus_timing = false;
  1641. applog(LOG_WARNING, "%s %d Re-estimate: Hs=%e W=%e read_time=%dms%s fullnonce=%.3fs",
  1642. icarus->drv->name, icarus->device_id, Hs, W, read_time,
  1643. limited ? " (limited)" : "", fullnonce);
  1644. }
  1645. info->history_count++;
  1646. cgtime(&tv_history_finish);
  1647. timersub(&tv_history_finish, &tv_history_start, &tv_history_finish);
  1648. timeradd(&tv_history_finish, &(info->history_time), &(info->history_time));
  1649. }
  1650. static int64_t icarus_scanwork(struct thr_info *thr)
  1651. {
  1652. struct cgpu_info *icarus = thr->cgpu;
  1653. struct ICARUS_INFO *info = (struct ICARUS_INFO *)(icarus->device_data);
  1654. int ret, err, amount;
  1655. unsigned char nonce_bin[ICARUS_BUF_SIZE];
  1656. struct ICARUS_WORK workdata;
  1657. char *ob_hex;
  1658. uint32_t nonce;
  1659. int64_t hash_count = 0;
  1660. struct timeval tv_start, tv_finish, elapsed;
  1661. int curr_hw_errors;
  1662. bool was_hw_error;
  1663. struct work *work;
  1664. int64_t estimate_hashes;
  1665. uint8_t workid = 0;
  1666. if (unlikely(share_work_tdiff(icarus) > info->fail_time)) {
  1667. if (info->failing) {
  1668. if (share_work_tdiff(icarus) > info->fail_time + 60) {
  1669. applog(LOG_ERR, "%s %d: Device failed to respond to restart",
  1670. icarus->drv->name, icarus->device_id);
  1671. usb_nodev(icarus);
  1672. return -1;
  1673. }
  1674. } else {
  1675. applog(LOG_WARNING, "%s %d: No valid hashes for over %d secs, attempting to reset",
  1676. icarus->drv->name, icarus->device_id, info->fail_time);
  1677. usb_reset(icarus);
  1678. info->failing = true;
  1679. }
  1680. }
  1681. // Device is gone
  1682. if (icarus->usbinfo.nodev)
  1683. return -1;
  1684. elapsed.tv_sec = elapsed.tv_usec = 0;
  1685. work = get_work(thr, thr->id);
  1686. memset((void *)(&workdata), 0, sizeof(workdata));
  1687. memcpy(&(workdata.midstate), work->midstate, ICARUS_MIDSTATE_SIZE);
  1688. memcpy(&(workdata.work), work->data + ICARUS_WORK_DATA_OFFSET, ICARUS_WORK_SIZE);
  1689. rev((void *)(&(workdata.midstate)), ICARUS_MIDSTATE_SIZE);
  1690. rev((void *)(&(workdata.work)), ICARUS_WORK_SIZE);
  1691. if (info->ant) {
  1692. workid = info->workid;
  1693. if (++info->workid >= 0x1F)
  1694. info->workid = 0;
  1695. if (info->antworks[workid])
  1696. free_work(info->antworks[workid]);
  1697. info->antworks[workid] = work;
  1698. workdata.id = workid;
  1699. }
  1700. if (info->speed_next_work || info->flash_next_work)
  1701. cmr2_commands(icarus);
  1702. // We only want results for the work we are about to send
  1703. usb_buffer_clear(icarus);
  1704. err = usb_write_ii(icarus, info->intinfo, (char *)(&workdata), sizeof(workdata), &amount, C_SENDWORK);
  1705. if (err < 0 || amount != sizeof(workdata)) {
  1706. applog(LOG_ERR, "%s %i: Comms error (werr=%d amt=%d)",
  1707. icarus->drv->name, icarus->device_id, err, amount);
  1708. dev_error(icarus, REASON_DEV_COMMS_ERROR);
  1709. icarus_initialise(icarus, info->baud);
  1710. goto out;
  1711. }
  1712. if (opt_debug) {
  1713. ob_hex = bin2hex((void *)(&workdata), sizeof(workdata));
  1714. applog(LOG_DEBUG, "%s %d: sent %s",
  1715. icarus->drv->name, icarus->device_id, ob_hex);
  1716. free(ob_hex);
  1717. }
  1718. more_nonces:
  1719. /* Icarus will return nonces or nothing. If we know we have enough data
  1720. * for a response in the buffer already, there will be no usb read
  1721. * performed. */
  1722. memset(nonce_bin, 0, sizeof(nonce_bin));
  1723. ret = icarus_get_nonce(icarus, nonce_bin, &tv_start, &tv_finish, thr, info->read_time);
  1724. if (ret == ICA_NONCE_ERROR)
  1725. goto out;
  1726. // aborted before becoming idle, get new work
  1727. if (ret == ICA_NONCE_TIMEOUT || ret == ICA_NONCE_RESTART) {
  1728. if (info->ant)
  1729. goto out;
  1730. timersub(&tv_finish, &tv_start, &elapsed);
  1731. // ONLY up to just when it aborted
  1732. // We didn't read a reply so we don't subtract ICARUS_READ_TIME
  1733. estimate_hashes = ((double)(elapsed.tv_sec)
  1734. + ((double)(elapsed.tv_usec))/((double)1000000)) / info->Hs;
  1735. // If some Serial-USB delay allowed the full nonce range to
  1736. // complete it can't have done more than a full nonce
  1737. if (unlikely(estimate_hashes > 0xffffffff))
  1738. estimate_hashes = 0xffffffff;
  1739. applog(LOG_DEBUG, "%s %d: no nonce = 0x%08lX hashes (%ld.%06lds)",
  1740. icarus->drv->name, icarus->device_id,
  1741. (long unsigned int)estimate_hashes,
  1742. (long)elapsed.tv_sec, (long)elapsed.tv_usec);
  1743. hash_count = estimate_hashes;
  1744. goto out;
  1745. }
  1746. if (info->ant) {
  1747. workid = nonce_bin[4] & 0x1F;
  1748. if (info->antworks[workid])
  1749. work = info->antworks[workid];
  1750. else
  1751. goto out;
  1752. }
  1753. memcpy((char *)&nonce, nonce_bin, ICARUS_READ_SIZE);
  1754. nonce = htobe32(nonce);
  1755. curr_hw_errors = icarus->hw_errors;
  1756. if (submit_nonce(thr, work, nonce))
  1757. info->failing = false;
  1758. was_hw_error = (curr_hw_errors < icarus->hw_errors);
  1759. /* U3s return shares fast enough to use just that for hashrate
  1760. * calculation, otherwise the result is inaccurate instead. */
  1761. if (info->ant) {
  1762. info->nonces++;
  1763. if (usb_buffer_size(icarus) >= ANT_READ_SIZE)
  1764. goto more_nonces;
  1765. } else {
  1766. hash_count = (nonce & info->nonce_mask);
  1767. hash_count++;
  1768. hash_count *= info->fpga_count;
  1769. }
  1770. #if 0
  1771. // This appears to only return zero nonce values
  1772. if (usb_buffer_size(icarus) > 3) {
  1773. memcpy((char *)&nonce, icarus->usbdev->buffer, sizeof(nonce_bin));
  1774. nonce = htobe32(nonce);
  1775. applog(LOG_WARNING, "%s %d: attempting to submit 2nd nonce = 0x%08lX",
  1776. icarus->drv->name, icarus->device_id,
  1777. (long unsigned int)nonce);
  1778. curr_hw_errors = icarus->hw_errors;
  1779. submit_nonce(thr, work, nonce);
  1780. was_hw_error = (curr_hw_errors > icarus->hw_errors);
  1781. }
  1782. #endif
  1783. if (opt_debug || info->do_icarus_timing)
  1784. timersub(&tv_finish, &tv_start, &elapsed);
  1785. applog(LOG_DEBUG, "%s %d: nonce = 0x%08x = 0x%08lX hashes (%ld.%06lds)",
  1786. icarus->drv->name, icarus->device_id,
  1787. nonce, (long unsigned int)hash_count,
  1788. (long)elapsed.tv_sec, (long)elapsed.tv_usec);
  1789. if (info->do_icarus_timing && !was_hw_error)
  1790. process_history(icarus, info, nonce, hash_count, &elapsed, &tv_start);
  1791. out:
  1792. if (!info->ant)
  1793. free_work(work);
  1794. else {
  1795. /* Ant USBs free the work themselves. Return only one full
  1796. * nonce worth on each pass to smooth out displayed hashrate */
  1797. if (info->nonces) {
  1798. hash_count = 0xffffffff;
  1799. info->nonces--;
  1800. }
  1801. }
  1802. return hash_count;
  1803. }
  1804. static int64_t rock_scanwork(struct thr_info *thr)
  1805. {
  1806. struct cgpu_info *icarus = thr->cgpu;
  1807. struct ICARUS_INFO *info = (struct ICARUS_INFO *)(icarus->device_data);
  1808. int ret;
  1809. unsigned char nonce_bin[ICARUS_BUF_SIZE];
  1810. uint32_t nonce;
  1811. int64_t hash_count = 0;
  1812. struct timeval tv_start, tv_finish, elapsed;
  1813. struct work *work = NULL;
  1814. int64_t estimate_hashes;
  1815. int correction_times = 0;
  1816. NONCE_DATA nonce_data;
  1817. double temp;
  1818. int chip_no = 0;
  1819. time_t recv_time = 0;
  1820. if (unlikely(share_work_tdiff(icarus) > info->fail_time)) {
  1821. if (info->failing) {
  1822. if (share_work_tdiff(icarus) > info->fail_time + 60) {
  1823. applog(LOG_ERR, "%s %d: Device failed to respond to restart",
  1824. icarus->drv->name, icarus->device_id);
  1825. usb_nodev(icarus);
  1826. return -1;
  1827. }
  1828. } else {
  1829. applog(LOG_WARNING, "%s %d: No valid hashes for over %d secs, attempting to reset",
  1830. icarus->drv->name, icarus->device_id, info->fail_time);
  1831. usb_reset(icarus);
  1832. info->failing = true;
  1833. }
  1834. }
  1835. // Device is gone
  1836. if (icarus->usbinfo.nodev)
  1837. return -1;
  1838. elapsed.tv_sec = elapsed.tv_usec = 0;
  1839. for (chip_no = 0; chip_no < info->rmdev.chip_max; chip_no++) {
  1840. recv_time = time(NULL);
  1841. if (recv_time > info->rmdev.chip[chip_no].last_received_task_complete_time + 1) {
  1842. info->rmdev.chip[chip_no].last_received_task_complete_time = recv_time;
  1843. rock_send_task(chip_no, 0,thr);
  1844. break;
  1845. }
  1846. }
  1847. memset(nonce_bin, 0, sizeof(nonce_bin));
  1848. ret = icarus_get_nonce(icarus, nonce_bin, &tv_start, &tv_finish, thr, 3000);//info->read_time);
  1849. nonce_data.chip_no = nonce_bin[NONCE_CHIP_NO_OFFSET] & RM_CHIP_MASK;
  1850. if (nonce_data.chip_no >= info->rmdev.chip_max)
  1851. nonce_data.chip_no = 0;
  1852. nonce_data.task_no = nonce_bin[NONCE_TASK_NO_OFFSET] & 0x1;
  1853. nonce_data.cmd_value = nonce_bin[NONCE_TASK_CMD_OFFSET] & RM_CMD_MASK;
  1854. nonce_data.work_state = nonce_bin[NONCE_TASK_CMD_OFFSET] & RM_STATUS_MASK;
  1855. temp = (double)nonce_bin[NONCE_COMMAND_OFFSET];
  1856. if (temp != 128)
  1857. icarus->temp = temp;
  1858. if (nonce_data.cmd_value == NONCE_TASK_COMPLETE_CMD) {
  1859. info->rmdev.chip[nonce_data.chip_no].last_received_task_complete_time = time(NULL);
  1860. if (info->g_work[nonce_data.chip_no][nonce_data.task_no]) {
  1861. free_work(info->g_work[nonce_data.chip_no][nonce_data.task_no]);
  1862. info->g_work[nonce_data.chip_no][nonce_data.task_no] = NULL;
  1863. }
  1864. goto out;
  1865. }
  1866. if (nonce_data.cmd_value == NONCE_GET_TASK_CMD) {
  1867. rock_send_task(nonce_data.chip_no, nonce_data.task_no, thr);
  1868. goto out;
  1869. }
  1870. if (ret == ICA_NONCE_TIMEOUT)
  1871. rock_send_task(nonce_data.chip_no, nonce_data.task_no, thr);
  1872. work = info->g_work[nonce_data.chip_no][nonce_data.task_no];
  1873. if (work == NULL)
  1874. goto out;
  1875. if (ret == ICA_NONCE_ERROR)
  1876. goto out;
  1877. // aborted before becoming idle, get new work
  1878. if (ret == ICA_NONCE_TIMEOUT || ret == ICA_NONCE_RESTART) {
  1879. timersub(&tv_finish, &tv_start, &elapsed);
  1880. // ONLY up to just when it aborted
  1881. // We didn't read a reply so we don't subtract ICARUS_READ_TIME
  1882. estimate_hashes = ((double)(elapsed.tv_sec)
  1883. + ((double)(elapsed.tv_usec))/((double)1000000)) / info->Hs;
  1884. // If some Serial-USB delay allowed the full nonce range to
  1885. // complete it can't have done more than a full nonce
  1886. if (unlikely(estimate_hashes > 0xffffffff))
  1887. estimate_hashes = 0xffffffff;
  1888. applog(LOG_DEBUG, "%s %d: no nonce = 0x%08lX hashes (%ld.%06lds)",
  1889. icarus->drv->name, icarus->device_id,
  1890. (long unsigned int)estimate_hashes,
  1891. (long)elapsed.tv_sec, (long)elapsed.tv_usec);
  1892. goto out;
  1893. }
  1894. memcpy((char *)&nonce, nonce_bin, ICARUS_READ_SIZE);
  1895. nonce = htobe32(nonce);
  1896. recv_time = time(NULL);
  1897. if ((recv_time-info->rmdev.dev_detect_time) >= 60) {
  1898. unsigned char i;
  1899. info->rmdev.dev_detect_time = recv_time;
  1900. for (i = 0; i < info->rmdev.chip_max; i ++) {
  1901. if (info->rmdev.chip[i].error_cnt >= 12) {
  1902. if (info->rmdev.chip[i].freq > info->rmdev.min_frq)
  1903. info->rmdev.chip[i].freq--;
  1904. } else if (info->rmdev.chip[i].error_cnt <= 1) {
  1905. if (info->rmdev.chip[i].freq < (info->rmdev.def_frq / 10 - 1))
  1906. info->rmdev.chip[i].freq++;
  1907. }
  1908. info->rmdev.chip[i].error_cnt = 0;
  1909. }
  1910. }
  1911. correction_times = 0;
  1912. info->nonces_checked++;
  1913. while (correction_times < NONCE_CORRECTION_TIMES) {
  1914. uint32_t new_nonce;
  1915. if (correction_times > 0) {
  1916. info->nonces_correction_tests++;
  1917. if (correction_times == 1)
  1918. info->nonces_correction_times++;
  1919. }
  1920. new_nonce = nonce + rbox_corr_values[correction_times];
  1921. /* Basic dupe testing */
  1922. if (new_nonce == info->last_nonce[nonce_data.chip_no][nonce_data.task_no])
  1923. break;
  1924. if (test_nonce(work, new_nonce)) {
  1925. nonce = new_nonce;
  1926. submit_tested_work(thr, work);
  1927. info->last_nonce[nonce_data.chip_no][nonce_data.task_no] = nonce;
  1928. info->nonces_correction[correction_times]++;
  1929. hash_count++;
  1930. info->failing = false;
  1931. applog(LOG_DEBUG, "Rockminer nonce :::OK:::");
  1932. break;
  1933. } else {
  1934. applog(LOG_DEBUG, "Rockminer nonce error times = %d", correction_times);
  1935. if (new_nonce == 0)
  1936. break;
  1937. }
  1938. correction_times++;
  1939. }
  1940. if (correction_times >= NONCE_CORRECTION_TIMES) {
  1941. inc_hw_errors(thr);
  1942. info->nonces_fail++;
  1943. }
  1944. hash_count = (hash_count * info->nonce_mask);
  1945. if (opt_debug || info->do_icarus_timing)
  1946. timersub(&tv_finish, &tv_start, &elapsed);
  1947. applog(LOG_DEBUG, "%s %d: nonce = 0x%08x = 0x%08lX hashes (%ld.%06lds)",
  1948. icarus->drv->name, icarus->device_id,
  1949. nonce, (long unsigned int)hash_count,
  1950. (long)elapsed.tv_sec, (long)elapsed.tv_usec);
  1951. out:
  1952. return hash_count;
  1953. }
  1954. static struct api_data *icarus_api_stats(struct cgpu_info *cgpu)
  1955. {
  1956. struct api_data *root = NULL;
  1957. struct ICARUS_INFO *info = (struct ICARUS_INFO *)(cgpu->device_data);
  1958. char data[4096];
  1959. int i, off;
  1960. size_t len;
  1961. float avg;
  1962. // Warning, access to these is not locked - but we don't really
  1963. // care since hashing performance is way more important than
  1964. // locking access to displaying API debug 'stats'
  1965. // If locking becomes an issue for any of them, use copy_data=true also
  1966. root = api_add_int(root, "read_time", &(info->read_time), false);
  1967. root = api_add_int(root, "read_time_limit", &(info->read_time_limit), false);
  1968. root = api_add_double(root, "fullnonce", &(info->fullnonce), false);
  1969. root = api_add_int(root, "count", &(info->count), false);
  1970. root = api_add_hs(root, "Hs", &(info->Hs), false);
  1971. root = api_add_double(root, "W", &(info->W), false);
  1972. root = api_add_uint(root, "total_values", &(info->values), false);
  1973. root = api_add_uint64(root, "range", &(info->hash_count_range), false);
  1974. root = api_add_uint64(root, "history_count", &(info->history_count), false);
  1975. root = api_add_timeval(root, "history_time", &(info->history_time), false);
  1976. root = api_add_uint(root, "min_data_count", &(info->min_data_count), false);
  1977. root = api_add_uint(root, "timing_values", &(info->history[0].values), false);
  1978. root = api_add_const(root, "timing_mode", timing_mode_str(info->timing_mode), false);
  1979. root = api_add_bool(root, "is_timing", &(info->do_icarus_timing), false);
  1980. root = api_add_int(root, "baud", &(info->baud), false);
  1981. root = api_add_int(root, "work_division", &(info->work_division), false);
  1982. root = api_add_int(root, "fpga_count", &(info->fpga_count), false);
  1983. if (info->ident == IDENT_LIN) {
  1984. root = api_add_string(root, "rock_init", info->rock_init, false);
  1985. root = api_add_uint8(root, "rock_chips", &(info->rmdev.detect_chip_no), false);
  1986. root = api_add_uint8(root, "rock_chip_max", &(info->rmdev.chip_max), false);
  1987. root = api_add_uint8(root, "rock_prod_id", &(info->rmdev.product_id), false);
  1988. root = api_add_avg(root, "rock_min_freq", &(info->rmdev.min_frq), false);
  1989. root = api_add_avg(root, "rock_max_freq", &(info->rmdev.max_frq), false);
  1990. root = api_add_uint64(root, "rock_check", &(info->nonces_checked), false);
  1991. root = api_add_uint64(root, "rock_corr", &(info->nonces_correction_times), false);
  1992. root = api_add_uint64(root, "rock_corr_tests", &(info->nonces_correction_tests), false);
  1993. root = api_add_uint64(root, "rock_corr_fail", &(info->nonces_fail), false);
  1994. if (info->nonces_checked <= 0)
  1995. avg = 0;
  1996. else
  1997. avg = (float)(info->nonces_correction_tests) / (float)(info->nonces_checked);
  1998. root = api_add_avg(root, "rock_corr_avg", &avg, true);
  1999. data[0] = '\0';
  2000. off = 0;
  2001. for (i = 0; i < NONCE_CORRECTION_TIMES; i++) {
  2002. len = snprintf(data+off, sizeof(data)-off,
  2003. "%s%"PRIu64,
  2004. i > 0 ? "/" : "",
  2005. info->nonces_correction[i]);
  2006. if (len >= (sizeof(data)-off))
  2007. off = sizeof(data)-1;
  2008. else {
  2009. if (len > 0)
  2010. off += len;
  2011. }
  2012. }
  2013. root = api_add_string(root, "rock_corr_finds", data, true);
  2014. }
  2015. return root;
  2016. }
  2017. static void icarus_statline_before(char *buf, size_t bufsiz, struct cgpu_info *cgpu)
  2018. {
  2019. struct ICARUS_INFO *info = (struct ICARUS_INFO *)(cgpu->device_data);
  2020. if (info->ant) {
  2021. if (info->u3)
  2022. tailsprintf(buf, bufsiz, "%3.0fMHz %3dmV", opt_au3_freq, opt_au3_volt);
  2023. else
  2024. tailsprintf(buf, bufsiz, "%3.0fMHz", opt_anu_freq);
  2025. } else if (info->ident == IDENT_CMR2 && info->cmr2_speed > 0)
  2026. tailsprintf(buf, bufsiz, "%5.1fMhz", (float)(info->cmr2_speed) * ICARUS_CMR2_SPEED_FACTOR);
  2027. }
  2028. static void icarus_shutdown(__maybe_unused struct thr_info *thr)
  2029. {
  2030. // TODO: ?
  2031. }
  2032. static void icarus_identify(struct cgpu_info *cgpu)
  2033. {
  2034. struct ICARUS_INFO *info = (struct ICARUS_INFO *)(cgpu->device_data);
  2035. if (info->ident == IDENT_CMR2)
  2036. info->flash_next_work = true;
  2037. }
  2038. static char *icarus_set(struct cgpu_info *cgpu, char *option, char *setting, char *replybuf, size_t siz)
  2039. {
  2040. struct ICARUS_INFO *info = (struct ICARUS_INFO *)(cgpu->device_data);
  2041. int val;
  2042. if (info->ident != IDENT_CMR2) {
  2043. snprintf(replybuf, siz, "no set options available");
  2044. return replybuf;
  2045. }
  2046. if (strcasecmp(option, "help") == 0) {
  2047. snprintf(replybuf, siz, "clock: range %d-%d",
  2048. ICARUS_CMR2_SPEED_MIN_INT, ICARUS_CMR2_SPEED_MAX_INT);
  2049. return replybuf;
  2050. }
  2051. if (strcasecmp(option, "clock") == 0) {
  2052. if (!setting || !*setting) {
  2053. snprintf(replybuf, siz, "missing clock setting");
  2054. return replybuf;
  2055. }
  2056. val = atoi(setting);
  2057. if (val < ICARUS_CMR2_SPEED_MIN_INT || val > ICARUS_CMR2_SPEED_MAX_INT) {
  2058. snprintf(replybuf, siz, "invalid clock: '%s' valid range %d-%d",
  2059. setting,
  2060. ICARUS_CMR2_SPEED_MIN_INT,
  2061. ICARUS_CMR2_SPEED_MAX_INT);
  2062. }
  2063. info->cmr2_speed = CMR2_INT_TO_SPEED(val);
  2064. info->speed_next_work = true;
  2065. return NULL;
  2066. }
  2067. snprintf(replybuf, siz, "Unknown option: %s", option);
  2068. return replybuf;
  2069. }
  2070. struct device_drv icarus_drv = {
  2071. .drv_id = DRIVER_icarus,
  2072. .dname = "Icarus",
  2073. .name = "ICA",
  2074. .drv_detect = icarus_detect,
  2075. .hash_work = &hash_driver_work,
  2076. .get_api_stats = icarus_api_stats,
  2077. .get_statline_before = icarus_statline_before,
  2078. .set_device = icarus_set,
  2079. .identify_device = icarus_identify,
  2080. .thread_prepare = icarus_prepare,
  2081. .scanwork = icarus_scanwork,
  2082. .thread_shutdown = icarus_shutdown,
  2083. };