#
# Makefile for "other" implemented platforms.
#
# * Copyright 2013-2015 by Bill Westfield.  Part of Optiboot.
# * This software is licensed under version 2 of the Gnu Public Licence.
# * See optiboot.c for details.
#

#
# Extra chips (maybe) supported by optiboot
# Note that these are usually only minimally tested.
#

#
# ATmega88
#
atmega88: TARGET = atmega88
atmega88: MCU_TARGET = atmega88
atmega88: CFLAGS += $(COMMON_OPTIONS)
atmega88: AVR_FREQ ?= 16000000L 
atmega88: LDSECTIONS  = -Wl,--section-start=.text=0x1e00 -Wl,--section-start=.version=0x1ffe -Wl,--gc-sections -Wl,--undefined=optiboot_version
atmega88: $(PROGRAM)_atmega88.hex
atmega88: $(PROGRAM)_atmega88.lst

atmega88_isp: atmega88
atmega88_isp: TARGET = atmega88
atmega88_isp: MCU_TARGET = atmega88
# 2.7V brownout
atmega88_isp: HFUSE ?= DD
# Low power xtal (16MHz) 16KCK/14CK+65ms
atmega88_isp: LFUSE ?= FF
# 512 byte boot
atmega88_isp: EFUSE ?= 04
atmega88_isp: isp

atmega88p_isp: atmega88
atmega88p_isp: TARGET = atmega88
atmega88p_isp: MCU_TARGET = atmega88p
# 2.7V brownout
atmega88p_isp: HFUSE ?= DD
# Low power xtal (16MHz) 16KCK/14CK+65ms
atmega88p_isp: LFUSE ?= FF
# 512 byte boot
atmega88p_isp: EFUSE ?= 04
atmega88p_isp: isp

#
# ATmega168p [QFN32]
#
atmega168p: TARGET = atmega168p
atmega168p: MCU_TARGET = atmega168p
atmega168p: CFLAGS += $(COMMON_OPTIONS)
atmega168p: AVR_FREQ ?= 16000000L 
atmega168p: $(PROGRAM)_atmega168p_16MHz.hex
atmega168p: $(PROGRAM)_atmega168p_16MHz.lst

atmega168p_isp: atmega168p
atmega168p_isp: TARGET = atmega168p
# 2.7V brownout
atmega168p_isp: HFUSE ?= DD
# Low power xtal (16MHz) 16KCK/14CK+65ms
atmega168p_isp: LFUSE ?= FF
# 512 byte boot
atmega168p_isp: EFUSE ?= 04
atmega168p_isp: isp

#
# ATmega32
#
atmega32: TARGET = atmega32
atmega32: MCU_TARGET = atmega32
atmega32: CFLAGS += $(COMMON_OPTIONS)
atmega32: AVR_FREQ ?= 11059200L
atmega32: LDSECTIONS  = -Wl,--section-start=.text=0x7e00 -Wl,--section-start=.version=0x7ffe
atmega32: $(PROGRAM)_atmega32.hex
atmega32: $(PROGRAM)_atmega32.lst

atmega32_isp: atmega32
atmega32_isp: TARGET = atmega32
atmega32_isp: MCU_TARGET = atmega32
# No OCD or JTAG, SPIEN, CKOPT (for full swing xtal), Bootsize=512B
atmega32_isp: HFUSE ?= CE
# 2.7V brownout, 16MHz Xtal, 16KCK/14CK+65ms
atmega32_isp: LFUSE ?= BF
atmega32_isp: isp



#
# ATtiny84
#
attiny84: TARGET = attiny84
attiny84: MCU_TARGET = attiny84
attiny84: CFLAGS += $(COMMON_OPTIONS) -DSOFT_UART -DVIRTUAL_BOOT_PARTITION -Dsave_vect_num=4
attiny84: LDSECTIONS = -Wl,--section-start=.text=0x1d00 -Wl,--section-start=.version=0x1ffe -Wl,--gc-sections -Wl,--undefined=optiboot_version
attiny84: $(PROGRAM)_attiny84.hex
attiny84: $(PROGRAM)_attiny84.lst



# 1MHz clocked platforms/boards
#
# These are capable of 9600 baud
#

luminet: TARGET = $@
luminet: CHIP = attiny84
luminet:
	$(MAKE) $(CHIP) AVR_FREQ=1000000L LED_START_FLASHES=0 BAUD_RATE=9600
	mv $(PROGRAM)_$(CHIP).hex $(PROGRAM)_$(TARGET).hex
	mv $(PROGRAM)_$(CHIP).lst $(PROGRAM)_$(TARGET).lst

luminet_isp: luminet
luminet_isp: TARGET = luminet
luminet_isp: MCU_TARGET = attiny84
# Brownout disabled
luminet_isp: HFUSE ?= DF
# 1MHz internal oscillator, slowly rising power
luminet_isp: LFUSE ?= 62
# Self-programming enable
luminet_isp: EFUSE ?= FE
luminet_isp: isp