0030-MIPS-add-board-support-for-Gigaset-SX76X.patch 8.1 KB

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  1. From 9e9dec563e4d061e7b34d2d59a89eb05c60f43a7 Mon Sep 17 00:00:00 2001
  2. From: Luka Perkov <luka@openwrt.org>
  3. Date: Sat, 2 Mar 2013 23:34:00 +0100
  4. Subject: MIPS: add board support for Gigaset SX76X
  5. Signed-off-by: Luka Perkov <luka@openwrt.org>
  6. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
  7. --- /dev/null
  8. +++ b/board/gigaset/sx76x/Makefile
  9. @@ -0,0 +1,27 @@
  10. +#
  11. +# Copyright (C) 2000-2011 Wolfgang Denk, DENX Software Engineering, wd@denx.de
  12. +#
  13. +# SPDX-License-Identifier: GPL-2.0+
  14. +#
  15. +
  16. +include $(TOPDIR)/config.mk
  17. +
  18. +LIB = $(obj)lib$(BOARD).o
  19. +
  20. +COBJS = $(BOARD).o
  21. +
  22. +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
  23. +OBJS := $(addprefix $(obj),$(COBJS))
  24. +SOBJS := $(addprefix $(obj),$(SOBJS))
  25. +
  26. +$(LIB): $(obj).depend $(OBJS) $(SOBJS)
  27. + $(call cmd_link_o_target, $(OBJS) $(SOBJS))
  28. +
  29. +#########################################################################
  30. +
  31. +# defines $(obj).depend target
  32. +include $(SRCTREE)/rules.mk
  33. +
  34. +sinclude $(obj).depend
  35. +
  36. +#########################################################################
  37. --- /dev/null
  38. +++ b/board/gigaset/sx76x/config.mk
  39. @@ -0,0 +1,7 @@
  40. +#
  41. +# Copyright (C) 2011-2013 Daniel Schwierzeck, daniel.schwierzeck@gmail.com
  42. +#
  43. +# SPDX-License-Identifier: GPL-2.0+
  44. +#
  45. +
  46. +PLATFORM_CPPFLAGS += -I$(TOPDIR)/board/$(BOARDDIR)
  47. --- /dev/null
  48. +++ b/board/gigaset/sx76x/ddr_settings.h
  49. @@ -0,0 +1,55 @@
  50. +/*
  51. + * Copyright (C) 2011-2013 Luka Perkov <luka@openwrt.org>
  52. + *
  53. + * This file has been generated with lantiq_ram_extract_magic.awk script.
  54. + *
  55. + * SPDX-License-Identifier: GPL-2.0+
  56. + */
  57. +
  58. +#define MC_DC00_VALUE 0x1B1B
  59. +#define MC_DC01_VALUE 0x0
  60. +#define MC_DC02_VALUE 0x0
  61. +#define MC_DC03_VALUE 0x0
  62. +#define MC_DC04_VALUE 0x0
  63. +#define MC_DC05_VALUE 0x200
  64. +#define MC_DC06_VALUE 0x605
  65. +#define MC_DC07_VALUE 0x303
  66. +#define MC_DC08_VALUE 0x202
  67. +#define MC_DC09_VALUE 0x70A
  68. +#define MC_DC10_VALUE 0x203
  69. +#define MC_DC11_VALUE 0xC02
  70. +#define MC_DC12_VALUE 0x1C8
  71. +#define MC_DC13_VALUE 0x1
  72. +#define MC_DC14_VALUE 0x0
  73. +#define MC_DC15_VALUE 0xF3E
  74. +#define MC_DC16_VALUE 0xC800
  75. +#define MC_DC17_VALUE 0xD
  76. +#define MC_DC18_VALUE 0x300
  77. +#define MC_DC19_VALUE 0x200
  78. +#define MC_DC20_VALUE 0xA04
  79. +#define MC_DC21_VALUE 0xF00
  80. +#define MC_DC22_VALUE 0xF0F
  81. +#define MC_DC23_VALUE 0x0
  82. +#define MC_DC24_VALUE 0x63
  83. +#define MC_DC25_VALUE 0x0
  84. +#define MC_DC26_VALUE 0x100
  85. +#define MC_DC27_VALUE 0x0
  86. +#define MC_DC28_VALUE 0x514
  87. +#define MC_DC29_VALUE 0x2D89
  88. +#define MC_DC30_VALUE 0x8300
  89. +#define MC_DC31_VALUE 0x2002
  90. +#define MC_DC32_VALUE 0x0
  91. +#define MC_DC33_VALUE 0x0
  92. +#define MC_DC34_VALUE 0x0
  93. +#define MC_DC35_VALUE 0x0
  94. +#define MC_DC36_VALUE 0x0
  95. +#define MC_DC37_VALUE 0x0
  96. +#define MC_DC38_VALUE 0x0
  97. +#define MC_DC39_VALUE 0x0
  98. +#define MC_DC40_VALUE 0x0
  99. +#define MC_DC41_VALUE 0x0
  100. +#define MC_DC42_VALUE 0x0
  101. +#define MC_DC43_VALUE 0x0
  102. +#define MC_DC44_VALUE 0x0
  103. +#define MC_DC45_VALUE 0x500
  104. +#define MC_DC46_VALUE 0x0
  105. --- /dev/null
  106. +++ b/board/gigaset/sx76x/sx76x.c
  107. @@ -0,0 +1,65 @@
  108. +/*
  109. + * Copyright (C) 2011 Luka Perkov <luka@openwrt.org>
  110. + *
  111. + * SPDX-License-Identifier: GPL-2.0+
  112. + */
  113. +
  114. +#include <common.h>
  115. +#include <switch.h>
  116. +#include <asm/gpio.h>
  117. +#include <asm/lantiq/eth.h>
  118. +#include <asm/lantiq/reset.h>
  119. +#include <asm/lantiq/chipid.h>
  120. +
  121. +static void gpio_init(void)
  122. +{
  123. + /* Activate reset line of ADM6996I switch */
  124. + gpio_direction_output(19, 0);
  125. +}
  126. +
  127. +int board_early_init_f(void)
  128. +{
  129. + gpio_init();
  130. +
  131. + return 0;
  132. +}
  133. +
  134. +int checkboard(void)
  135. +{
  136. + puts("Board: " CONFIG_BOARD_NAME "\n");
  137. + ltq_chip_print_info();
  138. +
  139. + return 0;
  140. +}
  141. +
  142. +static const struct ltq_eth_port_config eth_port_config[] = {
  143. + /* MAC0: Lantiq ADM6996I switch */
  144. + { 0, 0x0, LTQ_ETH_PORT_SWITCH, PHY_INTERFACE_MODE_RMII },
  145. +};
  146. +
  147. +static const struct ltq_eth_board_config eth_board_config = {
  148. + .ports = eth_port_config,
  149. + .num_ports = ARRAY_SIZE(eth_port_config),
  150. +};
  151. +
  152. +int board_eth_init(bd_t *bis)
  153. +{
  154. + return ltq_eth_initialize(&eth_board_config);
  155. +}
  156. +
  157. +static struct switch_device adm6996i_dev = {
  158. + .name = "adm6996i",
  159. + .cpu_port = 5,
  160. + .port_mask = 0xF,
  161. +};
  162. +
  163. +int board_switch_init(void)
  164. +{
  165. + /* Deactivate reset line of ADM6996I switch */
  166. + gpio_set_value(19, 1);
  167. +
  168. + /* ADM6996I needs some time to come out of reset */
  169. + __udelay(50000);
  170. +
  171. + return switch_device_register(&adm6996i_dev);
  172. +}
  173. --- a/boards.cfg
  174. +++ b/boards.cfg
  175. @@ -510,6 +510,8 @@ Active mips mips32 danub
  176. Active mips mips32 danube arcadyan arv7518pw arv7518pw_ram arv7518pw:SYS_BOOT_RAM Luka Perkov <luka@openwrt.org>
  177. Active mips mips32 danube audiocodes acmp252 acmp252_nor acmp252:SYS_BOOT_NOR Daniel Golle <daniel.golle@gmail.com>
  178. Active mips mips32 danube audiocodes acmp252 acmp252_ram acmp252:SYS_BOOT_RAM Daniel Golle <daniel.golle@gmail.com>
  179. +Active mips mips32 danube gigaset sx76x gigasx76x_nor sx76x:SYS_BOOT_NOR Luka Perkov <luka@openwrt.org>
  180. +Active mips mips32 danube gigaset sx76x gigasx76x_ram sx76x:SYS_BOOT_RAM Luka Perkov <luka@openwrt.org>
  181. Active mips mips32 danube lantiq easy50712 easy50712_nor easy50712:SYS_BOOT_NOR Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
  182. Active mips mips32 danube lantiq easy50712 easy50712_norspl easy50712:SYS_BOOT_NORSPL Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
  183. Active mips mips32 danube lantiq easy50712 easy50712_ram easy50712:SYS_BOOT_RAM Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
  184. --- /dev/null
  185. +++ b/include/configs/sx76x.h
  186. @@ -0,0 +1,59 @@
  187. +/*
  188. + * Copyright (C) 2011-2013 Luka Perkov <luka@openwrt.org>
  189. + *
  190. + * SPDX-License-Identifier: GPL-2.0+
  191. + */
  192. +
  193. +#ifndef __CONFIG_H
  194. +#define __CONFIG_H
  195. +
  196. +#define CONFIG_MACH_TYPE "GIGASX76X"
  197. +#define CONFIG_IDENT_STRING " "CONFIG_MACH_TYPE
  198. +#define CONFIG_BOARD_NAME "Gigaset sx76x"
  199. +
  200. +/* Configure SoC */
  201. +#define CONFIG_LTQ_SUPPORT_UART /* Enable ASC and UART */
  202. +
  203. +#define CONFIG_LTQ_SUPPORT_ETHERNET /* Enable ethernet */
  204. +
  205. +#define CONFIG_LTQ_SUPPORT_NOR_FLASH /* Have a parallel NOR flash */
  206. +
  207. +/* Switch devices */
  208. +#define CONFIG_SWITCH_MULTI
  209. +#define CONFIG_SWITCH_ADM6996I
  210. +
  211. +/* Environment */
  212. +#if defined(CONFIG_SYS_BOOT_NOR)
  213. +#define CONFIG_ENV_IS_IN_FLASH
  214. +#define CONFIG_ENV_OVERWRITE
  215. +#define CONFIG_ENV_OFFSET (256 * 1024)
  216. +#define CONFIG_ENV_SECT_SIZE (64 * 1024)
  217. +#else
  218. +#define CONFIG_ENV_IS_NOWHERE
  219. +#endif
  220. +
  221. +#define CONFIG_ENV_SIZE (8 * 1024)
  222. +#define CONFIG_LOADADDR CONFIG_SYS_LOAD_ADDR
  223. +
  224. +/* Console */
  225. +#define CONFIG_LTQ_ADVANCED_CONSOLE
  226. +#define CONFIG_BAUDRATE 115200
  227. +#define CONFIG_CONSOLE_ASC 1
  228. +#define CONFIG_CONSOLE_DEV "ttyLTQ1"
  229. +
  230. +/* Pull in default board configs for Lantiq XWAY Danube */
  231. +#include <asm/lantiq/config.h>
  232. +#include <asm/arch/config.h>
  233. +
  234. +/* Pull in default OpenWrt configs for Lantiq SoC */
  235. +#include "openwrt-lantiq-common.h"
  236. +
  237. +#define CONFIG_ENV_UPDATE_UBOOT_NOR \
  238. + "update-uboot-nor=run load-uboot-nor write-uboot-nor\0"
  239. +
  240. +#define CONFIG_EXTRA_ENV_SETTINGS \
  241. + CONFIG_ENV_LANTIQ_DEFAULTS \
  242. + CONFIG_ENV_UPDATE_UBOOT_NOR \
  243. + "kernel_addr=0xB0040000\0"
  244. +
  245. +#endif /* __CONFIG_H */