200-amba_pl010_hacks.patch 12 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354
  1. --- a/drivers/tty/serial/amba-pl010.c
  2. +++ b/drivers/tty/serial/amba-pl010.c
  3. @@ -48,11 +48,9 @@
  4. #include <linux/slab.h>
  5. #include <linux/io.h>
  6. -#define UART_NR 8
  7. -
  8. #define SERIAL_AMBA_MAJOR 204
  9. #define SERIAL_AMBA_MINOR 16
  10. -#define SERIAL_AMBA_NR UART_NR
  11. +#define SERIAL_AMBA_NR CONFIG_SERIAL_AMBA_PL010_NUMPORTS
  12. #define AMBA_ISR_PASS_LIMIT 256
  13. @@ -78,9 +76,9 @@ static void pl010_stop_tx(struct uart_po
  14. struct uart_amba_port *uap = (struct uart_amba_port *)port;
  15. unsigned int cr;
  16. - cr = readb(uap->port.membase + UART010_CR);
  17. + cr = __raw_readl(uap->port.membase + UART010_CR);
  18. cr &= ~UART010_CR_TIE;
  19. - writel(cr, uap->port.membase + UART010_CR);
  20. + __raw_writel(cr, uap->port.membase + UART010_CR);
  21. }
  22. static void pl010_start_tx(struct uart_port *port)
  23. @@ -88,9 +86,9 @@ static void pl010_start_tx(struct uart_p
  24. struct uart_amba_port *uap = (struct uart_amba_port *)port;
  25. unsigned int cr;
  26. - cr = readb(uap->port.membase + UART010_CR);
  27. + cr = __raw_readl(uap->port.membase + UART010_CR);
  28. cr |= UART010_CR_TIE;
  29. - writel(cr, uap->port.membase + UART010_CR);
  30. + __raw_writel(cr, uap->port.membase + UART010_CR);
  31. }
  32. static void pl010_stop_rx(struct uart_port *port)
  33. @@ -98,9 +96,9 @@ static void pl010_stop_rx(struct uart_po
  34. struct uart_amba_port *uap = (struct uart_amba_port *)port;
  35. unsigned int cr;
  36. - cr = readb(uap->port.membase + UART010_CR);
  37. + cr = __raw_readl(uap->port.membase + UART010_CR);
  38. cr &= ~(UART010_CR_RIE | UART010_CR_RTIE);
  39. - writel(cr, uap->port.membase + UART010_CR);
  40. + __raw_writel(cr, uap->port.membase + UART010_CR);
  41. }
  42. static void pl010_enable_ms(struct uart_port *port)
  43. @@ -108,18 +106,18 @@ static void pl010_enable_ms(struct uart_
  44. struct uart_amba_port *uap = (struct uart_amba_port *)port;
  45. unsigned int cr;
  46. - cr = readb(uap->port.membase + UART010_CR);
  47. + cr = __raw_readl(uap->port.membase + UART010_CR);
  48. cr |= UART010_CR_MSIE;
  49. - writel(cr, uap->port.membase + UART010_CR);
  50. + __raw_writel(cr, uap->port.membase + UART010_CR);
  51. }
  52. static void pl010_rx_chars(struct uart_amba_port *uap)
  53. {
  54. unsigned int status, ch, flag, rsr, max_count = 256;
  55. - status = readb(uap->port.membase + UART01x_FR);
  56. + status = __raw_readl(uap->port.membase + UART01x_FR);
  57. while (UART_RX_DATA(status) && max_count--) {
  58. - ch = readb(uap->port.membase + UART01x_DR);
  59. + ch = __raw_readl(uap->port.membase + UART01x_DR);
  60. flag = TTY_NORMAL;
  61. uap->port.icount.rx++;
  62. @@ -128,9 +126,9 @@ static void pl010_rx_chars(struct uart_a
  63. * Note that the error handling code is
  64. * out of the main execution path
  65. */
  66. - rsr = readb(uap->port.membase + UART01x_RSR) | UART_DUMMY_RSR_RX;
  67. + rsr = __raw_readl(uap->port.membase + UART01x_RSR) | UART_DUMMY_RSR_RX;
  68. if (unlikely(rsr & UART01x_RSR_ANY)) {
  69. - writel(0, uap->port.membase + UART01x_ECR);
  70. + __raw_writel(0, uap->port.membase + UART01x_ECR);
  71. if (rsr & UART01x_RSR_BE) {
  72. rsr &= ~(UART01x_RSR_FE | UART01x_RSR_PE);
  73. @@ -160,7 +158,7 @@ static void pl010_rx_chars(struct uart_a
  74. uart_insert_char(&uap->port, rsr, UART01x_RSR_OE, ch, flag);
  75. ignore_char:
  76. - status = readb(uap->port.membase + UART01x_FR);
  77. + status = __raw_readl(uap->port.membase + UART01x_FR);
  78. }
  79. spin_unlock(&uap->port.lock);
  80. tty_flip_buffer_push(&uap->port.state->port);
  81. @@ -173,7 +171,7 @@ static void pl010_tx_chars(struct uart_a
  82. int count;
  83. if (uap->port.x_char) {
  84. - writel(uap->port.x_char, uap->port.membase + UART01x_DR);
  85. + __raw_writel(uap->port.x_char, uap->port.membase + UART01x_DR);
  86. uap->port.icount.tx++;
  87. uap->port.x_char = 0;
  88. return;
  89. @@ -185,7 +183,7 @@ static void pl010_tx_chars(struct uart_a
  90. count = uap->port.fifosize >> 1;
  91. do {
  92. - writel(xmit->buf[xmit->tail], uap->port.membase + UART01x_DR);
  93. + __raw_writel(xmit->buf[xmit->tail], uap->port.membase + UART01x_DR);
  94. xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
  95. uap->port.icount.tx++;
  96. if (uart_circ_empty(xmit))
  97. @@ -203,9 +201,9 @@ static void pl010_modem_status(struct ua
  98. {
  99. unsigned int status, delta;
  100. - writel(0, uap->port.membase + UART010_ICR);
  101. + __raw_writel(0, uap->port.membase + UART010_ICR);
  102. - status = readb(uap->port.membase + UART01x_FR) & UART01x_FR_MODEM_ANY;
  103. + status = __raw_readl(uap->port.membase + UART01x_FR) & UART01x_FR_MODEM_ANY;
  104. delta = status ^ uap->old_status;
  105. uap->old_status = status;
  106. @@ -233,7 +231,7 @@ static irqreturn_t pl010_int(int irq, vo
  107. spin_lock(&uap->port.lock);
  108. - status = readb(uap->port.membase + UART010_IIR);
  109. + status = __raw_readl(uap->port.membase + UART010_IIR);
  110. if (status) {
  111. do {
  112. if (status & (UART010_IIR_RTIS | UART010_IIR_RIS))
  113. @@ -246,7 +244,7 @@ static irqreturn_t pl010_int(int irq, vo
  114. if (pass_counter-- == 0)
  115. break;
  116. - status = readb(uap->port.membase + UART010_IIR);
  117. + status = __raw_readl(uap->port.membase + UART010_IIR);
  118. } while (status & (UART010_IIR_RTIS | UART010_IIR_RIS |
  119. UART010_IIR_TIS));
  120. handled = 1;
  121. @@ -260,7 +258,7 @@ static irqreturn_t pl010_int(int irq, vo
  122. static unsigned int pl010_tx_empty(struct uart_port *port)
  123. {
  124. struct uart_amba_port *uap = (struct uart_amba_port *)port;
  125. - unsigned int status = readb(uap->port.membase + UART01x_FR);
  126. + unsigned int status = __raw_readl(uap->port.membase + UART01x_FR);
  127. return status & UART01x_FR_BUSY ? 0 : TIOCSER_TEMT;
  128. }
  129. @@ -270,7 +268,7 @@ static unsigned int pl010_get_mctrl(stru
  130. unsigned int result = 0;
  131. unsigned int status;
  132. - status = readb(uap->port.membase + UART01x_FR);
  133. + status = __raw_readl(uap->port.membase + UART01x_FR);
  134. if (status & UART01x_FR_DCD)
  135. result |= TIOCM_CAR;
  136. if (status & UART01x_FR_DSR)
  137. @@ -296,12 +294,12 @@ static void pl010_break_ctl(struct uart_
  138. unsigned int lcr_h;
  139. spin_lock_irqsave(&uap->port.lock, flags);
  140. - lcr_h = readb(uap->port.membase + UART010_LCRH);
  141. + lcr_h = __raw_readl(uap->port.membase + UART010_LCRH);
  142. if (break_state == -1)
  143. lcr_h |= UART01x_LCRH_BRK;
  144. else
  145. lcr_h &= ~UART01x_LCRH_BRK;
  146. - writel(lcr_h, uap->port.membase + UART010_LCRH);
  147. + __raw_writel(lcr_h, uap->port.membase + UART010_LCRH);
  148. spin_unlock_irqrestore(&uap->port.lock, flags);
  149. }
  150. @@ -329,12 +327,12 @@ static int pl010_startup(struct uart_por
  151. /*
  152. * initialise the old status of the modem signals
  153. */
  154. - uap->old_status = readb(uap->port.membase + UART01x_FR) & UART01x_FR_MODEM_ANY;
  155. + uap->old_status = __raw_readl(uap->port.membase + UART01x_FR) & UART01x_FR_MODEM_ANY;
  156. /*
  157. * Finally, enable interrupts
  158. */
  159. - writel(UART01x_CR_UARTEN | UART010_CR_RIE | UART010_CR_RTIE,
  160. + __raw_writel(UART01x_CR_UARTEN | UART010_CR_RIE | UART010_CR_RTIE,
  161. uap->port.membase + UART010_CR);
  162. return 0;
  163. @@ -357,10 +355,10 @@ static void pl010_shutdown(struct uart_p
  164. /*
  165. * disable all interrupts, disable the port
  166. */
  167. - writel(0, uap->port.membase + UART010_CR);
  168. + __raw_writel(0, uap->port.membase + UART010_CR);
  169. /* disable break condition and fifos */
  170. - writel(readb(uap->port.membase + UART010_LCRH) &
  171. + __raw_writel(__raw_readl(uap->port.membase + UART010_LCRH) &
  172. ~(UART01x_LCRH_BRK | UART01x_LCRH_FEN),
  173. uap->port.membase + UART010_LCRH);
  174. @@ -382,7 +380,7 @@ pl010_set_termios(struct uart_port *port
  175. /*
  176. * Ask the core to calculate the divisor for us.
  177. */
  178. - baud = uart_get_baud_rate(port, termios, old, 0, uap->port.uartclk/16);
  179. + baud = uart_get_baud_rate(port, termios, old, 0, uap->port.uartclk/16);
  180. quot = uart_get_divisor(port, baud);
  181. switch (termios->c_cflag & CSIZE) {
  182. @@ -445,25 +443,25 @@ pl010_set_termios(struct uart_port *port
  183. uap->port.ignore_status_mask |= UART_DUMMY_RSR_RX;
  184. /* first, disable everything */
  185. - old_cr = readb(uap->port.membase + UART010_CR) & ~UART010_CR_MSIE;
  186. + old_cr = __raw_readl(uap->port.membase + UART010_CR) & ~UART010_CR_MSIE;
  187. if (UART_ENABLE_MS(port, termios->c_cflag))
  188. old_cr |= UART010_CR_MSIE;
  189. - writel(0, uap->port.membase + UART010_CR);
  190. + __raw_writel(0, uap->port.membase + UART010_CR);
  191. /* Set baud rate */
  192. quot -= 1;
  193. - writel((quot & 0xf00) >> 8, uap->port.membase + UART010_LCRM);
  194. - writel(quot & 0xff, uap->port.membase + UART010_LCRL);
  195. + __raw_writel((quot & 0xf00) >> 8, uap->port.membase + UART010_LCRM);
  196. + __raw_writel(quot & 0xff, uap->port.membase + UART010_LCRL);
  197. /*
  198. * ----------v----------v----------v----------v-----
  199. * NOTE: MUST BE WRITTEN AFTER UARTLCR_M & UARTLCR_L
  200. * ----------^----------^----------^----------^-----
  201. */
  202. - writel(lcr_h, uap->port.membase + UART010_LCRH);
  203. - writel(old_cr, uap->port.membase + UART010_CR);
  204. + __raw_writel(lcr_h, uap->port.membase + UART010_LCRH);
  205. + __raw_writel(old_cr, uap->port.membase + UART010_CR);
  206. spin_unlock_irqrestore(&uap->port.lock, flags);
  207. }
  208. @@ -545,7 +543,7 @@ static struct uart_ops amba_pl010_pops =
  209. .verify_port = pl010_verify_port,
  210. };
  211. -static struct uart_amba_port *amba_ports[UART_NR];
  212. +static struct uart_amba_port *amba_ports[SERIAL_AMBA_NR];
  213. #ifdef CONFIG_SERIAL_AMBA_PL010_CONSOLE
  214. @@ -555,10 +553,10 @@ static void pl010_console_putchar(struct
  215. unsigned int status;
  216. do {
  217. - status = readb(uap->port.membase + UART01x_FR);
  218. + status = __raw_readl(uap->port.membase + UART01x_FR);
  219. barrier();
  220. } while (!UART_TX_READY(status));
  221. - writel(ch, uap->port.membase + UART01x_DR);
  222. + __raw_writel(ch, uap->port.membase + UART01x_DR);
  223. }
  224. static void
  225. @@ -572,8 +570,8 @@ pl010_console_write(struct console *co,
  226. /*
  227. * First save the CR then disable the interrupts
  228. */
  229. - old_cr = readb(uap->port.membase + UART010_CR);
  230. - writel(UART01x_CR_UARTEN, uap->port.membase + UART010_CR);
  231. + old_cr = __raw_readl(uap->port.membase + UART010_CR);
  232. + __raw_writel(UART01x_CR_UARTEN, uap->port.membase + UART010_CR);
  233. uart_console_write(&uap->port, s, count, pl010_console_putchar);
  234. @@ -582,10 +580,10 @@ pl010_console_write(struct console *co,
  235. * and restore the TCR
  236. */
  237. do {
  238. - status = readb(uap->port.membase + UART01x_FR);
  239. + status = __raw_readl(uap->port.membase + UART01x_FR);
  240. barrier();
  241. } while (status & UART01x_FR_BUSY);
  242. - writel(old_cr, uap->port.membase + UART010_CR);
  243. + __raw_writel(old_cr, uap->port.membase + UART010_CR);
  244. clk_disable(uap->clk);
  245. }
  246. @@ -594,9 +592,9 @@ static void __init
  247. pl010_console_get_options(struct uart_amba_port *uap, int *baud,
  248. int *parity, int *bits)
  249. {
  250. - if (readb(uap->port.membase + UART010_CR) & UART01x_CR_UARTEN) {
  251. + if (__raw_readl(uap->port.membase + UART010_CR) & UART01x_CR_UARTEN) {
  252. unsigned int lcr_h, quot;
  253. - lcr_h = readb(uap->port.membase + UART010_LCRH);
  254. + lcr_h = __raw_readl(uap->port.membase + UART010_LCRH);
  255. *parity = 'n';
  256. if (lcr_h & UART01x_LCRH_PEN) {
  257. @@ -611,8 +609,8 @@ pl010_console_get_options(struct uart_am
  258. else
  259. *bits = 8;
  260. - quot = readb(uap->port.membase + UART010_LCRL) |
  261. - readb(uap->port.membase + UART010_LCRM) << 8;
  262. + quot = __raw_readl(uap->port.membase + UART010_LCRL) |
  263. + __raw_readl(uap->port.membase + UART010_LCRM) << 8;
  264. *baud = uap->port.uartclk / (16 * (quot + 1));
  265. }
  266. }
  267. @@ -631,7 +629,7 @@ static int __init pl010_console_setup(st
  268. * if so, search for the first available port that does have
  269. * console support.
  270. */
  271. - if (co->index >= UART_NR)
  272. + if (co->index >= SERIAL_AMBA_NR)
  273. co->index = 0;
  274. uap = amba_ports[co->index];
  275. if (!uap)
  276. @@ -673,7 +671,7 @@ static struct uart_driver amba_reg = {
  277. .dev_name = "ttyAM",
  278. .major = SERIAL_AMBA_MAJOR,
  279. .minor = SERIAL_AMBA_MINOR,
  280. - .nr = UART_NR,
  281. + .nr = SERIAL_AMBA_NR,
  282. .cons = AMBA_CONSOLE,
  283. };
  284. --- a/drivers/tty/serial/Kconfig
  285. +++ b/drivers/tty/serial/Kconfig
  286. @@ -25,10 +25,18 @@ config SERIAL_AMBA_PL010
  287. help
  288. This selects the ARM(R) AMBA(R) PrimeCell PL010 UART. If you have
  289. an Integrator/AP or Integrator/PP2 platform, or if you have a
  290. - Cirrus Logic EP93xx CPU, say Y or M here.
  291. + Cirrus Logic EP93xx CPU or an Infineon ADM5120 SOC, say Y or M here.
  292. If unsure, say N.
  293. +config SERIAL_AMBA_PL010_NUMPORTS
  294. + int "Maximum number of AMBA PL010 serial ports"
  295. + depends on SERIAL_AMBA_PL010
  296. + default "8"
  297. + ---help---
  298. + Set this to the number of serial ports you want the AMBA PL010 driver
  299. + to support.
  300. +
  301. config SERIAL_AMBA_PL010_CONSOLE
  302. bool "Support for console on AMBA serial port"
  303. depends on SERIAL_AMBA_PL010=y