mach-pb92.c 1.7 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970
  1. /*
  2. * Atheros PB92 board support
  3. *
  4. * Copyright (C) 2010 Felix Fietkau <nbd@nbd.name>
  5. * Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org>
  6. * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of the GNU General Public License version 2 as published
  10. * by the Free Software Foundation.
  11. */
  12. #include <asm/mach-ath79/ath79.h>
  13. #include "dev-eth.h"
  14. #include "dev-gpio-buttons.h"
  15. #include "dev-m25p80.h"
  16. #include "dev-usb.h"
  17. #include "machtypes.h"
  18. #include "pci.h"
  19. #define PB92_KEYS_POLL_INTERVAL 20 /* msecs */
  20. #define PB92_KEYS_DEBOUNCE_INTERVAL (3 * PB92_KEYS_POLL_INTERVAL)
  21. #define PB92_GPIO_BTN_SW4 8
  22. #define PB92_GPIO_BTN_SW5 3
  23. static struct gpio_keys_button pb92_gpio_keys[] __initdata = {
  24. {
  25. .desc = "sw4",
  26. .type = EV_KEY,
  27. .code = BTN_0,
  28. .debounce_interval = PB92_KEYS_DEBOUNCE_INTERVAL,
  29. .gpio = PB92_GPIO_BTN_SW4,
  30. .active_low = 1,
  31. }, {
  32. .desc = "sw5",
  33. .type = EV_KEY,
  34. .code = BTN_1,
  35. .debounce_interval = PB92_KEYS_DEBOUNCE_INTERVAL,
  36. .gpio = PB92_GPIO_BTN_SW5,
  37. .active_low = 1,
  38. }
  39. };
  40. static void __init pb92_init(void)
  41. {
  42. u8 *mac = (u8 *) KSEG1ADDR(0x1fff0000);
  43. ath79_register_m25p80(NULL);
  44. ath79_register_mdio(0, ~BIT(0));
  45. ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0);
  46. ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
  47. ath79_eth0_data.speed = SPEED_1000;
  48. ath79_eth0_data.duplex = DUPLEX_FULL;
  49. ath79_eth0_data.phy_mask = BIT(0);
  50. ath79_register_eth(0);
  51. ath79_register_gpio_keys_polled(-1, PB92_KEYS_POLL_INTERVAL,
  52. ARRAY_SIZE(pb92_gpio_keys),
  53. pb92_gpio_keys);
  54. ath79_register_usb();
  55. ath79_register_pci();
  56. }
  57. MIPS_MACHINE(ATH79_MACH_PB92, "PB92", "Atheros PB92", pb92_init);