spi-ap83.c 6.5 KB

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  1. /*
  2. * Atheros AP83 board specific SPI Controller driver
  3. *
  4. * Copyright (C) 2009 Gabor Juhos <juhosg@openwrt.org>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. *
  10. */
  11. #include <linux/kernel.h>
  12. #include <linux/module.h>
  13. #include <linux/init.h>
  14. #include <linux/delay.h>
  15. #include <linux/spinlock.h>
  16. #include <linux/workqueue.h>
  17. #include <linux/platform_device.h>
  18. #include <linux/io.h>
  19. #include <linux/spi/spi.h>
  20. #include <linux/spi/spi_bitbang.h>
  21. #include <linux/bitops.h>
  22. #include <linux/gpio.h>
  23. #include <asm/mach-ath79/ath79.h>
  24. #define DRV_DESC "Atheros AP83 board SPI Controller driver"
  25. #define DRV_VERSION "0.1.0"
  26. #define DRV_NAME "ap83-spi"
  27. #define AP83_SPI_CLK_HIGH (1 << 23)
  28. #define AP83_SPI_CLK_LOW 0
  29. #define AP83_SPI_MOSI_HIGH (1 << 22)
  30. #define AP83_SPI_MOSI_LOW 0
  31. #define AP83_SPI_GPIO_CS 1
  32. #define AP83_SPI_GPIO_MISO 3
  33. struct ap83_spi {
  34. struct spi_bitbang bitbang;
  35. void __iomem *base;
  36. u32 addr;
  37. struct platform_device *pdev;
  38. };
  39. static inline u32 ap83_spi_rr(struct ap83_spi *sp, u32 reg)
  40. {
  41. return __raw_readl(sp->base + reg);
  42. }
  43. static inline struct ap83_spi *spidev_to_sp(struct spi_device *spi)
  44. {
  45. return spi_master_get_devdata(spi->master);
  46. }
  47. static inline void setsck(struct spi_device *spi, int val)
  48. {
  49. struct ap83_spi *sp = spidev_to_sp(spi);
  50. if (val)
  51. sp->addr |= AP83_SPI_CLK_HIGH;
  52. else
  53. sp->addr &= ~AP83_SPI_CLK_HIGH;
  54. dev_dbg(&spi->dev, "addr=%08x, SCK set to %s\n",
  55. sp->addr, (val) ? "HIGH" : "LOW");
  56. ap83_spi_rr(sp, sp->addr);
  57. }
  58. static inline void setmosi(struct spi_device *spi, int val)
  59. {
  60. struct ap83_spi *sp = spidev_to_sp(spi);
  61. if (val)
  62. sp->addr |= AP83_SPI_MOSI_HIGH;
  63. else
  64. sp->addr &= ~AP83_SPI_MOSI_HIGH;
  65. dev_dbg(&spi->dev, "addr=%08x, MOSI set to %s\n",
  66. sp->addr, (val) ? "HIGH" : "LOW");
  67. ap83_spi_rr(sp, sp->addr);
  68. }
  69. static inline u32 getmiso(struct spi_device *spi)
  70. {
  71. u32 ret;
  72. ret = gpio_get_value(AP83_SPI_GPIO_MISO) ? 1 : 0;
  73. dev_dbg(&spi->dev, "get MISO: %d\n", ret);
  74. return ret;
  75. }
  76. static inline void do_spidelay(struct spi_device *spi, unsigned nsecs)
  77. {
  78. ndelay(nsecs);
  79. }
  80. static void ap83_spi_chipselect(struct spi_device *spi, int on)
  81. {
  82. struct ap83_spi *sp = spidev_to_sp(spi);
  83. dev_dbg(&spi->dev, "set CS to %d\n", (on) ? 0 : 1);
  84. if (on) {
  85. ath79_flash_acquire();
  86. sp->addr = 0;
  87. ap83_spi_rr(sp, sp->addr);
  88. gpio_set_value(AP83_SPI_GPIO_CS, 0);
  89. } else {
  90. gpio_set_value(AP83_SPI_GPIO_CS, 1);
  91. ath79_flash_release();
  92. }
  93. }
  94. #define spidelay(nsecs) \
  95. do { \
  96. /* Steal the spi_device pointer from our caller. \
  97. * The bitbang-API should probably get fixed here... */ \
  98. do_spidelay(spi, nsecs); \
  99. } while (0)
  100. #define EXPAND_BITBANG_TXRX
  101. #include <linux/spi/spi_bitbang.h>
  102. #include "spi-bitbang-txrx.h"
  103. static u32 ap83_spi_txrx_mode0(struct spi_device *spi,
  104. unsigned nsecs, u32 word, u8 bits)
  105. {
  106. dev_dbg(&spi->dev, "TXRX0 word=%08x, bits=%u\n", word, bits);
  107. return bitbang_txrx_be_cpha0(spi, nsecs, 0, 0, word, bits);
  108. }
  109. static u32 ap83_spi_txrx_mode1(struct spi_device *spi,
  110. unsigned nsecs, u32 word, u8 bits)
  111. {
  112. dev_dbg(&spi->dev, "TXRX1 word=%08x, bits=%u\n", word, bits);
  113. return bitbang_txrx_be_cpha1(spi, nsecs, 0, 0, word, bits);
  114. }
  115. static u32 ap83_spi_txrx_mode2(struct spi_device *spi,
  116. unsigned nsecs, u32 word, u8 bits)
  117. {
  118. dev_dbg(&spi->dev, "TXRX2 word=%08x, bits=%u\n", word, bits);
  119. return bitbang_txrx_be_cpha0(spi, nsecs, 1, 0, word, bits);
  120. }
  121. static u32 ap83_spi_txrx_mode3(struct spi_device *spi,
  122. unsigned nsecs, u32 word, u8 bits)
  123. {
  124. dev_dbg(&spi->dev, "TXRX3 word=%08x, bits=%u\n", word, bits);
  125. return bitbang_txrx_be_cpha1(spi, nsecs, 1, 0, word, bits);
  126. }
  127. static int ap83_spi_probe(struct platform_device *pdev)
  128. {
  129. struct spi_master *master;
  130. struct ap83_spi *sp;
  131. struct ap83_spi_platform_data *pdata;
  132. struct resource *r;
  133. int ret;
  134. ret = gpio_request(AP83_SPI_GPIO_MISO, "spi-miso");
  135. if (ret) {
  136. dev_err(&pdev->dev, "gpio request failed for MISO\n");
  137. return ret;
  138. }
  139. ret = gpio_request(AP83_SPI_GPIO_CS, "spi-cs");
  140. if (ret) {
  141. dev_err(&pdev->dev, "gpio request failed for CS\n");
  142. goto err_free_miso;
  143. }
  144. ret = gpio_direction_input(AP83_SPI_GPIO_MISO);
  145. if (ret) {
  146. dev_err(&pdev->dev, "unable to set direction of MISO\n");
  147. goto err_free_cs;
  148. }
  149. ret = gpio_direction_output(AP83_SPI_GPIO_CS, 0);
  150. if (ret) {
  151. dev_err(&pdev->dev, "unable to set direction of CS\n");
  152. goto err_free_cs;
  153. }
  154. master = spi_alloc_master(&pdev->dev, sizeof(*sp));
  155. if (master == NULL) {
  156. dev_err(&pdev->dev, "failed to allocate spi master\n");
  157. return -ENOMEM;
  158. }
  159. sp = spi_master_get_devdata(master);
  160. platform_set_drvdata(pdev, sp);
  161. pdata = pdev->dev.platform_data;
  162. sp->bitbang.master = spi_master_get(master);
  163. sp->bitbang.chipselect = ap83_spi_chipselect;
  164. sp->bitbang.txrx_word[SPI_MODE_0] = ap83_spi_txrx_mode0;
  165. sp->bitbang.txrx_word[SPI_MODE_1] = ap83_spi_txrx_mode1;
  166. sp->bitbang.txrx_word[SPI_MODE_2] = ap83_spi_txrx_mode2;
  167. sp->bitbang.txrx_word[SPI_MODE_3] = ap83_spi_txrx_mode3;
  168. sp->bitbang.master->bus_num = pdev->id;
  169. sp->bitbang.master->num_chipselect = 1;
  170. r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  171. if (r == NULL) {
  172. ret = -ENOENT;
  173. goto err_spi_put;
  174. }
  175. sp->base = ioremap_nocache(r->start, r->end - r->start + 1);
  176. if (!sp->base) {
  177. ret = -ENXIO;
  178. goto err_spi_put;
  179. }
  180. ret = spi_bitbang_start(&sp->bitbang);
  181. if (!ret)
  182. goto err_unmap;
  183. dev_info(&pdev->dev, "AP83 SPI adapter at %08x\n", r->start);
  184. return 0;
  185. err_unmap:
  186. iounmap(sp->base);
  187. err_spi_put:
  188. platform_set_drvdata(pdev, NULL);
  189. spi_master_put(sp->bitbang.master);
  190. err_free_cs:
  191. gpio_free(AP83_SPI_GPIO_CS);
  192. err_free_miso:
  193. gpio_free(AP83_SPI_GPIO_MISO);
  194. return ret;
  195. }
  196. static int ap83_spi_remove(struct platform_device *pdev)
  197. {
  198. struct ap83_spi *sp = platform_get_drvdata(pdev);
  199. spi_bitbang_stop(&sp->bitbang);
  200. iounmap(sp->base);
  201. platform_set_drvdata(pdev, NULL);
  202. spi_master_put(sp->bitbang.master);
  203. return 0;
  204. }
  205. static struct platform_driver ap83_spi_drv = {
  206. .probe = ap83_spi_probe,
  207. .remove = ap83_spi_remove,
  208. .driver = {
  209. .name = DRV_NAME,
  210. .owner = THIS_MODULE,
  211. },
  212. };
  213. static int __init ap83_spi_init(void)
  214. {
  215. return platform_driver_register(&ap83_spi_drv);
  216. }
  217. module_init(ap83_spi_init);
  218. static void __exit ap83_spi_exit(void)
  219. {
  220. platform_driver_unregister(&ap83_spi_drv);
  221. }
  222. module_exit(ap83_spi_exit);
  223. MODULE_ALIAS("platform:" DRV_NAME);
  224. MODULE_DESCRIPTION(DRV_DESC);
  225. MODULE_VERSION(DRV_VERSION);
  226. MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>");
  227. MODULE_LICENSE("GPL v2");