820-MIPS-ath79-add_gpio_function2_setup.patch 2.1 KB

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  1. Add access to the function2 gpio register. This probably has to be
  2. converted into a pimux driver later on. This is needed for some setup
  3. functions on the Arduino Yun.
  4. --- a/arch/mips/ath79/common.h
  5. +++ b/arch/mips/ath79/common.h
  6. @@ -27,6 +27,7 @@ void ath79_ddr_wb_flush(unsigned int reg
  7. void ath79_gpio_function_enable(u32 mask);
  8. void ath79_gpio_function_disable(u32 mask);
  9. void ath79_gpio_function_setup(u32 set, u32 clear);
  10. +void ath79_gpio_function2_setup(u32 set, u32 clear);
  11. void ath79_gpio_output_select(unsigned gpio, u8 val);
  12. int ath79_gpio_direction_select(unsigned gpio, bool oe);
  13. void ath79_gpio_init(void);
  14. --- a/arch/mips/ath79/gpio.c
  15. +++ b/arch/mips/ath79/gpio.c
  16. @@ -195,6 +195,36 @@ static void __iomem *ath79_gpio_get_func
  17. return ath79_gpio_base + reg;
  18. }
  19. +static void __iomem *ath79_gpio_get_function2_reg(void)
  20. +{
  21. + u32 reg = 0;
  22. +
  23. + if (soc_is_ar71xx() ||
  24. + soc_is_ar724x() ||
  25. + soc_is_ar913x() ||
  26. + soc_is_ar933x())
  27. + reg = AR71XX_GPIO_REG_FUNC_2;
  28. + else
  29. + BUG();
  30. +
  31. + return ath79_gpio_base + reg;
  32. +}
  33. +
  34. +
  35. +void ath79_gpio_function2_setup(u32 set, u32 clear)
  36. +{
  37. + void __iomem *reg = ath79_gpio_get_function2_reg();
  38. + unsigned long flags;
  39. +
  40. + spin_lock_irqsave(&ath79_gpio_lock, flags);
  41. +
  42. + __raw_writel((__raw_readl(reg) & ~clear) | set, reg);
  43. + /* flush write */
  44. + __raw_readl(reg);
  45. +
  46. + spin_unlock_irqrestore(&ath79_gpio_lock, flags);
  47. +}
  48. +
  49. void ath79_gpio_function_setup(u32 set, u32 clear)
  50. {
  51. void __iomem *reg = ath79_gpio_get_function_reg();
  52. --- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
  53. +++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
  54. @@ -847,6 +847,7 @@
  55. #define AR71XX_GPIO_REG_INT_PENDING 0x20
  56. #define AR71XX_GPIO_REG_INT_ENABLE 0x24
  57. #define AR71XX_GPIO_REG_FUNC 0x28
  58. +#define AR71XX_GPIO_REG_FUNC_2 0x30
  59. #define AR934X_GPIO_REG_OUT_FUNC0 0x2c
  60. #define AR934X_GPIO_REG_OUT_FUNC1 0x30
  61. @@ -971,6 +972,8 @@
  62. #define AR724X_GPIO_FUNC_UART_EN BIT(1)
  63. #define AR724X_GPIO_FUNC_JTAG_DISABLE BIT(0)
  64. +#define AR933X_GPIO_FUNC2_JUMPSTART_DISABLE BIT(9)
  65. +
  66. #define AR913X_GPIO_FUNC_WMAC_LED_EN BIT(22)
  67. #define AR913X_GPIO_FUNC_EXP_PORT_CS_EN BIT(21)
  68. #define AR913X_GPIO_FUNC_I2S_REFCLKEN BIT(20)