145-PCI-iproc-Update-PCIe-device-tree-bindings.patch 1.6 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950
  1. From 8d0afa1a93be2da954c85392bbc7b2264c9d241c Mon Sep 17 00:00:00 2001
  2. From: Ray Jui <rjui@broadcom.com>
  3. Date: Tue, 15 Sep 2015 17:39:20 -0700
  4. Subject: [PATCH 145/147] PCI: iproc: Update PCIe device tree bindings
  5. Update the device tree bindings with added support for outbound mapping
  6. configurations.
  7. Signed-off-by: Ray Jui <rjui@broadcom.com>
  8. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
  9. ---
  10. .../devicetree/bindings/pci/brcm,iproc-pcie.txt | 20 ++++++++++++++++++++
  11. 1 file changed, 20 insertions(+)
  12. --- a/Documentation/devicetree/bindings/pci/brcm,iproc-pcie.txt
  13. +++ b/Documentation/devicetree/bindings/pci/brcm,iproc-pcie.txt
  14. @@ -17,6 +17,21 @@ Optional properties:
  15. - phys: phandle of the PCIe PHY device
  16. - phy-names: must be "pcie-phy"
  17. +- brcm,pcie-ob: Some iProc SoCs do not have the outbound address mapping done
  18. +by the ASIC after power on reset. In this case, SW needs to configure it
  19. +
  20. +If the brcm,pcie-ob property is present, the following properties become
  21. +effective:
  22. +
  23. +Required:
  24. +- brcm,pcie-ob-axi-offset: The offset from the AXI address to the internal
  25. +address used by the iProc PCIe core (not the PCIe address)
  26. +- brcm,pcie-ob-window-size: The outbound address mapping window size (in MB)
  27. +
  28. +Optional:
  29. +- brcm,pcie-ob-oarr-size: Some iProc SoCs need the OARR size bit to be set to
  30. +increase the outbound window size
  31. +
  32. Example:
  33. pcie0: pcie@18012000 {
  34. compatible = "brcm,iproc-pcie";
  35. @@ -38,6 +53,11 @@ Example:
  36. phys = <&phy 0 5>;
  37. phy-names = "pcie-phy";
  38. +
  39. + brcm,pcie-ob;
  40. + brcm,pcie-ob-oarr-size;
  41. + brcm,pcie-ob-axi-offset = <0x00000000>;
  42. + brcm,pcie-ob-window-size = <256>;
  43. };
  44. pcie1: pcie@18013000 {