0156-Aux-SPI-1-2-implementation.patch 20 KB

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  1. From 67fd5e9a91ad7abeb3ebfa30753c375e0953b52e Mon Sep 17 00:00:00 2001
  2. From: Fraser <github@frasersdev.net>
  3. Date: Tue, 23 Feb 2016 10:04:37 +1100
  4. Subject: [PATCH 156/381] Aux SPI 1&2 implementation
  5. Adds aux spi 1 & 2 devices to compatible raspberry PIs.
  6. * Minor config of the driver build environment to ensure they get built
  7. for CONFIG_ARCH_BCM2708 & CONFIG_ARCH_BCM2709 devices.
  8. * Adds the aux spi driver into the defconfigs as a module.
  9. * Adds the auxiliary and spi1/2 devices into the device tree in a
  10. disabled state
  11. * Provides decide tree overlays which enables the devices and gives
  12. users a degree of control over how they are setup.
  13. ---
  14. arch/arm/boot/dts/bcm2708_common.dtsi | 34 ++++++++-
  15. arch/arm/boot/dts/overlays/Makefile | 6 ++
  16. arch/arm/boot/dts/overlays/README | 99 +++++++++++++++++++++++++
  17. arch/arm/boot/dts/overlays/spi1-1cs-overlay.dts | 57 ++++++++++++++
  18. arch/arm/boot/dts/overlays/spi1-2cs-overlay.dts | 69 +++++++++++++++++
  19. arch/arm/boot/dts/overlays/spi1-3cs-overlay.dts | 81 ++++++++++++++++++++
  20. arch/arm/boot/dts/overlays/spi2-1cs-overlay.dts | 57 ++++++++++++++
  21. arch/arm/boot/dts/overlays/spi2-2cs-overlay.dts | 69 +++++++++++++++++
  22. arch/arm/boot/dts/overlays/spi2-3cs-overlay.dts | 81 ++++++++++++++++++++
  23. arch/arm/configs/bcm2709_defconfig | 1 +
  24. arch/arm/configs/bcmrpi_defconfig | 1 +
  25. drivers/clk/bcm/Makefile | 2 +-
  26. drivers/spi/Kconfig | 2 +-
  27. 13 files changed, 556 insertions(+), 3 deletions(-)
  28. create mode 100644 arch/arm/boot/dts/overlays/spi1-1cs-overlay.dts
  29. create mode 100644 arch/arm/boot/dts/overlays/spi1-2cs-overlay.dts
  30. create mode 100644 arch/arm/boot/dts/overlays/spi1-3cs-overlay.dts
  31. create mode 100644 arch/arm/boot/dts/overlays/spi2-1cs-overlay.dts
  32. create mode 100644 arch/arm/boot/dts/overlays/spi2-2cs-overlay.dts
  33. create mode 100644 arch/arm/boot/dts/overlays/spi2-3cs-overlay.dts
  34. --- a/arch/arm/boot/dts/bcm2708_common.dtsi
  35. +++ b/arch/arm/boot/dts/bcm2708_common.dtsi
  36. @@ -1,3 +1,4 @@
  37. +#include <dt-bindings/clock/bcm2835-aux.h>
  38. #include "skeleton.dtsi"
  39. / {
  40. @@ -5,6 +6,7 @@
  41. aliases {
  42. audio = &audio;
  43. + aux = &aux;
  44. sound = &sound;
  45. soc = &soc;
  46. dma = &dma;
  47. @@ -19,6 +21,8 @@
  48. spi0 = &spi0;
  49. i2c0 = &i2c0;
  50. uart1 = &uart1;
  51. + spi1 = &spi1;
  52. + spi2 = &spi2;
  53. mmc = &mmc;
  54. i2c1 = &i2c1;
  55. i2c2 = &i2c2;
  56. @@ -186,6 +190,14 @@
  57. status = "disabled";
  58. };
  59. + aux: aux@0x7e215004 {
  60. + compatible = "brcm,bcm2835-aux";
  61. + #clock-cells = <1>;
  62. + reg = <0x7e215000 0x8>;
  63. + clocks = <&clk_core>;
  64. + status = "disabled";
  65. + };
  66. +
  67. uart1: uart@7e215040 {
  68. compatible = "brcm,bcm2835-aux-uart", "ns16550";
  69. reg = <0x7e215040 0x40>;
  70. @@ -194,7 +206,27 @@
  71. reg-shift = <2>;
  72. no-loopback-test;
  73. status = "disabled";
  74. - };
  75. + };
  76. +
  77. + spi1: spi@7e215080 {
  78. + compatible = "brcm,bcm2835-aux-spi";
  79. + reg = <0x7e215080 0x40>, <0x7e215000 0x8>;
  80. + interrupts = <1 29>;
  81. + clocks = <&aux BCM2835_AUX_CLOCK_SPI1>;
  82. + #address-cells = <1>;
  83. + #size-cells = <0>;
  84. + status = "disabled";
  85. + };
  86. +
  87. + spi2: spi@7e2150C0 {
  88. + compatible = "brcm,bcm2835-aux-spi";
  89. + reg = <0x7e2150C0 0x40>, <0x7e215000 0x8>;
  90. + interrupts = <1 29>;
  91. + clocks = <&aux BCM2835_AUX_CLOCK_SPI2>;
  92. + #address-cells = <1>;
  93. + #size-cells = <0>;
  94. + status = "disabled";
  95. + };
  96. mmc: mmc@7e300000 {
  97. compatible = "brcm,bcm2835-mmc";
  98. --- a/arch/arm/boot/dts/overlays/Makefile
  99. +++ b/arch/arm/boot/dts/overlays/Makefile
  100. @@ -57,6 +57,12 @@ dtb-$(RPI_DT_OVERLAYS) += sdtweak-overla
  101. dtb-$(RPI_DT_OVERLAYS) += smi-dev-overlay.dtb
  102. dtb-$(RPI_DT_OVERLAYS) += smi-nand-overlay.dtb
  103. dtb-$(RPI_DT_OVERLAYS) += smi-overlay.dtb
  104. +dtb-$(RPI_DT_OVERLAYS) += spi1-1cs-overlay.dtb
  105. +dtb-$(RPI_DT_OVERLAYS) += spi1-2cs-overlay.dtb
  106. +dtb-$(RPI_DT_OVERLAYS) += spi1-3cs-overlay.dtb
  107. +dtb-$(RPI_DT_OVERLAYS) += spi2-1cs-overlay.dtb
  108. +dtb-$(RPI_DT_OVERLAYS) += spi2-2cs-overlay.dtb
  109. +dtb-$(RPI_DT_OVERLAYS) += spi2-3cs-overlay.dtb
  110. dtb-$(RPI_DT_OVERLAYS) += spi-gpio35-39-overlay.dtb
  111. dtb-$(RPI_DT_OVERLAYS) += tinylcd35-overlay.dtb
  112. dtb-$(RPI_DT_OVERLAYS) += uart1-overlay.dtb
  113. --- a/arch/arm/boot/dts/overlays/README
  114. +++ b/arch/arm/boot/dts/overlays/README
  115. @@ -713,6 +713,105 @@ Load: dtoverlay=spi-gpio35-39
  116. Params: <None>
  117. +Name: spi1-1cs
  118. +Info: Enables spi1 with a single chip select (CS) line and associated spidev
  119. + dev node. The gpio pin number for the CS line and spidev device node
  120. + creation are configurable.
  121. + N.B.: spi1 is only accessible on devices with a 40pin header, eg:
  122. + A+, B+, Zero and PI2 B; as well as the Compute Module.
  123. +Load: dtoverlay=spi1-1cs,<param>=<val>
  124. +Params: cs0_pin GPIO pin for CS0 (default 18 - BCM SPI1_CE0).
  125. + cs0_spidev Set to 'disabled' to stop the creation of a
  126. + userspace device node /dev/spidev1.0 (default
  127. + is 'okay' or enabled).
  128. +
  129. +
  130. +Name: spi1-2cs
  131. +Info: Enables spi1 with two chip select (CS) lines and associated spidev
  132. + dev nodes. The gpio pin numbers for the CS lines and spidev device node
  133. + creation are configurable.
  134. + N.B.: spi1 is only accessible on devices with a 40pin header, eg:
  135. + A+, B+, Zero and PI2 B; as well as the Compute Module.
  136. +Load: dtoverlay=spi1-2cs,<param>=<val>
  137. +Params: cs0_pin GPIO pin for CS0 (default 18 - BCM SPI1_CE0).
  138. + cs1_pin GPIO pin for CS1 (default 17 - BCM SPI1_CE1).
  139. + cs0_spidev Set to 'disabled' to stop the creation of a
  140. + userspace device node /dev/spidev1.0 (default
  141. + is 'okay' or enabled).
  142. + cs1_spidev Set to 'disabled' to stop the creation of a
  143. + userspace device node /dev/spidev1.1 (default
  144. + is 'okay' or enabled).
  145. +
  146. +
  147. +Name: spi1-3cs
  148. +Info: Enables spi1 with three chip select (CS) lines and associated spidev
  149. + dev nodes. The gpio pin numbers for the CS lines and spidev device node
  150. + creation are configurable.
  151. + N.B.: spi1 is only accessible on devices with a 40pin header, eg:
  152. + A+, B+, Zero and PI2 B; as well as the Compute Module.
  153. +Load: dtoverlay=spi1-3cs,<param>=<val>
  154. +Params: cs0_pin GPIO pin for CS0 (default 18 - BCM SPI1_CE0).
  155. + cs1_pin GPIO pin for CS1 (default 17 - BCM SPI1_CE1).
  156. + cs2_pin GPIO pin for CS2 (default 16 - BCM SPI1_CE2).
  157. + cs0_spidev Set to 'disabled' to stop the creation of a
  158. + userspace device node /dev/spidev1.0 (default
  159. + is 'okay' or enabled).
  160. + cs1_spidev Set to 'disabled' to stop the creation of a
  161. + userspace device node /dev/spidev1.1 (default
  162. + is 'okay' or enabled).
  163. + cs2_spidev Set to 'disabled' to stop the creation of a
  164. + userspace device node /dev/spidev1.2 (default
  165. + is 'okay' or enabled).
  166. +
  167. +
  168. +Name: spi2-1cs
  169. +Info: Enables spi2 with a single chip select (CS) line and associated spidev
  170. + dev node. The gpio pin number for the CS line and spidev device node
  171. + creation are configurable.
  172. + N.B.: spi2 is only accessible with the Compute Module.
  173. +Load: dtoverlay=spi2-1cs,<param>=<val>
  174. +Params: cs0_pin GPIO pin for CS0 (default 43 - BCM SPI2_CE0).
  175. + cs0_spidev Set to 'disabled' to stop the creation of a
  176. + userspace device node /dev/spidev2.0 (default
  177. + is 'okay' or enabled).
  178. +
  179. +
  180. +Name: spi2-2cs
  181. +Info: Enables spi2 with two chip select (CS) lines and associated spidev
  182. + dev nodes. The gpio pin numbers for the CS lines and spidev device node
  183. + creation are configurable.
  184. + N.B.: spi2 is only accessible with the Compute Module.
  185. +Load: dtoverlay=spi2-2cs,<param>=<val>
  186. +Params: cs0_pin GPIO pin for CS0 (default 43 - BCM SPI2_CE0).
  187. + cs1_pin GPIO pin for CS1 (default 44 - BCM SPI2_CE1).
  188. + cs0_spidev Set to 'disabled' to stop the creation of a
  189. + userspace device node /dev/spidev2.0 (default
  190. + is 'okay' or enabled).
  191. + cs1_spidev Set to 'disabled' to stop the creation of a
  192. + userspace device node /dev/spidev2.1 (default
  193. + is 'okay' or enabled).
  194. +
  195. +
  196. +Name: spi2-3cs
  197. +Info: Enables spi2 with three chip select (CS) lines and associated spidev
  198. + dev nodes. The gpio pin numbers for the CS lines and spidev device node
  199. + creation are configurable.
  200. + N.B.: spi2 is only accessible with the Compute Module.
  201. +Load: dtoverlay=spi2-3cs,<param>=<val>
  202. +Params: cs0_pin GPIO pin for CS0 (default 43 - BCM SPI2_CE0).
  203. + cs1_pin GPIO pin for CS1 (default 44 - BCM SPI2_CE1).
  204. + cs2_pin GPIO pin for CS2 (default 45 - BCM SPI2_CE2).
  205. + cs0_spidev Set to 'disabled' to stop the creation of a
  206. + userspace device node /dev/spidev2.0 (default
  207. + is 'okay' or enabled).
  208. + cs1_spidev Set to 'disabled' to stop the creation of a
  209. + userspace device node /dev/spidev2.1 (default
  210. + is 'okay' or enabled).
  211. + cs2_spidev Set to 'disabled' to stop the creation of a
  212. + userspace device node /dev/spidev2.2 (default
  213. + is 'okay' or enabled).
  214. +
  215. +
  216. Name: tinylcd35
  217. Info: 3.5" Color TFT Display by www.tinylcd.com
  218. Options: Touch, RTC, keypad
  219. --- /dev/null
  220. +++ b/arch/arm/boot/dts/overlays/spi1-1cs-overlay.dts
  221. @@ -0,0 +1,57 @@
  222. +/dts-v1/;
  223. +/plugin/;
  224. +
  225. +
  226. +/ {
  227. + compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
  228. +
  229. + fragment@0 {
  230. + target = <&gpio>;
  231. + __overlay__ {
  232. + spi1_pins: spi1_pins {
  233. + brcm,pins = <19 20 21>;
  234. + brcm,function = <3>; /* alt4 */
  235. + };
  236. +
  237. + spi1_cs_pins: spi1_cs_pins {
  238. + brcm,pins = <18>;
  239. + brcm,function = <1>; /* output */
  240. + };
  241. + };
  242. + };
  243. +
  244. + fragment@1 {
  245. + target = <&spi1>;
  246. + frag1: __overlay__ {
  247. + /* needed to avoid dtc warning */
  248. + #address-cells = <1>;
  249. + #size-cells = <0>;
  250. + pinctrl-names = "default";
  251. + pinctrl-0 = <&spi1_pins &spi1_cs_pins>;
  252. + cs-gpios = <&gpio 18 1>;
  253. + status = "okay";
  254. +
  255. + spidev1_0: spidev@0 {
  256. + compatible = "spidev";
  257. + reg = <0>; /* CE0 */
  258. + #address-cells = <1>;
  259. + #size-cells = <0>;
  260. + spi-max-frequency = <500000>;
  261. + status = "okay";
  262. + };
  263. + };
  264. + };
  265. +
  266. + fragment@2 {
  267. + target = <&aux>;
  268. + __overlay__ {
  269. + status = "okay";
  270. + };
  271. + };
  272. +
  273. + __overrides__ {
  274. + cs0_pin = <&spi1_cs_pins>,"brcm,pins:0",
  275. + <&frag1>,"cs-gpios:4";
  276. + cs0_spidev = <&spidev1_0>,"status";
  277. + };
  278. +};
  279. --- /dev/null
  280. +++ b/arch/arm/boot/dts/overlays/spi1-2cs-overlay.dts
  281. @@ -0,0 +1,69 @@
  282. +/dts-v1/;
  283. +/plugin/;
  284. +
  285. +
  286. +/ {
  287. + compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
  288. +
  289. + fragment@0 {
  290. + target = <&gpio>;
  291. + __overlay__ {
  292. + spi1_pins: spi1_pins {
  293. + brcm,pins = <19 20 21>;
  294. + brcm,function = <3>; /* alt4 */
  295. + };
  296. +
  297. + spi1_cs_pins: spi1_cs_pins {
  298. + brcm,pins = <18 17>;
  299. + brcm,function = <1>; /* output */
  300. + };
  301. + };
  302. + };
  303. +
  304. + fragment@1 {
  305. + target = <&spi1>;
  306. + frag1: __overlay__ {
  307. + /* needed to avoid dtc warning */
  308. + #address-cells = <1>;
  309. + #size-cells = <0>;
  310. + pinctrl-names = "default";
  311. + pinctrl-0 = <&spi1_pins &spi1_cs_pins>;
  312. + cs-gpios = <&gpio 18 1>, <&gpio 17 1>;
  313. + status = "okay";
  314. +
  315. + spidev1_0: spidev@0 {
  316. + compatible = "spidev";
  317. + reg = <0>; /* CE0 */
  318. + #address-cells = <1>;
  319. + #size-cells = <0>;
  320. + spi-max-frequency = <500000>;
  321. + status = "okay";
  322. + };
  323. +
  324. + spidev1_1: spidev@1 {
  325. + compatible = "spidev";
  326. + reg = <1>; /* CE1 */
  327. + #address-cells = <1>;
  328. + #size-cells = <0>;
  329. + spi-max-frequency = <500000>;
  330. + status = "okay";
  331. + };
  332. + };
  333. + };
  334. +
  335. + fragment@2 {
  336. + target = <&aux>;
  337. + __overlay__ {
  338. + status = "okay";
  339. + };
  340. + };
  341. +
  342. + __overrides__ {
  343. + cs0_pin = <&spi1_cs_pins>,"brcm,pins:0",
  344. + <&frag1>,"cs-gpios:4";
  345. + cs1_pin = <&spi1_cs_pins>,"brcm,pins:4",
  346. + <&frag1>,"cs-gpios:16";
  347. + cs0_spidev = <&spidev1_0>,"status";
  348. + cs1_spidev = <&spidev1_1>,"status";
  349. + };
  350. +};
  351. --- /dev/null
  352. +++ b/arch/arm/boot/dts/overlays/spi1-3cs-overlay.dts
  353. @@ -0,0 +1,81 @@
  354. +/dts-v1/;
  355. +/plugin/;
  356. +
  357. +
  358. +/ {
  359. + compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
  360. +
  361. + fragment@0 {
  362. + target = <&gpio>;
  363. + __overlay__ {
  364. + spi1_pins: spi1_pins {
  365. + brcm,pins = <19 20 21>;
  366. + brcm,function = <3>; /* alt4 */
  367. + };
  368. +
  369. + spi1_cs_pins: spi1_cs_pins {
  370. + brcm,pins = <18 17 16>;
  371. + brcm,function = <1>; /* output */
  372. + };
  373. + };
  374. + };
  375. +
  376. + fragment@1 {
  377. + target = <&spi1>;
  378. + frag1: __overlay__ {
  379. + /* needed to avoid dtc warning */
  380. + #address-cells = <1>;
  381. + #size-cells = <0>;
  382. + pinctrl-names = "default";
  383. + pinctrl-0 = <&spi1_pins &spi1_cs_pins>;
  384. + cs-gpios = <&gpio 18 1>, <&gpio 17 1>, <&gpio 16 1>;
  385. + status = "okay";
  386. +
  387. + spidev1_0: spidev@0 {
  388. + compatible = "spidev";
  389. + reg = <0>; /* CE0 */
  390. + #address-cells = <1>;
  391. + #size-cells = <0>;
  392. + spi-max-frequency = <500000>;
  393. + status = "okay";
  394. + };
  395. +
  396. + spidev1_1: spidev@1 {
  397. + compatible = "spidev";
  398. + reg = <1>; /* CE1 */
  399. + #address-cells = <1>;
  400. + #size-cells = <0>;
  401. + spi-max-frequency = <500000>;
  402. + status = "okay";
  403. + };
  404. +
  405. + spidev1_2: spidev@2 {
  406. + compatible = "spidev";
  407. + reg = <2>; /* CE2 */
  408. + #address-cells = <1>;
  409. + #size-cells = <0>;
  410. + spi-max-frequency = <500000>;
  411. + status = "okay";
  412. + };
  413. + };
  414. + };
  415. +
  416. + fragment@2 {
  417. + target = <&aux>;
  418. + __overlay__ {
  419. + status = "okay";
  420. + };
  421. + };
  422. +
  423. + __overrides__ {
  424. + cs0_pin = <&spi1_cs_pins>,"brcm,pins:0",
  425. + <&frag1>,"cs-gpios:4";
  426. + cs1_pin = <&spi1_cs_pins>,"brcm,pins:4",
  427. + <&frag1>,"cs-gpios:16";
  428. + cs2_pin = <&spi1_cs_pins>,"brcm,pins:8",
  429. + <&frag1>,"cs-gpios:28";
  430. + cs0_spidev = <&spidev1_0>,"status";
  431. + cs1_spidev = <&spidev1_1>,"status";
  432. + cs2_spidev = <&spidev1_2>,"status";
  433. + };
  434. +};
  435. --- /dev/null
  436. +++ b/arch/arm/boot/dts/overlays/spi2-1cs-overlay.dts
  437. @@ -0,0 +1,57 @@
  438. +/dts-v1/;
  439. +/plugin/;
  440. +
  441. +
  442. +/ {
  443. + compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
  444. +
  445. + fragment@0 {
  446. + target = <&gpio>;
  447. + __overlay__ {
  448. + spi2_pins: spi2_pins {
  449. + brcm,pins = <40 41 42>;
  450. + brcm,function = <3>; /* alt4 */
  451. + };
  452. +
  453. + spi2_cs_pins: spi2_cs_pins {
  454. + brcm,pins = <43>;
  455. + brcm,function = <1>; /* output */
  456. + };
  457. + };
  458. + };
  459. +
  460. + fragment@1 {
  461. + target = <&spi2>;
  462. + frag1: __overlay__ {
  463. + /* needed to avoid dtc warning */
  464. + #address-cells = <1>;
  465. + #size-cells = <0>;
  466. + pinctrl-names = "default";
  467. + pinctrl-0 = <&spi2_pins &spi2_cs_pins>;
  468. + cs-gpios = <&gpio 43 1>;
  469. + status = "okay";
  470. +
  471. + spidev2_0: spidev@0 {
  472. + compatible = "spidev";
  473. + reg = <0>; /* CE0 */
  474. + #address-cells = <1>;
  475. + #size-cells = <0>;
  476. + spi-max-frequency = <500000>;
  477. + status = "okay";
  478. + };
  479. + };
  480. + };
  481. +
  482. + fragment@2 {
  483. + target = <&aux>;
  484. + __overlay__ {
  485. + status = "okay";
  486. + };
  487. + };
  488. +
  489. + __overrides__ {
  490. + cs0_pin = <&spi2_cs_pins>,"brcm,pins:0",
  491. + <&frag1>,"cs-gpios:4";
  492. + cs0_spidev = <&spidev2_0>,"status";
  493. + };
  494. +};
  495. --- /dev/null
  496. +++ b/arch/arm/boot/dts/overlays/spi2-2cs-overlay.dts
  497. @@ -0,0 +1,69 @@
  498. +/dts-v1/;
  499. +/plugin/;
  500. +
  501. +
  502. +/ {
  503. + compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
  504. +
  505. + fragment@0 {
  506. + target = <&gpio>;
  507. + __overlay__ {
  508. + spi2_pins: spi2_pins {
  509. + brcm,pins = <40 41 42>;
  510. + brcm,function = <3>; /* alt4 */
  511. + };
  512. +
  513. + spi2_cs_pins: spi2_cs_pins {
  514. + brcm,pins = <43 44>;
  515. + brcm,function = <1>; /* output */
  516. + };
  517. + };
  518. + };
  519. +
  520. + fragment@1 {
  521. + target = <&spi2>;
  522. + frag1: __overlay__ {
  523. + /* needed to avoid dtc warning */
  524. + #address-cells = <1>;
  525. + #size-cells = <0>;
  526. + pinctrl-names = "default";
  527. + pinctrl-0 = <&spi2_pins &spi2_cs_pins>;
  528. + cs-gpios = <&gpio 43 1>, <&gpio 44 1>;
  529. + status = "okay";
  530. +
  531. + spidev2_0: spidev@0 {
  532. + compatible = "spidev";
  533. + reg = <0>; /* CE0 */
  534. + #address-cells = <1>;
  535. + #size-cells = <0>;
  536. + spi-max-frequency = <500000>;
  537. + status = "okay";
  538. + };
  539. +
  540. + spidev2_1: spidev@1 {
  541. + compatible = "spidev";
  542. + reg = <1>; /* CE1 */
  543. + #address-cells = <1>;
  544. + #size-cells = <0>;
  545. + spi-max-frequency = <500000>;
  546. + status = "okay";
  547. + };
  548. + };
  549. + };
  550. +
  551. + fragment@2 {
  552. + target = <&aux>;
  553. + __overlay__ {
  554. + status = "okay";
  555. + };
  556. + };
  557. +
  558. + __overrides__ {
  559. + cs0_pin = <&spi2_cs_pins>,"brcm,pins:0",
  560. + <&frag1>,"cs-gpios:4";
  561. + cs1_pin = <&spi2_cs_pins>,"brcm,pins:4",
  562. + <&frag1>,"cs-gpios:16";
  563. + cs0_spidev = <&spidev2_0>,"status";
  564. + cs1_spidev = <&spidev2_1>,"status";
  565. + };
  566. +};
  567. --- /dev/null
  568. +++ b/arch/arm/boot/dts/overlays/spi2-3cs-overlay.dts
  569. @@ -0,0 +1,81 @@
  570. +/dts-v1/;
  571. +/plugin/;
  572. +
  573. +
  574. +/ {
  575. + compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
  576. +
  577. + fragment@0 {
  578. + target = <&gpio>;
  579. + __overlay__ {
  580. + spi2_pins: spi2_pins {
  581. + brcm,pins = <40 41 42>;
  582. + brcm,function = <3>; /* alt4 */
  583. + };
  584. +
  585. + spi2_cs_pins: spi2_cs_pins {
  586. + brcm,pins = <43 44 45>;
  587. + brcm,function = <1>; /* output */
  588. + };
  589. + };
  590. + };
  591. +
  592. + fragment@1 {
  593. + target = <&spi2>;
  594. + frag1: __overlay__ {
  595. + /* needed to avoid dtc warning */
  596. + #address-cells = <1>;
  597. + #size-cells = <0>;
  598. + pinctrl-names = "default";
  599. + pinctrl-0 = <&spi2_pins &spi2_cs_pins>;
  600. + cs-gpios = <&gpio 43 1>, <&gpio 44 1>, <&gpio 45 1>;
  601. + status = "okay";
  602. +
  603. + spidev2_0: spidev@0 {
  604. + compatible = "spidev";
  605. + reg = <0>; /* CE0 */
  606. + #address-cells = <1>;
  607. + #size-cells = <0>;
  608. + spi-max-frequency = <500000>;
  609. + status = "okay";
  610. + };
  611. +
  612. + spidev2_1: spidev@1 {
  613. + compatible = "spidev";
  614. + reg = <1>; /* CE1 */
  615. + #address-cells = <1>;
  616. + #size-cells = <0>;
  617. + spi-max-frequency = <500000>;
  618. + status = "okay";
  619. + };
  620. +
  621. + spidev2_2: spidev@2 {
  622. + compatible = "spidev";
  623. + reg = <2>; /* CE2 */
  624. + #address-cells = <1>;
  625. + #size-cells = <0>;
  626. + spi-max-frequency = <500000>;
  627. + status = "okay";
  628. + };
  629. + };
  630. + };
  631. +
  632. + fragment@2 {
  633. + target = <&aux>;
  634. + __overlay__ {
  635. + status = "okay";
  636. + };
  637. + };
  638. +
  639. + __overrides__ {
  640. + cs0_pin = <&spi2_cs_pins>,"brcm,pins:0",
  641. + <&frag1>,"cs-gpios:4";
  642. + cs1_pin = <&spi2_cs_pins>,"brcm,pins:4",
  643. + <&frag1>,"cs-gpios:16";
  644. + cs2_pin = <&spi2_cs_pins>,"brcm,pins:8",
  645. + <&frag1>,"cs-gpios:28";
  646. + cs0_spidev = <&spidev2_0>,"status";
  647. + cs1_spidev = <&spidev2_1>,"status";
  648. + cs2_spidev = <&spidev2_2>,"status";
  649. + };
  650. +};
  651. --- a/arch/arm/configs/bcm2709_defconfig
  652. +++ b/arch/arm/configs/bcm2709_defconfig
  653. @@ -601,6 +601,7 @@ CONFIG_I2C_BCM2708=m
  654. CONFIG_I2C_GPIO=m
  655. CONFIG_SPI=y
  656. CONFIG_SPI_BCM2835=m
  657. +CONFIG_SPI_BCM2835AUX=m
  658. CONFIG_SPI_SPIDEV=y
  659. CONFIG_PPS=m
  660. CONFIG_PPS_CLIENT_LDISC=m
  661. --- a/arch/arm/configs/bcmrpi_defconfig
  662. +++ b/arch/arm/configs/bcmrpi_defconfig
  663. @@ -593,6 +593,7 @@ CONFIG_I2C_BCM2708=m
  664. CONFIG_I2C_GPIO=m
  665. CONFIG_SPI=y
  666. CONFIG_SPI_BCM2835=m
  667. +CONFIG_SPI_BCM2835AUX=m
  668. CONFIG_SPI_SPIDEV=y
  669. CONFIG_PPS=m
  670. CONFIG_PPS_CLIENT_LDISC=m
  671. --- a/drivers/clk/bcm/Makefile
  672. +++ b/drivers/clk/bcm/Makefile
  673. @@ -4,7 +4,7 @@ obj-$(CONFIG_CLK_BCM_KONA) += clk-bcm281
  674. obj-$(CONFIG_CLK_BCM_KONA) += clk-bcm21664.o
  675. obj-$(CONFIG_COMMON_CLK_IPROC) += clk-iproc-armpll.o clk-iproc-pll.o clk-iproc-asiu.o
  676. obj-$(CONFIG_ARCH_BCM2835)$(CONFIG_ARCH_BCM2708)$(CONFIG_ARCH_BCM2709) += clk-bcm2835.o
  677. -obj-$(CONFIG_ARCH_BCM2835) += clk-bcm2835-aux.o
  678. +obj-$(CONFIG_ARCH_BCM2835)$(CONFIG_ARCH_BCM2708)$(CONFIG_ARCH_BCM2709) += clk-bcm2835-aux.o
  679. obj-$(CONFIG_COMMON_CLK_IPROC) += clk-ns2.o
  680. obj-$(CONFIG_ARCH_BCM_CYGNUS) += clk-cygnus.o
  681. obj-$(CONFIG_ARCH_BCM_NSP) += clk-nsp.o
  682. --- a/drivers/spi/Kconfig
  683. +++ b/drivers/spi/Kconfig
  684. @@ -90,7 +90,7 @@ config SPI_BCM2835
  685. config SPI_BCM2835AUX
  686. tristate "BCM2835 SPI auxiliary controller"
  687. - depends on ARCH_BCM2835 || COMPILE_TEST
  688. + depends on ARCH_BCM2835 || ARCH_BCM2708 || ARCH_BCM2709 || COMPILE_TEST
  689. depends on GPIOLIB
  690. help
  691. This selects a driver for the Broadcom BCM2835 SPI aux master.