0168-bcm2835-mmc-Only-claim-one-DMA-channel.patch 5.4 KB

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  1. From a42056ad2e3f74569611dd4f15ca698ccd9d7bea Mon Sep 17 00:00:00 2001
  2. From: Phil Elwell <phil@raspberrypi.org>
  3. Date: Tue, 8 Mar 2016 09:49:16 +0000
  4. Subject: [PATCH 168/381] bcm2835-mmc: Only claim one DMA channel
  5. With both MMC controllers enabled there are few DMA channels left. The
  6. bcm2835-mmc driver only uses DMA in one direction at a time, so it
  7. doesn't need to claim two channels.
  8. See: https://github.com/raspberrypi/linux/issues/1327
  9. Signed-off-by: Phil Elwell <phil@raspberrypi.org>
  10. ---
  11. arch/arm/boot/dts/bcm2708_common.dtsi | 5 +--
  12. drivers/mmc/host/bcm2835-mmc.c | 69 +++++++++++++++++++++++++----------
  13. 2 files changed, 51 insertions(+), 23 deletions(-)
  14. --- a/arch/arm/boot/dts/bcm2708_common.dtsi
  15. +++ b/arch/arm/boot/dts/bcm2708_common.dtsi
  16. @@ -232,9 +232,8 @@
  17. reg = <0x7e300000 0x100>;
  18. interrupts = <2 30>;
  19. clocks = <&clk_mmc>;
  20. - dmas = <&dma 11>,
  21. - <&dma 11>;
  22. - dma-names = "tx", "rx";
  23. + dmas = <&dma 11>;
  24. + dma-names = "rx-tx";
  25. brcm,overclock-50 = <0>;
  26. status = "disabled";
  27. };
  28. --- a/drivers/mmc/host/bcm2835-mmc.c
  29. +++ b/drivers/mmc/host/bcm2835-mmc.c
  30. @@ -108,8 +108,9 @@ struct bcm2835_host {
  31. u32 shadow;
  32. /*DMA part*/
  33. - struct dma_chan *dma_chan_rx; /* DMA channel for reads */
  34. - struct dma_chan *dma_chan_tx; /* DMA channel for writes */
  35. + struct dma_chan *dma_chan_rxtx; /* DMA channel for reads and writes */
  36. + struct dma_slave_config dma_cfg_rx;
  37. + struct dma_slave_config dma_cfg_tx;
  38. struct dma_async_tx_descriptor *tx_desc; /* descriptor */
  39. bool have_dma;
  40. @@ -342,7 +343,7 @@ static void bcm2835_mmc_dma_complete(voi
  41. if (host->data && !(host->data->flags & MMC_DATA_WRITE)) {
  42. /* otherwise handled in SDHCI IRQ */
  43. - dma_chan = host->dma_chan_rx;
  44. + dma_chan = host->dma_chan_rxtx;
  45. dir_data = DMA_FROM_DEVICE;
  46. dma_unmap_sg(dma_chan->device->dev,
  47. @@ -493,16 +494,21 @@ static void bcm2835_mmc_transfer_dma(str
  48. if (host->blocks == 0)
  49. return;
  50. + dma_chan = host->dma_chan_rxtx;
  51. if (host->data->flags & MMC_DATA_READ) {
  52. - dma_chan = host->dma_chan_rx;
  53. dir_data = DMA_FROM_DEVICE;
  54. dir_slave = DMA_DEV_TO_MEM;
  55. } else {
  56. - dma_chan = host->dma_chan_tx;
  57. dir_data = DMA_TO_DEVICE;
  58. dir_slave = DMA_MEM_TO_DEV;
  59. }
  60. + /* The parameters have already been validated, so this will not fail */
  61. + (void)dmaengine_slave_config(dma_chan,
  62. + (dir_data == DMA_FROM_DEVICE) ?
  63. + &host->dma_cfg_rx :
  64. + &host->dma_cfg_tx);
  65. +
  66. BUG_ON(!dma_chan->device);
  67. BUG_ON(!dma_chan->device->dev);
  68. BUG_ON(!host->data->sg);
  69. @@ -936,7 +942,7 @@ static void bcm2835_mmc_data_irq(struct
  70. if (host->data->flags & MMC_DATA_WRITE) {
  71. /* IRQ handled here */
  72. - dma_chan = host->dma_chan_tx;
  73. + dma_chan = host->dma_chan_rxtx;
  74. dir_data = DMA_TO_DEVICE;
  75. dma_unmap_sg(dma_chan->device->dev,
  76. host->data->sg, host->data->sg_len,
  77. @@ -1316,28 +1322,47 @@ static int bcm2835_mmc_add_host(struct b
  78. dev_info(dev, "Forcing PIO mode\n");
  79. host->have_dma = false;
  80. #else
  81. - if (IS_ERR_OR_NULL(host->dma_chan_tx) ||
  82. - IS_ERR_OR_NULL(host->dma_chan_rx)) {
  83. - dev_err(dev, "%s: Unable to initialise DMA channels. Falling back to PIO\n",
  84. + if (IS_ERR_OR_NULL(host->dma_chan_rxtx)) {
  85. + dev_err(dev, "%s: Unable to initialise DMA channel. Falling back to PIO\n",
  86. DRIVER_NAME);
  87. host->have_dma = false;
  88. } else {
  89. - dev_info(dev, "DMA channels allocated");
  90. - host->have_dma = true;
  91. + dev_info(dev, "DMA channel allocated");
  92. cfg.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
  93. cfg.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
  94. cfg.slave_id = 11; /* DREQ channel */
  95. + /* Validate the slave configurations */
  96. +
  97. cfg.direction = DMA_MEM_TO_DEV;
  98. cfg.src_addr = 0;
  99. cfg.dst_addr = host->bus_addr + SDHCI_BUFFER;
  100. - ret = dmaengine_slave_config(host->dma_chan_tx, &cfg);
  101. - cfg.direction = DMA_DEV_TO_MEM;
  102. - cfg.src_addr = host->bus_addr + SDHCI_BUFFER;
  103. - cfg.dst_addr = 0;
  104. - ret = dmaengine_slave_config(host->dma_chan_rx, &cfg);
  105. + ret = dmaengine_slave_config(host->dma_chan_rxtx, &cfg);
  106. +
  107. + if (ret == 0) {
  108. + host->dma_cfg_tx = cfg;
  109. +
  110. + cfg.direction = DMA_DEV_TO_MEM;
  111. + cfg.src_addr = host->bus_addr + SDHCI_BUFFER;
  112. + cfg.dst_addr = 0;
  113. +
  114. + ret = dmaengine_slave_config(host->dma_chan_rxtx, &cfg);
  115. + }
  116. +
  117. + if (ret == 0) {
  118. + host->dma_cfg_rx = cfg;
  119. +
  120. + host->use_dma = true;
  121. + } else {
  122. + pr_err("%s: unable to configure DMA channel. "
  123. + "Faling back to PIO\n",
  124. + mmc_hostname(mmc));
  125. + dma_release_channel(host->dma_chan_rxtx);
  126. + host->dma_chan_rxtx = NULL;
  127. + host->use_dma = false;
  128. + }
  129. }
  130. #endif
  131. mmc->max_segs = 128;
  132. @@ -1416,16 +1441,20 @@ static int bcm2835_mmc_probe(struct plat
  133. #ifndef FORCE_PIO
  134. if (node) {
  135. - host->dma_chan_tx = dma_request_slave_channel(dev, "tx");
  136. - host->dma_chan_rx = dma_request_slave_channel(dev, "rx");
  137. + host->dma_chan_rxtx = dma_request_slave_channel(dev, "rx-tx");
  138. + if (!host->dma_chan_rxtx)
  139. + host->dma_chan_rxtx =
  140. + dma_request_slave_channel(dev, "tx");
  141. + if (!host->dma_chan_rxtx)
  142. + host->dma_chan_rxtx =
  143. + dma_request_slave_channel(dev, "rx");
  144. } else {
  145. dma_cap_mask_t mask;
  146. dma_cap_zero(mask);
  147. /* we don't care about the channel, any would work */
  148. dma_cap_set(DMA_SLAVE, mask);
  149. - host->dma_chan_tx = dma_request_channel(mask, NULL, NULL);
  150. - host->dma_chan_rx = dma_request_channel(mask, NULL, NULL);
  151. + host->dma_chan_rxtx = dma_request_channel(mask, NULL, NULL);
  152. }
  153. #endif
  154. clk = devm_clk_get(dev, NULL);