010-4.3-01-spi-bcm63xx-hsspi-add-support-for-dual-spi-read-writ.patch 2.2 KB

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  1. From 61dc388f577b6f984797949f32c30021d9ea73dc Mon Sep 17 00:00:00 2001
  2. From: Jonas Gorski <jogo@openwrt.org>
  3. Date: Sun, 23 Aug 2015 12:16:02 +0200
  4. Subject: [PATCH V2] spi/bcm63xx-hsspi: add support for dual spi read/write
  5. Add support for dual read/writes on spi-bcm63xx-hsspi. This has been
  6. tested with a s25fl129p1 dual read capable spi flash, with a nice speed
  7. improvement:
  8. serial read:
  9. root@OpenWrt:/# time dd if=/dev/mtd4 of=/dev/null bs=8192
  10. 2032+0 records in
  11. 2032+0 records out
  12. real 0m 4.39s
  13. user 0m 0.00s
  14. sys 0m 1.55s
  15. dual read:
  16. root@OpenWrt:/# time dd if=/dev/mtd4 of=/dev/null bs=8192
  17. 2032+0 records in
  18. 2032+0 records out
  19. real 0m 3.09s
  20. user 0m 0.00s
  21. sys 0m 1.56s
  22. Signed-off-by: Jonas Gorski <jogo@openwrt.org>
  23. ---
  24. drivers/spi/spi-bcm63xx-hsspi.c | 13 +++++++++----
  25. 1 file changed, 9 insertions(+), 4 deletions(-)
  26. --- a/drivers/spi/spi-bcm63xx-hsspi.c
  27. +++ b/drivers/spi/spi-bcm63xx-hsspi.c
  28. @@ -76,6 +76,7 @@
  29. #define HSSPI_FIFO_REG(x) (0x200 + (x) * 0x200)
  30. +#define HSSPI_OP_MULTIBIT BIT(11)
  31. #define HSSPI_OP_CODE_SHIFT 13
  32. #define HSSPI_OP_SLEEP (0 << HSSPI_OP_CODE_SHIFT)
  33. #define HSSPI_OP_READ_WRITE (1 << HSSPI_OP_CODE_SHIFT)
  34. @@ -171,9 +172,12 @@ static int bcm63xx_hsspi_do_txrx(struct
  35. if (opcode != HSSPI_OP_READ)
  36. step_size -= HSSPI_OPCODE_LEN;
  37. - __raw_writel(0 << MODE_CTRL_PREPENDBYTE_CNT_SHIFT |
  38. - 2 << MODE_CTRL_MULTIDATA_WR_STRT_SHIFT |
  39. - 2 << MODE_CTRL_MULTIDATA_RD_STRT_SHIFT | 0xff,
  40. + if ((opcode == HSSPI_OP_READ && t->rx_nbits == SPI_NBITS_DUAL) ||
  41. + (opcode == HSSPI_OP_WRITE && t->tx_nbits == SPI_NBITS_DUAL))
  42. + opcode |= HSSPI_OP_MULTIBIT;
  43. +
  44. + __raw_writel(1 << MODE_CTRL_MULTIDATA_WR_SIZE_SHIFT |
  45. + 1 << MODE_CTRL_MULTIDATA_RD_SIZE_SHIFT | 0xff,
  46. bs->regs + HSSPI_PROFILE_MODE_CTRL_REG(chip_select));
  47. while (pending > 0) {
  48. @@ -374,7 +378,8 @@ static int bcm63xx_hsspi_probe(struct pl
  49. master->num_chipselect = 8;
  50. master->setup = bcm63xx_hsspi_setup;
  51. master->transfer_one_message = bcm63xx_hsspi_transfer_one;
  52. - master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH;
  53. + master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH |
  54. + SPI_RX_DUAL | SPI_TX_DUAL;
  55. master->bits_per_word_mask = SPI_BPW_MASK(8);
  56. master->auto_runtime_pm = true;