120-mfd-qcom-rpm-Driver-for-the-Qualcomm-RPM.patch 22 KB

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  1. From 58e214382bdd1eb48c5a3519182bddcb26edabad Mon Sep 17 00:00:00 2001
  2. From: Bjorn Andersson <bjorn.andersson@sonymobile.com>
  3. Date: Wed, 26 Nov 2014 13:51:00 -0800
  4. Subject: [PATCH] mfd: qcom-rpm: Driver for the Qualcomm RPM
  5. Driver for the Resource Power Manager (RPM) found in Qualcomm 8660, 8960
  6. and 8064 based devices. The driver exposes resources that child drivers
  7. can operate on; to implementing regulator, clock and bus frequency
  8. drivers.
  9. Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
  10. Signed-off-by: Lee Jones <lee.jones@linaro.org>
  11. ---
  12. drivers/mfd/Kconfig | 14 ++
  13. drivers/mfd/Makefile | 1 +
  14. drivers/mfd/qcom_rpm.c | 581 +++++++++++++++++++++++++++++++++++++++++++
  15. include/linux/mfd/qcom_rpm.h | 13 +
  16. 4 files changed, 609 insertions(+)
  17. create mode 100644 drivers/mfd/qcom_rpm.c
  18. create mode 100644 include/linux/mfd/qcom_rpm.h
  19. --- a/drivers/mfd/Kconfig
  20. +++ b/drivers/mfd/Kconfig
  21. @@ -567,6 +567,20 @@ config MFD_PM8921_CORE
  22. Say M here if you want to include support for PM8921 chip as a module.
  23. This will build a module called "pm8921-core".
  24. +config MFD_QCOM_RPM
  25. + tristate "Qualcomm Resource Power Manager (RPM)"
  26. + depends on ARCH_QCOM && OF
  27. + help
  28. + If you say yes to this option, support will be included for the
  29. + Resource Power Manager system found in the Qualcomm 8660, 8960 and
  30. + 8064 based devices.
  31. +
  32. + This is required to access many regulators, clocks and bus
  33. + frequencies controlled by the RPM on these devices.
  34. +
  35. + Say M here if you want to include support for the Qualcomm RPM as a
  36. + module. This will build a module called "qcom_rpm".
  37. +
  38. config MFD_SPMI_PMIC
  39. tristate "Qualcomm SPMI PMICs"
  40. depends on ARCH_QCOM || COMPILE_TEST
  41. --- a/drivers/mfd/Makefile
  42. +++ b/drivers/mfd/Makefile
  43. @@ -153,6 +153,7 @@ obj-$(CONFIG_MFD_SI476X_CORE) += si476x-
  44. obj-$(CONFIG_MFD_CS5535) += cs5535-mfd.o
  45. obj-$(CONFIG_MFD_OMAP_USB_HOST) += omap-usb-host.o omap-usb-tll.o
  46. obj-$(CONFIG_MFD_PM8921_CORE) += pm8921-core.o ssbi.o
  47. +obj-$(CONFIG_MFD_QCOM_RPM) += qcom_rpm.o
  48. obj-$(CONFIG_MFD_SPMI_PMIC) += qcom-spmi-pmic.o
  49. obj-$(CONFIG_TPS65911_COMPARATOR) += tps65911-comparator.o
  50. obj-$(CONFIG_MFD_TPS65090) += tps65090.o
  51. --- /dev/null
  52. +++ b/drivers/mfd/qcom_rpm.c
  53. @@ -0,0 +1,581 @@
  54. +/*
  55. + * Copyright (c) 2014, Sony Mobile Communications AB.
  56. + * Copyright (c) 2013, The Linux Foundation. All rights reserved.
  57. + * Author: Bjorn Andersson <bjorn.andersson@sonymobile.com>
  58. + *
  59. + * This program is free software; you can redistribute it and/or modify
  60. + * it under the terms of the GNU General Public License version 2 and
  61. + * only version 2 as published by the Free Software Foundation.
  62. + *
  63. + * This program is distributed in the hope that it will be useful,
  64. + * but WITHOUT ANY WARRANTY; without even the implied warranty of
  65. + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  66. + * GNU General Public License for more details.
  67. + */
  68. +
  69. +#include <linux/module.h>
  70. +#include <linux/platform_device.h>
  71. +#include <linux/of_platform.h>
  72. +#include <linux/io.h>
  73. +#include <linux/interrupt.h>
  74. +#include <linux/mfd/qcom_rpm.h>
  75. +#include <linux/mfd/syscon.h>
  76. +#include <linux/regmap.h>
  77. +
  78. +#include <dt-bindings/mfd/qcom-rpm.h>
  79. +
  80. +struct qcom_rpm_resource {
  81. + unsigned target_id;
  82. + unsigned status_id;
  83. + unsigned select_id;
  84. + unsigned size;
  85. +};
  86. +
  87. +struct qcom_rpm_data {
  88. + u32 version;
  89. + const struct qcom_rpm_resource *resource_table;
  90. + unsigned n_resources;
  91. +};
  92. +
  93. +struct qcom_rpm {
  94. + struct device *dev;
  95. + struct regmap *ipc_regmap;
  96. + unsigned ipc_offset;
  97. + unsigned ipc_bit;
  98. +
  99. + struct completion ack;
  100. + struct mutex lock;
  101. +
  102. + void __iomem *status_regs;
  103. + void __iomem *ctrl_regs;
  104. + void __iomem *req_regs;
  105. +
  106. + u32 ack_status;
  107. +
  108. + const struct qcom_rpm_data *data;
  109. +};
  110. +
  111. +#define RPM_STATUS_REG(rpm, i) ((rpm)->status_regs + (i) * 4)
  112. +#define RPM_CTRL_REG(rpm, i) ((rpm)->ctrl_regs + (i) * 4)
  113. +#define RPM_REQ_REG(rpm, i) ((rpm)->req_regs + (i) * 4)
  114. +
  115. +#define RPM_REQUEST_TIMEOUT (5 * HZ)
  116. +
  117. +#define RPM_REQUEST_CONTEXT 3
  118. +#define RPM_REQ_SELECT 11
  119. +#define RPM_ACK_CONTEXT 15
  120. +#define RPM_ACK_SELECTOR 23
  121. +#define RPM_SELECT_SIZE 7
  122. +
  123. +#define RPM_NOTIFICATION BIT(30)
  124. +#define RPM_REJECTED BIT(31)
  125. +
  126. +#define RPM_SIGNAL BIT(2)
  127. +
  128. +static const struct qcom_rpm_resource apq8064_rpm_resource_table[] = {
  129. + [QCOM_RPM_CXO_CLK] = { 25, 9, 5, 1 },
  130. + [QCOM_RPM_PXO_CLK] = { 26, 10, 6, 1 },
  131. + [QCOM_RPM_APPS_FABRIC_CLK] = { 27, 11, 8, 1 },
  132. + [QCOM_RPM_SYS_FABRIC_CLK] = { 28, 12, 9, 1 },
  133. + [QCOM_RPM_MM_FABRIC_CLK] = { 29, 13, 10, 1 },
  134. + [QCOM_RPM_DAYTONA_FABRIC_CLK] = { 30, 14, 11, 1 },
  135. + [QCOM_RPM_SFPB_CLK] = { 31, 15, 12, 1 },
  136. + [QCOM_RPM_CFPB_CLK] = { 32, 16, 13, 1 },
  137. + [QCOM_RPM_MMFPB_CLK] = { 33, 17, 14, 1 },
  138. + [QCOM_RPM_EBI1_CLK] = { 34, 18, 16, 1 },
  139. + [QCOM_RPM_APPS_FABRIC_HALT] = { 35, 19, 18, 1 },
  140. + [QCOM_RPM_APPS_FABRIC_MODE] = { 37, 20, 19, 1 },
  141. + [QCOM_RPM_APPS_FABRIC_IOCTL] = { 40, 21, 20, 1 },
  142. + [QCOM_RPM_APPS_FABRIC_ARB] = { 41, 22, 21, 12 },
  143. + [QCOM_RPM_SYS_FABRIC_HALT] = { 53, 23, 22, 1 },
  144. + [QCOM_RPM_SYS_FABRIC_MODE] = { 55, 24, 23, 1 },
  145. + [QCOM_RPM_SYS_FABRIC_IOCTL] = { 58, 25, 24, 1 },
  146. + [QCOM_RPM_SYS_FABRIC_ARB] = { 59, 26, 25, 30 },
  147. + [QCOM_RPM_MM_FABRIC_HALT] = { 89, 27, 26, 1 },
  148. + [QCOM_RPM_MM_FABRIC_MODE] = { 91, 28, 27, 1 },
  149. + [QCOM_RPM_MM_FABRIC_IOCTL] = { 94, 29, 28, 1 },
  150. + [QCOM_RPM_MM_FABRIC_ARB] = { 95, 30, 29, 21 },
  151. + [QCOM_RPM_PM8921_SMPS1] = { 116, 31, 30, 2 },
  152. + [QCOM_RPM_PM8921_SMPS2] = { 118, 33, 31, 2 },
  153. + [QCOM_RPM_PM8921_SMPS3] = { 120, 35, 32, 2 },
  154. + [QCOM_RPM_PM8921_SMPS4] = { 122, 37, 33, 2 },
  155. + [QCOM_RPM_PM8921_SMPS5] = { 124, 39, 34, 2 },
  156. + [QCOM_RPM_PM8921_SMPS6] = { 126, 41, 35, 2 },
  157. + [QCOM_RPM_PM8921_SMPS7] = { 128, 43, 36, 2 },
  158. + [QCOM_RPM_PM8921_SMPS8] = { 130, 45, 37, 2 },
  159. + [QCOM_RPM_PM8921_LDO1] = { 132, 47, 38, 2 },
  160. + [QCOM_RPM_PM8921_LDO2] = { 134, 49, 39, 2 },
  161. + [QCOM_RPM_PM8921_LDO3] = { 136, 51, 40, 2 },
  162. + [QCOM_RPM_PM8921_LDO4] = { 138, 53, 41, 2 },
  163. + [QCOM_RPM_PM8921_LDO5] = { 140, 55, 42, 2 },
  164. + [QCOM_RPM_PM8921_LDO6] = { 142, 57, 43, 2 },
  165. + [QCOM_RPM_PM8921_LDO7] = { 144, 59, 44, 2 },
  166. + [QCOM_RPM_PM8921_LDO8] = { 146, 61, 45, 2 },
  167. + [QCOM_RPM_PM8921_LDO9] = { 148, 63, 46, 2 },
  168. + [QCOM_RPM_PM8921_LDO10] = { 150, 65, 47, 2 },
  169. + [QCOM_RPM_PM8921_LDO11] = { 152, 67, 48, 2 },
  170. + [QCOM_RPM_PM8921_LDO12] = { 154, 69, 49, 2 },
  171. + [QCOM_RPM_PM8921_LDO13] = { 156, 71, 50, 2 },
  172. + [QCOM_RPM_PM8921_LDO14] = { 158, 73, 51, 2 },
  173. + [QCOM_RPM_PM8921_LDO15] = { 160, 75, 52, 2 },
  174. + [QCOM_RPM_PM8921_LDO16] = { 162, 77, 53, 2 },
  175. + [QCOM_RPM_PM8921_LDO17] = { 164, 79, 54, 2 },
  176. + [QCOM_RPM_PM8921_LDO18] = { 166, 81, 55, 2 },
  177. + [QCOM_RPM_PM8921_LDO19] = { 168, 83, 56, 2 },
  178. + [QCOM_RPM_PM8921_LDO20] = { 170, 85, 57, 2 },
  179. + [QCOM_RPM_PM8921_LDO21] = { 172, 87, 58, 2 },
  180. + [QCOM_RPM_PM8921_LDO22] = { 174, 89, 59, 2 },
  181. + [QCOM_RPM_PM8921_LDO23] = { 176, 91, 60, 2 },
  182. + [QCOM_RPM_PM8921_LDO24] = { 178, 93, 61, 2 },
  183. + [QCOM_RPM_PM8921_LDO25] = { 180, 95, 62, 2 },
  184. + [QCOM_RPM_PM8921_LDO26] = { 182, 97, 63, 2 },
  185. + [QCOM_RPM_PM8921_LDO27] = { 184, 99, 64, 2 },
  186. + [QCOM_RPM_PM8921_LDO28] = { 186, 101, 65, 2 },
  187. + [QCOM_RPM_PM8921_LDO29] = { 188, 103, 66, 2 },
  188. + [QCOM_RPM_PM8921_CLK1] = { 190, 105, 67, 2 },
  189. + [QCOM_RPM_PM8921_CLK2] = { 192, 107, 68, 2 },
  190. + [QCOM_RPM_PM8921_LVS1] = { 194, 109, 69, 1 },
  191. + [QCOM_RPM_PM8921_LVS2] = { 195, 110, 70, 1 },
  192. + [QCOM_RPM_PM8921_LVS3] = { 196, 111, 71, 1 },
  193. + [QCOM_RPM_PM8921_LVS4] = { 197, 112, 72, 1 },
  194. + [QCOM_RPM_PM8921_LVS5] = { 198, 113, 73, 1 },
  195. + [QCOM_RPM_PM8921_LVS6] = { 199, 114, 74, 1 },
  196. + [QCOM_RPM_PM8921_LVS7] = { 200, 115, 75, 1 },
  197. + [QCOM_RPM_PM8821_SMPS1] = { 201, 116, 76, 2 },
  198. + [QCOM_RPM_PM8821_SMPS2] = { 203, 118, 77, 2 },
  199. + [QCOM_RPM_PM8821_LDO1] = { 205, 120, 78, 2 },
  200. + [QCOM_RPM_PM8921_NCP] = { 207, 122, 80, 2 },
  201. + [QCOM_RPM_CXO_BUFFERS] = { 209, 124, 81, 1 },
  202. + [QCOM_RPM_USB_OTG_SWITCH] = { 210, 125, 82, 1 },
  203. + [QCOM_RPM_HDMI_SWITCH] = { 211, 126, 83, 1 },
  204. + [QCOM_RPM_DDR_DMM] = { 212, 127, 84, 2 },
  205. + [QCOM_RPM_VDDMIN_GPIO] = { 215, 131, 89, 1 },
  206. +};
  207. +
  208. +static const struct qcom_rpm_data apq8064_template = {
  209. + .version = 3,
  210. + .resource_table = apq8064_rpm_resource_table,
  211. + .n_resources = ARRAY_SIZE(apq8064_rpm_resource_table),
  212. +};
  213. +
  214. +static const struct qcom_rpm_resource msm8660_rpm_resource_table[] = {
  215. + [QCOM_RPM_CXO_CLK] = { 32, 12, 5, 1 },
  216. + [QCOM_RPM_PXO_CLK] = { 33, 13, 6, 1 },
  217. + [QCOM_RPM_PLL_4] = { 34, 14, 7, 1 },
  218. + [QCOM_RPM_APPS_FABRIC_CLK] = { 35, 15, 8, 1 },
  219. + [QCOM_RPM_SYS_FABRIC_CLK] = { 36, 16, 9, 1 },
  220. + [QCOM_RPM_MM_FABRIC_CLK] = { 37, 17, 10, 1 },
  221. + [QCOM_RPM_DAYTONA_FABRIC_CLK] = { 38, 18, 11, 1 },
  222. + [QCOM_RPM_SFPB_CLK] = { 39, 19, 12, 1 },
  223. + [QCOM_RPM_CFPB_CLK] = { 40, 20, 13, 1 },
  224. + [QCOM_RPM_MMFPB_CLK] = { 41, 21, 14, 1 },
  225. + [QCOM_RPM_SMI_CLK] = { 42, 22, 15, 1 },
  226. + [QCOM_RPM_EBI1_CLK] = { 43, 23, 16, 1 },
  227. + [QCOM_RPM_APPS_L2_CACHE_CTL] = { 44, 24, 17, 1 },
  228. + [QCOM_RPM_APPS_FABRIC_HALT] = { 45, 25, 18, 2 },
  229. + [QCOM_RPM_APPS_FABRIC_MODE] = { 47, 26, 19, 3 },
  230. + [QCOM_RPM_APPS_FABRIC_ARB] = { 51, 28, 21, 6 },
  231. + [QCOM_RPM_SYS_FABRIC_HALT] = { 63, 29, 22, 2 },
  232. + [QCOM_RPM_SYS_FABRIC_MODE] = { 65, 30, 23, 3 },
  233. + [QCOM_RPM_SYS_FABRIC_ARB] = { 69, 32, 25, 22 },
  234. + [QCOM_RPM_MM_FABRIC_HALT] = { 105, 33, 26, 2 },
  235. + [QCOM_RPM_MM_FABRIC_MODE] = { 107, 34, 27, 3 },
  236. + [QCOM_RPM_MM_FABRIC_ARB] = { 111, 36, 29, 23 },
  237. + [QCOM_RPM_PM8901_SMPS0] = { 134, 37, 30, 2 },
  238. + [QCOM_RPM_PM8901_SMPS1] = { 136, 39, 31, 2 },
  239. + [QCOM_RPM_PM8901_SMPS2] = { 138, 41, 32, 2 },
  240. + [QCOM_RPM_PM8901_SMPS3] = { 140, 43, 33, 2 },
  241. + [QCOM_RPM_PM8901_SMPS4] = { 142, 45, 34, 2 },
  242. + [QCOM_RPM_PM8901_LDO0] = { 144, 47, 35, 2 },
  243. + [QCOM_RPM_PM8901_LDO1] = { 146, 49, 36, 2 },
  244. + [QCOM_RPM_PM8901_LDO2] = { 148, 51, 37, 2 },
  245. + [QCOM_RPM_PM8901_LDO3] = { 150, 53, 38, 2 },
  246. + [QCOM_RPM_PM8901_LDO4] = { 152, 55, 39, 2 },
  247. + [QCOM_RPM_PM8901_LDO5] = { 154, 57, 40, 2 },
  248. + [QCOM_RPM_PM8901_LDO6] = { 156, 59, 41, 2 },
  249. + [QCOM_RPM_PM8901_LVS0] = { 158, 61, 42, 1 },
  250. + [QCOM_RPM_PM8901_LVS1] = { 159, 62, 43, 1 },
  251. + [QCOM_RPM_PM8901_LVS2] = { 160, 63, 44, 1 },
  252. + [QCOM_RPM_PM8901_LVS3] = { 161, 64, 45, 1 },
  253. + [QCOM_RPM_PM8901_MVS] = { 162, 65, 46, 1 },
  254. + [QCOM_RPM_PM8058_SMPS0] = { 163, 66, 47, 2 },
  255. + [QCOM_RPM_PM8058_SMPS1] = { 165, 68, 48, 2 },
  256. + [QCOM_RPM_PM8058_SMPS2] = { 167, 70, 49, 2 },
  257. + [QCOM_RPM_PM8058_SMPS3] = { 169, 72, 50, 2 },
  258. + [QCOM_RPM_PM8058_SMPS4] = { 171, 74, 51, 2 },
  259. + [QCOM_RPM_PM8058_LDO0] = { 173, 76, 52, 2 },
  260. + [QCOM_RPM_PM8058_LDO1] = { 175, 78, 53, 2 },
  261. + [QCOM_RPM_PM8058_LDO2] = { 177, 80, 54, 2 },
  262. + [QCOM_RPM_PM8058_LDO3] = { 179, 82, 55, 2 },
  263. + [QCOM_RPM_PM8058_LDO4] = { 181, 84, 56, 2 },
  264. + [QCOM_RPM_PM8058_LDO5] = { 183, 86, 57, 2 },
  265. + [QCOM_RPM_PM8058_LDO6] = { 185, 88, 58, 2 },
  266. + [QCOM_RPM_PM8058_LDO7] = { 187, 90, 59, 2 },
  267. + [QCOM_RPM_PM8058_LDO8] = { 189, 92, 60, 2 },
  268. + [QCOM_RPM_PM8058_LDO9] = { 191, 94, 61, 2 },
  269. + [QCOM_RPM_PM8058_LDO10] = { 193, 96, 62, 2 },
  270. + [QCOM_RPM_PM8058_LDO11] = { 195, 98, 63, 2 },
  271. + [QCOM_RPM_PM8058_LDO12] = { 197, 100, 64, 2 },
  272. + [QCOM_RPM_PM8058_LDO13] = { 199, 102, 65, 2 },
  273. + [QCOM_RPM_PM8058_LDO14] = { 201, 104, 66, 2 },
  274. + [QCOM_RPM_PM8058_LDO15] = { 203, 106, 67, 2 },
  275. + [QCOM_RPM_PM8058_LDO16] = { 205, 108, 68, 2 },
  276. + [QCOM_RPM_PM8058_LDO17] = { 207, 110, 69, 2 },
  277. + [QCOM_RPM_PM8058_LDO18] = { 209, 112, 70, 2 },
  278. + [QCOM_RPM_PM8058_LDO19] = { 211, 114, 71, 2 },
  279. + [QCOM_RPM_PM8058_LDO20] = { 213, 116, 72, 2 },
  280. + [QCOM_RPM_PM8058_LDO21] = { 215, 118, 73, 2 },
  281. + [QCOM_RPM_PM8058_LDO22] = { 217, 120, 74, 2 },
  282. + [QCOM_RPM_PM8058_LDO23] = { 219, 122, 75, 2 },
  283. + [QCOM_RPM_PM8058_LDO24] = { 221, 124, 76, 2 },
  284. + [QCOM_RPM_PM8058_LDO25] = { 223, 126, 77, 2 },
  285. + [QCOM_RPM_PM8058_LVS0] = { 225, 128, 78, 1 },
  286. + [QCOM_RPM_PM8058_LVS1] = { 226, 129, 79, 1 },
  287. + [QCOM_RPM_PM8058_NCP] = { 227, 130, 80, 2 },
  288. + [QCOM_RPM_CXO_BUFFERS] = { 229, 132, 81, 1 },
  289. +};
  290. +
  291. +static const struct qcom_rpm_data msm8660_template = {
  292. + .version = 2,
  293. + .resource_table = msm8660_rpm_resource_table,
  294. + .n_resources = ARRAY_SIZE(msm8660_rpm_resource_table),
  295. +};
  296. +
  297. +static const struct qcom_rpm_resource msm8960_rpm_resource_table[] = {
  298. + [QCOM_RPM_CXO_CLK] = { 25, 9, 5, 1 },
  299. + [QCOM_RPM_PXO_CLK] = { 26, 10, 6, 1 },
  300. + [QCOM_RPM_APPS_FABRIC_CLK] = { 27, 11, 8, 1 },
  301. + [QCOM_RPM_SYS_FABRIC_CLK] = { 28, 12, 9, 1 },
  302. + [QCOM_RPM_MM_FABRIC_CLK] = { 29, 13, 10, 1 },
  303. + [QCOM_RPM_DAYTONA_FABRIC_CLK] = { 30, 14, 11, 1 },
  304. + [QCOM_RPM_SFPB_CLK] = { 31, 15, 12, 1 },
  305. + [QCOM_RPM_CFPB_CLK] = { 32, 16, 13, 1 },
  306. + [QCOM_RPM_MMFPB_CLK] = { 33, 17, 14, 1 },
  307. + [QCOM_RPM_EBI1_CLK] = { 34, 18, 16, 1 },
  308. + [QCOM_RPM_APPS_FABRIC_HALT] = { 35, 19, 18, 1 },
  309. + [QCOM_RPM_APPS_FABRIC_MODE] = { 37, 20, 19, 1 },
  310. + [QCOM_RPM_APPS_FABRIC_IOCTL] = { 40, 21, 20, 1 },
  311. + [QCOM_RPM_APPS_FABRIC_ARB] = { 41, 22, 21, 12 },
  312. + [QCOM_RPM_SYS_FABRIC_HALT] = { 53, 23, 22, 1 },
  313. + [QCOM_RPM_SYS_FABRIC_MODE] = { 55, 24, 23, 1 },
  314. + [QCOM_RPM_SYS_FABRIC_IOCTL] = { 58, 25, 24, 1 },
  315. + [QCOM_RPM_SYS_FABRIC_ARB] = { 59, 26, 25, 29 },
  316. + [QCOM_RPM_MM_FABRIC_HALT] = { 88, 27, 26, 1 },
  317. + [QCOM_RPM_MM_FABRIC_MODE] = { 90, 28, 27, 1 },
  318. + [QCOM_RPM_MM_FABRIC_IOCTL] = { 93, 29, 28, 1 },
  319. + [QCOM_RPM_MM_FABRIC_ARB] = { 94, 30, 29, 23 },
  320. + [QCOM_RPM_PM8921_SMPS1] = { 117, 31, 30, 2 },
  321. + [QCOM_RPM_PM8921_SMPS2] = { 119, 33, 31, 2 },
  322. + [QCOM_RPM_PM8921_SMPS3] = { 121, 35, 32, 2 },
  323. + [QCOM_RPM_PM8921_SMPS4] = { 123, 37, 33, 2 },
  324. + [QCOM_RPM_PM8921_SMPS5] = { 125, 39, 34, 2 },
  325. + [QCOM_RPM_PM8921_SMPS6] = { 127, 41, 35, 2 },
  326. + [QCOM_RPM_PM8921_SMPS7] = { 129, 43, 36, 2 },
  327. + [QCOM_RPM_PM8921_SMPS8] = { 131, 45, 37, 2 },
  328. + [QCOM_RPM_PM8921_LDO1] = { 133, 47, 38, 2 },
  329. + [QCOM_RPM_PM8921_LDO2] = { 135, 49, 39, 2 },
  330. + [QCOM_RPM_PM8921_LDO3] = { 137, 51, 40, 2 },
  331. + [QCOM_RPM_PM8921_LDO4] = { 139, 53, 41, 2 },
  332. + [QCOM_RPM_PM8921_LDO5] = { 141, 55, 42, 2 },
  333. + [QCOM_RPM_PM8921_LDO6] = { 143, 57, 43, 2 },
  334. + [QCOM_RPM_PM8921_LDO7] = { 145, 59, 44, 2 },
  335. + [QCOM_RPM_PM8921_LDO8] = { 147, 61, 45, 2 },
  336. + [QCOM_RPM_PM8921_LDO9] = { 149, 63, 46, 2 },
  337. + [QCOM_RPM_PM8921_LDO10] = { 151, 65, 47, 2 },
  338. + [QCOM_RPM_PM8921_LDO11] = { 153, 67, 48, 2 },
  339. + [QCOM_RPM_PM8921_LDO12] = { 155, 69, 49, 2 },
  340. + [QCOM_RPM_PM8921_LDO13] = { 157, 71, 50, 2 },
  341. + [QCOM_RPM_PM8921_LDO14] = { 159, 73, 51, 2 },
  342. + [QCOM_RPM_PM8921_LDO15] = { 161, 75, 52, 2 },
  343. + [QCOM_RPM_PM8921_LDO16] = { 163, 77, 53, 2 },
  344. + [QCOM_RPM_PM8921_LDO17] = { 165, 79, 54, 2 },
  345. + [QCOM_RPM_PM8921_LDO18] = { 167, 81, 55, 2 },
  346. + [QCOM_RPM_PM8921_LDO19] = { 169, 83, 56, 2 },
  347. + [QCOM_RPM_PM8921_LDO20] = { 171, 85, 57, 2 },
  348. + [QCOM_RPM_PM8921_LDO21] = { 173, 87, 58, 2 },
  349. + [QCOM_RPM_PM8921_LDO22] = { 175, 89, 59, 2 },
  350. + [QCOM_RPM_PM8921_LDO23] = { 177, 91, 60, 2 },
  351. + [QCOM_RPM_PM8921_LDO24] = { 179, 93, 61, 2 },
  352. + [QCOM_RPM_PM8921_LDO25] = { 181, 95, 62, 2 },
  353. + [QCOM_RPM_PM8921_LDO26] = { 183, 97, 63, 2 },
  354. + [QCOM_RPM_PM8921_LDO27] = { 185, 99, 64, 2 },
  355. + [QCOM_RPM_PM8921_LDO28] = { 187, 101, 65, 2 },
  356. + [QCOM_RPM_PM8921_LDO29] = { 189, 103, 66, 2 },
  357. + [QCOM_RPM_PM8921_CLK1] = { 191, 105, 67, 2 },
  358. + [QCOM_RPM_PM8921_CLK2] = { 193, 107, 68, 2 },
  359. + [QCOM_RPM_PM8921_LVS1] = { 195, 109, 69, 1 },
  360. + [QCOM_RPM_PM8921_LVS2] = { 196, 110, 70, 1 },
  361. + [QCOM_RPM_PM8921_LVS3] = { 197, 111, 71, 1 },
  362. + [QCOM_RPM_PM8921_LVS4] = { 198, 112, 72, 1 },
  363. + [QCOM_RPM_PM8921_LVS5] = { 199, 113, 73, 1 },
  364. + [QCOM_RPM_PM8921_LVS6] = { 200, 114, 74, 1 },
  365. + [QCOM_RPM_PM8921_LVS7] = { 201, 115, 75, 1 },
  366. + [QCOM_RPM_PM8921_NCP] = { 202, 116, 80, 2 },
  367. + [QCOM_RPM_CXO_BUFFERS] = { 204, 118, 81, 1 },
  368. + [QCOM_RPM_USB_OTG_SWITCH] = { 205, 119, 82, 1 },
  369. + [QCOM_RPM_HDMI_SWITCH] = { 206, 120, 83, 1 },
  370. + [QCOM_RPM_DDR_DMM] = { 207, 121, 84, 2 },
  371. +};
  372. +
  373. +static const struct qcom_rpm_data msm8960_template = {
  374. + .version = 3,
  375. + .resource_table = msm8960_rpm_resource_table,
  376. + .n_resources = ARRAY_SIZE(msm8960_rpm_resource_table),
  377. +};
  378. +
  379. +static const struct of_device_id qcom_rpm_of_match[] = {
  380. + { .compatible = "qcom,rpm-apq8064", .data = &apq8064_template },
  381. + { .compatible = "qcom,rpm-msm8660", .data = &msm8660_template },
  382. + { .compatible = "qcom,rpm-msm8960", .data = &msm8960_template },
  383. + { }
  384. +};
  385. +MODULE_DEVICE_TABLE(of, qcom_rpm_of_match);
  386. +
  387. +int qcom_rpm_write(struct qcom_rpm *rpm,
  388. + int state,
  389. + int resource,
  390. + u32 *buf, size_t count)
  391. +{
  392. + const struct qcom_rpm_resource *res;
  393. + const struct qcom_rpm_data *data = rpm->data;
  394. + u32 sel_mask[RPM_SELECT_SIZE] = { 0 };
  395. + int left;
  396. + int ret = 0;
  397. + int i;
  398. +
  399. + if (WARN_ON(resource < 0 || resource >= data->n_resources))
  400. + return -EINVAL;
  401. +
  402. + res = &data->resource_table[resource];
  403. + if (WARN_ON(res->size != count))
  404. + return -EINVAL;
  405. +
  406. + mutex_lock(&rpm->lock);
  407. +
  408. + for (i = 0; i < res->size; i++)
  409. + writel_relaxed(buf[i], RPM_REQ_REG(rpm, res->target_id + i));
  410. +
  411. + bitmap_set((unsigned long *)sel_mask, res->select_id, 1);
  412. + for (i = 0; i < ARRAY_SIZE(sel_mask); i++) {
  413. + writel_relaxed(sel_mask[i],
  414. + RPM_CTRL_REG(rpm, RPM_REQ_SELECT + i));
  415. + }
  416. +
  417. + writel_relaxed(BIT(state), RPM_CTRL_REG(rpm, RPM_REQUEST_CONTEXT));
  418. +
  419. + reinit_completion(&rpm->ack);
  420. + regmap_write(rpm->ipc_regmap, rpm->ipc_offset, BIT(rpm->ipc_bit));
  421. +
  422. + left = wait_for_completion_timeout(&rpm->ack, RPM_REQUEST_TIMEOUT);
  423. + if (!left)
  424. + ret = -ETIMEDOUT;
  425. + else if (rpm->ack_status & RPM_REJECTED)
  426. + ret = -EIO;
  427. +
  428. + mutex_unlock(&rpm->lock);
  429. +
  430. + return ret;
  431. +}
  432. +EXPORT_SYMBOL(qcom_rpm_write);
  433. +
  434. +static irqreturn_t qcom_rpm_ack_interrupt(int irq, void *dev)
  435. +{
  436. + struct qcom_rpm *rpm = dev;
  437. + u32 ack;
  438. + int i;
  439. +
  440. + ack = readl_relaxed(RPM_CTRL_REG(rpm, RPM_ACK_CONTEXT));
  441. + for (i = 0; i < RPM_SELECT_SIZE; i++)
  442. + writel_relaxed(0, RPM_CTRL_REG(rpm, RPM_ACK_SELECTOR + i));
  443. + writel(0, RPM_CTRL_REG(rpm, RPM_ACK_CONTEXT));
  444. +
  445. + if (ack & RPM_NOTIFICATION) {
  446. + dev_warn(rpm->dev, "ignoring notification!\n");
  447. + } else {
  448. + rpm->ack_status = ack;
  449. + complete(&rpm->ack);
  450. + }
  451. +
  452. + return IRQ_HANDLED;
  453. +}
  454. +
  455. +static irqreturn_t qcom_rpm_err_interrupt(int irq, void *dev)
  456. +{
  457. + struct qcom_rpm *rpm = dev;
  458. +
  459. + regmap_write(rpm->ipc_regmap, rpm->ipc_offset, BIT(rpm->ipc_bit));
  460. + dev_err(rpm->dev, "RPM triggered fatal error\n");
  461. +
  462. + return IRQ_HANDLED;
  463. +}
  464. +
  465. +static irqreturn_t qcom_rpm_wakeup_interrupt(int irq, void *dev)
  466. +{
  467. + return IRQ_HANDLED;
  468. +}
  469. +
  470. +static int qcom_rpm_probe(struct platform_device *pdev)
  471. +{
  472. + const struct of_device_id *match;
  473. + struct device_node *syscon_np;
  474. + struct resource *res;
  475. + struct qcom_rpm *rpm;
  476. + u32 fw_version[3];
  477. + int irq_wakeup;
  478. + int irq_ack;
  479. + int irq_err;
  480. + int ret;
  481. +
  482. + rpm = devm_kzalloc(&pdev->dev, sizeof(*rpm), GFP_KERNEL);
  483. + if (!rpm)
  484. + return -ENOMEM;
  485. +
  486. + rpm->dev = &pdev->dev;
  487. + mutex_init(&rpm->lock);
  488. + init_completion(&rpm->ack);
  489. +
  490. + irq_ack = platform_get_irq_byname(pdev, "ack");
  491. + if (irq_ack < 0) {
  492. + dev_err(&pdev->dev, "required ack interrupt missing\n");
  493. + return irq_ack;
  494. + }
  495. +
  496. + irq_err = platform_get_irq_byname(pdev, "err");
  497. + if (irq_err < 0) {
  498. + dev_err(&pdev->dev, "required err interrupt missing\n");
  499. + return irq_err;
  500. + }
  501. +
  502. + irq_wakeup = platform_get_irq_byname(pdev, "wakeup");
  503. + if (irq_wakeup < 0) {
  504. + dev_err(&pdev->dev, "required wakeup interrupt missing\n");
  505. + return irq_wakeup;
  506. + }
  507. +
  508. + match = of_match_device(qcom_rpm_of_match, &pdev->dev);
  509. + rpm->data = match->data;
  510. +
  511. + res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  512. + rpm->status_regs = devm_ioremap_resource(&pdev->dev, res);
  513. + if (IS_ERR(rpm->status_regs))
  514. + return PTR_ERR(rpm->status_regs);
  515. + rpm->ctrl_regs = rpm->status_regs + 0x400;
  516. + rpm->req_regs = rpm->status_regs + 0x600;
  517. +
  518. + syscon_np = of_parse_phandle(pdev->dev.of_node, "qcom,ipc", 0);
  519. + if (!syscon_np) {
  520. + dev_err(&pdev->dev, "no qcom,ipc node\n");
  521. + return -ENODEV;
  522. + }
  523. +
  524. + rpm->ipc_regmap = syscon_node_to_regmap(syscon_np);
  525. + if (IS_ERR(rpm->ipc_regmap))
  526. + return PTR_ERR(rpm->ipc_regmap);
  527. +
  528. + ret = of_property_read_u32_index(pdev->dev.of_node, "qcom,ipc", 1,
  529. + &rpm->ipc_offset);
  530. + if (ret < 0) {
  531. + dev_err(&pdev->dev, "no offset in qcom,ipc\n");
  532. + return -EINVAL;
  533. + }
  534. +
  535. + ret = of_property_read_u32_index(pdev->dev.of_node, "qcom,ipc", 2,
  536. + &rpm->ipc_bit);
  537. + if (ret < 0) {
  538. + dev_err(&pdev->dev, "no bit in qcom,ipc\n");
  539. + return -EINVAL;
  540. + }
  541. +
  542. + dev_set_drvdata(&pdev->dev, rpm);
  543. +
  544. + fw_version[0] = readl(RPM_STATUS_REG(rpm, 0));
  545. + fw_version[1] = readl(RPM_STATUS_REG(rpm, 1));
  546. + fw_version[2] = readl(RPM_STATUS_REG(rpm, 2));
  547. + if (fw_version[0] != rpm->data->version) {
  548. + dev_err(&pdev->dev,
  549. + "RPM version %u.%u.%u incompatible with driver version %u",
  550. + fw_version[0],
  551. + fw_version[1],
  552. + fw_version[2],
  553. + rpm->data->version);
  554. + return -EFAULT;
  555. + }
  556. +
  557. + dev_info(&pdev->dev, "RPM firmware %u.%u.%u\n", fw_version[0],
  558. + fw_version[1],
  559. + fw_version[2]);
  560. +
  561. + ret = devm_request_irq(&pdev->dev,
  562. + irq_ack,
  563. + qcom_rpm_ack_interrupt,
  564. + IRQF_TRIGGER_RISING | IRQF_NO_SUSPEND,
  565. + "qcom_rpm_ack",
  566. + rpm);
  567. + if (ret) {
  568. + dev_err(&pdev->dev, "failed to request ack interrupt\n");
  569. + return ret;
  570. + }
  571. +
  572. + ret = irq_set_irq_wake(irq_ack, 1);
  573. + if (ret)
  574. + dev_warn(&pdev->dev, "failed to mark ack irq as wakeup\n");
  575. +
  576. + ret = devm_request_irq(&pdev->dev,
  577. + irq_err,
  578. + qcom_rpm_err_interrupt,
  579. + IRQF_TRIGGER_RISING,
  580. + "qcom_rpm_err",
  581. + rpm);
  582. + if (ret) {
  583. + dev_err(&pdev->dev, "failed to request err interrupt\n");
  584. + return ret;
  585. + }
  586. +
  587. + ret = devm_request_irq(&pdev->dev,
  588. + irq_wakeup,
  589. + qcom_rpm_wakeup_interrupt,
  590. + IRQF_TRIGGER_RISING,
  591. + "qcom_rpm_wakeup",
  592. + rpm);
  593. + if (ret) {
  594. + dev_err(&pdev->dev, "failed to request wakeup interrupt\n");
  595. + return ret;
  596. + }
  597. +
  598. + ret = irq_set_irq_wake(irq_wakeup, 1);
  599. + if (ret)
  600. + dev_warn(&pdev->dev, "failed to mark wakeup irq as wakeup\n");
  601. +
  602. + return of_platform_populate(pdev->dev.of_node, NULL, NULL, &pdev->dev);
  603. +}
  604. +
  605. +static int qcom_rpm_remove(struct platform_device *pdev)
  606. +{
  607. + of_platform_depopulate(&pdev->dev);
  608. + return 0;
  609. +}
  610. +
  611. +static struct platform_driver qcom_rpm_driver = {
  612. + .probe = qcom_rpm_probe,
  613. + .remove = qcom_rpm_remove,
  614. + .driver = {
  615. + .name = "qcom_rpm",
  616. + .of_match_table = qcom_rpm_of_match,
  617. + },
  618. +};
  619. +
  620. +static int __init qcom_rpm_init(void)
  621. +{
  622. + return platform_driver_register(&qcom_rpm_driver);
  623. +}
  624. +arch_initcall(qcom_rpm_init);
  625. +
  626. +static void __exit qcom_rpm_exit(void)
  627. +{
  628. + platform_driver_unregister(&qcom_rpm_driver);
  629. +}
  630. +module_exit(qcom_rpm_exit)
  631. +
  632. +MODULE_DESCRIPTION("Qualcomm Resource Power Manager driver");
  633. +MODULE_LICENSE("GPL v2");
  634. +MODULE_AUTHOR("Bjorn Andersson <bjorn.andersson@sonymobile.com>");
  635. --- /dev/null
  636. +++ b/include/linux/mfd/qcom_rpm.h
  637. @@ -0,0 +1,13 @@
  638. +#ifndef __QCOM_RPM_H__
  639. +#define __QCOM_RPM_H__
  640. +
  641. +#include <linux/types.h>
  642. +
  643. +struct qcom_rpm;
  644. +
  645. +#define QCOM_RPM_ACTIVE_STATE 0
  646. +#define QCOM_RPM_SLEEP_STATE 1
  647. +
  648. +int qcom_rpm_write(struct qcom_rpm *rpm, int state, int resource, u32 *buf, size_t count);
  649. +
  650. +#endif