160-clk-qcom-Add-EBI2-clocks-for-IPQ806x.patch 2.1 KB

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  1. From 4c385b25fab119144bffb255ad77712fe586ac10 Mon Sep 17 00:00:00 2001
  2. From: Archit Taneja <architt@codeaurora.org>
  3. Date: Thu, 2 Apr 2015 11:20:41 +0530
  4. Subject: [PATCH] clk: qcom: Add EBI2 clocks for IPQ806x
  5. The NAND controller within EBI2 requires EBI2_CLK and
  6. EBI2_ALWAYS_ON_CLK clocks. Create structs for these clocks so
  7. that they can be used by the NAND controller driver. Add an entry
  8. for EBI2_AON_CLK in the gcc-ipq806x DT binding document.
  9. Signed-off-by: Archit Taneja <architt@codeaurora.org>
  10. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
  11. ---
  12. drivers/clk/qcom/gcc-ipq806x.c | 32 ++++++++++++++++++++++++++++
  13. include/dt-bindings/clock/qcom,gcc-ipq806x.h | 1 +
  14. 2 files changed, 33 insertions(+)
  15. --- a/drivers/clk/qcom/gcc-ipq806x.c
  16. +++ b/drivers/clk/qcom/gcc-ipq806x.c
  17. @@ -2239,6 +2239,36 @@ static struct clk_branch usb_fs1_h_clk =
  18. },
  19. };
  20. +static struct clk_branch ebi2_clk = {
  21. + .hwcg_reg = 0x3b00,
  22. + .hwcg_bit = 6,
  23. + .halt_reg = 0x2fcc,
  24. + .halt_bit = 1,
  25. + .clkr = {
  26. + .enable_reg = 0x3b00,
  27. + .enable_mask = BIT(4),
  28. + .hw.init = &(struct clk_init_data){
  29. + .name = "ebi2_clk",
  30. + .ops = &clk_branch_ops,
  31. + .flags = CLK_IS_ROOT,
  32. + },
  33. + },
  34. +};
  35. +
  36. +static struct clk_branch ebi2_aon_clk = {
  37. + .halt_reg = 0x2fcc,
  38. + .halt_bit = 0,
  39. + .clkr = {
  40. + .enable_reg = 0x3b00,
  41. + .enable_mask = BIT(8),
  42. + .hw.init = &(struct clk_init_data){
  43. + .name = "ebi2_always_on_clk",
  44. + .ops = &clk_branch_ops,
  45. + .flags = CLK_IS_ROOT,
  46. + },
  47. + },
  48. +};
  49. +
  50. static struct clk_regmap *gcc_ipq806x_clks[] = {
  51. [PLL0] = &pll0.clkr,
  52. [PLL0_VOTE] = &pll0_vote,
  53. @@ -2341,6 +2371,8 @@ static struct clk_regmap *gcc_ipq806x_cl
  54. [USB_FS1_XCVR_SRC] = &usb_fs1_xcvr_clk_src.clkr,
  55. [USB_FS1_XCVR_CLK] = &usb_fs1_xcvr_clk.clkr,
  56. [USB_FS1_SYSTEM_CLK] = &usb_fs1_sys_clk.clkr,
  57. + [EBI2_CLK] = &ebi2_clk.clkr,
  58. + [EBI2_AON_CLK] = &ebi2_aon_clk.clkr,
  59. [PLL9] = &hfpll0.clkr,
  60. [PLL10] = &hfpll1.clkr,
  61. [PLL12] = &hfpll_l2.clkr,
  62. --- a/include/dt-bindings/clock/qcom,gcc-ipq806x.h
  63. +++ b/include/dt-bindings/clock/qcom,gcc-ipq806x.h
  64. @@ -289,5 +289,6 @@
  65. #define UBI32_CORE2_CLK_SRC 278
  66. #define UBI32_CORE1_CLK 279
  67. #define UBI32_CORE2_CLK 280
  68. +#define EBI2_AON_CLK 281
  69. #endif