155-dt-bindings-qcom_adm-Fix-channel-specifiers.patch 2.8 KB

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  4. Subject: [v6,1/2] dt/bindings: qcom_adm: Fix channel specifiers
  5. From: Andy Gross <agross@codeaurora.org>
  6. X-Patchwork-Id: 6027361
  7. Message-Id: <1426571172-9711-2-git-send-email-agross@codeaurora.org>
  8. To: Vinod Koul <vinod.koul@intel.com>
  9. Cc: devicetree@vger.kernel.org, dmaengine@vger.kernel.org,
  10. linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org,
  11. linux-arm-kernel@lists.infradead.org, Kumar Gala <galak@codeaurora.org>,
  12. Bjorn Andersson <bjorn.andersson@sonymobile.com>,
  13. Andy Gross <agross@codeaurora.org>
  14. Date: Tue, 17 Mar 2015 00:46:11 -0500
  15. This patch removes the crci information from the dma channel property. At least
  16. one client device requires using more than one CRCI value for a channel. This
  17. does not match the current binding and the crci information needs to be removed.
  18. Instead, the client device will provide this information via other means.
  19. Signed-off-by: Andy Gross <agross@codeaurora.org>
  20. ---
  21. Documentation/devicetree/bindings/dma/qcom_adm.txt | 16 ++++++----------
  22. 1 file changed, 6 insertions(+), 10 deletions(-)
  23. --- a/Documentation/devicetree/bindings/dma/qcom_adm.txt
  24. +++ b/Documentation/devicetree/bindings/dma/qcom_adm.txt
  25. @@ -4,8 +4,7 @@ Required properties:
  26. - compatible: must contain "qcom,adm" for IPQ/APQ8064 and MSM8960
  27. - reg: Address range for DMA registers
  28. - interrupts: Should contain one interrupt shared by all channels
  29. -- #dma-cells: must be <2>. First cell denotes the channel number. Second cell
  30. - denotes CRCI (client rate control interface) flow control assignment.
  31. +- #dma-cells: must be <1>. First cell denotes the channel number.
  32. - clocks: Should contain the core clock and interface clock.
  33. - clock-names: Must contain "core" for the core clock and "iface" for the
  34. interface clock.
  35. @@ -22,7 +21,7 @@ Example:
  36. compatible = "qcom,adm";
  37. reg = <0x18300000 0x100000>;
  38. interrupts = <0 170 0>;
  39. - #dma-cells = <2>;
  40. + #dma-cells = <1>;
  41. clocks = <&gcc ADM0_CLK>, <&gcc ADM0_PBUS_CLK>;
  42. clock-names = "core", "iface";
  43. @@ -35,15 +34,12 @@ Example:
  44. qcom,ee = <0>;
  45. };
  46. -DMA clients must use the format descripted in the dma.txt file, using a three
  47. +DMA clients must use the format descripted in the dma.txt file, using a two
  48. cell specifier for each channel.
  49. -Each dmas request consists of 3 cells:
  50. +Each dmas request consists of two cells:
  51. 1. phandle pointing to the DMA controller
  52. 2. channel number
  53. - 3. CRCI assignment, if applicable. If no CRCI flow control is required, use 0.
  54. - The CRCI is used for flow control. It identifies the peripheral device that
  55. - is the source/destination for the transferred data.
  56. Example:
  57. @@ -56,7 +52,7 @@ Example:
  58. cs-gpios = <&qcom_pinmux 20 0>;
  59. - dmas = <&adm_dma 6 9>,
  60. - <&adm_dma 5 10>;
  61. + dmas = <&adm_dma 6>,
  62. + <&adm_dma 5>;
  63. dma-names = "rx", "tx";
  64. };