TDW89X0.dtsi 4.5 KB

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  1. /include/ "vr9.dtsi"
  2. / {
  3. chosen {
  4. bootargs = "console=ttyLTQ0,115200 init=/etc/preinit";
  5. leds {
  6. /* the power led can't be controlled, use the wps led instead */
  7. boot = &wps;
  8. failsafe = &wps;
  9. dsl = &dsl;
  10. internet = &internet;
  11. usb = &usb0;
  12. usb2 = &usb2;
  13. };
  14. };
  15. memory@0 {
  16. reg = <0x0 0x4000000>;
  17. };
  18. fpi@10000000 {
  19. gpio: pinmux@E100B10 {
  20. pinctrl-names = "default";
  21. pinctrl-0 = <&state_default>;
  22. state_default: pinmux {
  23. mdio {
  24. lantiq,groups = "mdio";
  25. lantiq,function = "mdio";
  26. };
  27. gphy-leds {
  28. lantiq,groups = "gphy0 led1", "gphy1 led1";
  29. lantiq,function = "gphy";
  30. lantiq,pull = <2>;
  31. lantiq,open-drain = <0>;
  32. lantiq,output = <1>;
  33. };
  34. phy-rst {
  35. lantiq,pins = "io42";
  36. lantiq,pull = <0>;
  37. lantiq,open-drain = <0>;
  38. lantiq,output = <1>;
  39. };
  40. pcie-rst {
  41. lantiq,pins = "io38";
  42. lantiq,pull = <0>;
  43. lantiq,output = <1>;
  44. };
  45. };
  46. pins_spi_default: pins_spi_default {
  47. spi_in {
  48. lantiq,groups = "spi_di";
  49. lantiq,function = "spi";
  50. };
  51. spi_out {
  52. lantiq,groups = "spi_do", "spi_clk",
  53. "spi_cs4";
  54. lantiq,function = "spi";
  55. lantiq,output = <1>;
  56. };
  57. };
  58. };
  59. ifxhcd@E101000 {
  60. status = "okay";
  61. gpios = <&gpio 33 0>;
  62. lantiq,portmask = <0x3>;
  63. };
  64. ifxhcd@E106000 {
  65. status = "okay";
  66. gpios = <&gpio 33 0>;
  67. };
  68. };
  69. gphy-xrx200 {
  70. compatible = "lantiq,phy-xrx200";
  71. firmware = "lantiq/vr9_phy11g_a2x.bin";
  72. phys = [ 00 01 ];
  73. };
  74. ath9k_eep {
  75. compatible = "ath9k,eeprom";
  76. ath,eep-flash = <&ath9k_cal 0x21000>;
  77. ath,mac-offset = <0xf100>;
  78. ath,mac-increment;
  79. ath,led-pin = <0>;
  80. ath,disable-5ghz;
  81. ath,led-active-high;
  82. };
  83. gpio-keys-polled {
  84. compatible = "gpio-keys-polled";
  85. #address-cells = <1>;
  86. #size-cells = <0>;
  87. poll-interval = <100>;
  88. reset {
  89. label = "reset";
  90. gpios = <&gpio 0 1>;
  91. linux,code = <0x198>;
  92. };
  93. wifi {
  94. label = "wifi";
  95. gpios = <&gpio 9 0>;
  96. linux,code = <0xf7>;
  97. linux,input-type = <5>; /* EV_SW */
  98. };
  99. wps {
  100. label = "wps";
  101. gpios = <&gpio 39 1>;
  102. linux,code = <0x211>;
  103. };
  104. };
  105. gpio-leds {
  106. compatible = "gpio-leds";
  107. /*
  108. power is not controllable via gpio
  109. */
  110. dsl: dsl {
  111. label = "tdw89x0:green:dsl";
  112. gpios = <&gpio 4 0>;
  113. };
  114. internet: internet {
  115. label = "tdw89x0:green:internet";
  116. gpios = <&gpio 5 0>;
  117. };
  118. usb0: usb0 {
  119. label = "tdw89x0:green:usb";
  120. gpios = <&gpio 19 0>;
  121. };
  122. usb2: usb2 {
  123. label = "tdw89x0:green:usb2";
  124. gpios = <&gpio 20 0>;
  125. };
  126. wps: wps {
  127. label = "tdw89x0:green:wps";
  128. gpios = <&gpio 37 0>;
  129. };
  130. };
  131. };
  132. &spi {
  133. pinctrl-names = "default";
  134. pinctrl-0 = <&pins_spi_default>;
  135. status = "ok";
  136. m25p80@4 {
  137. #address-cells = <1>;
  138. #size-cells = <1>;
  139. compatible = "jedec,spi-nor";
  140. reg = <4 0>;
  141. spi-max-frequency = <33250000>;
  142. m25p,fast-read;
  143. partitions {
  144. compatible = "fixed-partitions";
  145. #address-cells = <1>;
  146. #size-cells = <1>;
  147. partition@0 {
  148. reg = <0x0 0x20000>;
  149. label = "u-boot";
  150. read-only;
  151. };
  152. partition@20000 {
  153. reg = <0x20000 0x7a0000>;
  154. label = "firmware";
  155. };
  156. partition@7c0000 {
  157. reg = <0x7c0000 0x10000>;
  158. label = "config";
  159. read-only;
  160. };
  161. ath9k_cal: partition@7d0000 {
  162. reg = <0x7d0000 0x30000>;
  163. label = "boardconfig";
  164. read-only;
  165. };
  166. };
  167. };
  168. };
  169. &eth0 {
  170. lan: interface@0 {
  171. compatible = "lantiq,xrx200-pdi";
  172. #address-cells = <1>;
  173. #size-cells = <0>;
  174. reg = <0>;
  175. mtd-mac-address = <&ath9k_cal 0xf100>;
  176. lantiq,switch;
  177. ethernet@0 {
  178. compatible = "lantiq,xrx200-pdi-port";
  179. reg = <0>;
  180. phy-mode = "rgmii";
  181. phy-handle = <&phy0>;
  182. // gpios = <&gpio 42 1>;
  183. };
  184. ethernet@5 {
  185. compatible = "lantiq,xrx200-pdi-port";
  186. reg = <5>;
  187. phy-mode = "rgmii";
  188. phy-handle = <&phy5>;
  189. };
  190. ethernet@2 {
  191. compatible = "lantiq,xrx200-pdi-port";
  192. reg = <2>;
  193. phy-mode = "gmii";
  194. phy-handle = <&phy11>;
  195. };
  196. ethernet@3 {
  197. compatible = "lantiq,xrx200-pdi-port";
  198. reg = <4>;
  199. phy-mode = "gmii";
  200. phy-handle = <&phy13>;
  201. };
  202. };
  203. mdio@0 {
  204. #address-cells = <1>;
  205. #size-cells = <0>;
  206. compatible = "lantiq,xrx200-mdio";
  207. phy0: ethernet-phy@0 {
  208. reg = <0x0>;
  209. compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
  210. };
  211. phy5: ethernet-phy@5 {
  212. reg = <0x5>;
  213. compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
  214. };
  215. phy11: ethernet-phy@11 {
  216. reg = <0x11>;
  217. compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
  218. };
  219. phy13: ethernet-phy@13 {
  220. reg = <0x13>;
  221. compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
  222. };
  223. };
  224. };