ar9.dtsi 4.3 KB

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  1. / {
  2. #address-cells = <1>;
  3. #size-cells = <1>;
  4. compatible = "lantiq,xway", "lantiq,ar9";
  5. cpus {
  6. cpu@0 {
  7. compatible = "mips,mips34K";
  8. };
  9. };
  10. memory@0 {
  11. device_type = "memory";
  12. };
  13. biu@1F800000 {
  14. #address-cells = <1>;
  15. #size-cells = <1>;
  16. compatible = "lantiq,biu", "simple-bus";
  17. reg = <0x1F800000 0x800000>;
  18. ranges = <0x0 0x1F800000 0x7FFFFF>;
  19. icu0: icu@80200 {
  20. #interrupt-cells = <1>;
  21. interrupt-controller;
  22. compatible = "lantiq,icu";
  23. reg = <0x80200 0x28
  24. 0x80228 0x28
  25. 0x80250 0x28
  26. 0x80278 0x28
  27. 0x802a0 0x28>;
  28. };
  29. watchdog@803F0 {
  30. compatible = "lantiq,wdt";
  31. reg = <0x803F0 0x10>;
  32. };
  33. };
  34. sram@1F000000 {
  35. #address-cells = <1>;
  36. #size-cells = <1>;
  37. compatible = "lantiq,sram", "simple-bus";
  38. reg = <0x1F000000 0x800000>;
  39. ranges = <0x0 0x1F000000 0x7FFFFF>;
  40. eiu0: eiu@101000 {
  41. #interrupt-cells = <1>;
  42. interrupt-controller;
  43. compatible = "lantiq,eiu-xway";
  44. reg = <0x101000 0x1000>;
  45. interrupt-parent = <&icu0>;
  46. lantiq,eiu-irqs = <166 135 66 40 41 42>;
  47. };
  48. pmu0: pmu@102000 {
  49. compatible = "lantiq,pmu-xway";
  50. reg = <0x102000 0x1000>;
  51. };
  52. cgu0: cgu@103000 {
  53. compatible = "lantiq,cgu-xway";
  54. reg = <0x103000 0x1000>;
  55. #clock-cells = <1>;
  56. };
  57. rcu0: rcu@203000 {
  58. compatible = "lantiq,rcu-xway";
  59. reg = <0x203000 0x1000>;
  60. };
  61. };
  62. fpi@10000000 {
  63. #address-cells = <1>;
  64. #size-cells = <1>;
  65. compatible = "lantiq,fpi", "simple-bus";
  66. ranges = <0x0 0x10000000 0xEEFFFFF>;
  67. reg = <0x10000000 0xEF00000>;
  68. localbus@0 {
  69. #address-cells = <2>;
  70. #size-cells = <1>;
  71. ranges = <0 0 0x0 0x3ffffff /* addrsel0 */
  72. 1 0 0x4000000 0x4000010>; /* addsel1 */
  73. compatible = "lantiq,localbus", "simple-bus";
  74. };
  75. gptu@E100A00 {
  76. compatible = "lantiq,gptu-xway";
  77. reg = <0xE100A00 0x100>;
  78. interrupt-parent = <&icu0>;
  79. interrupts = <126 127 128 129 130 131>;
  80. };
  81. asc0: serial@E100400 {
  82. compatible = "lantiq,asc";
  83. reg = <0xE100400 0x400>;
  84. interrupt-parent = <&icu0>;
  85. interrupts = <104 105 106>;
  86. status = "disabled";
  87. };
  88. spi: spi@E100800 {
  89. compatible = "lantiq,xrx100-spi";
  90. reg = <0xE100800 0x100>;
  91. interrupt-parent = <&icu0>;
  92. interrupts = <22 23 24>;
  93. interrupt-names = "spi_rx", "spi_tx", "spi_err",
  94. "spi_frm";
  95. #address-cells = <1>;
  96. #size-cells = <1>;
  97. status = "disabled";
  98. };
  99. gpio: pinmux@E100B10 {
  100. compatible = "lantiq,xrx100-pinctrl";
  101. #gpio-cells = <2>;
  102. gpio-controller;
  103. reg = <0xE100B10 0xA0>;
  104. };
  105. asc1: serial@E100C00 {
  106. compatible = "lantiq,asc";
  107. reg = <0xE100C00 0x400>;
  108. interrupt-parent = <&icu0>;
  109. interrupts = <112 113 114>;
  110. };
  111. ifxhcd@E101000 {
  112. compatible = "lantiq,ifxhcd-arx100", "lantiq,ifxhcd-arx100-dwc2";
  113. reg = <0xE101000 0x1000
  114. 0xE120000 0x3f000>;
  115. interrupt-parent = <&icu0>;
  116. interrupts = <62 91>;
  117. status = "disabled";
  118. };
  119. ifxhcd@E106000 {
  120. compatible = "lantiq,ifxhcd-arx100-dwc2";
  121. reg = <0xE106000 0x1000
  122. 0xE1E0000 0x3f000>;
  123. interrupt-parent = <&icu0>;
  124. interrupts = <91>;
  125. status = "disabled";
  126. };
  127. deu@E103100 {
  128. compatible = "lantiq,deu-arx100";
  129. reg = <0xE103100 0xf00>;
  130. };
  131. dma0: dma@E104100 {
  132. compatible = "lantiq,dma-xway";
  133. reg = <0xE104100 0x800>;
  134. };
  135. ebu0: ebu@E105300 {
  136. compatible = "lantiq,ebu-xway";
  137. reg = <0xE105300 0x100>;
  138. };
  139. mei@E116000 {
  140. compatible = "lantiq,mei-xway";
  141. interrupt-parent = <&icu0>;
  142. interrupts = <63>;
  143. };
  144. etop@E180000 {
  145. compatible = "lantiq,etop-xway";
  146. reg = <0xE180000 0x40000
  147. 0xE108000 0x200>;
  148. interrupt-parent = <&icu0>;
  149. interrupts = <73 72>;
  150. mac-address = [ 00 11 22 33 44 55 ];
  151. };
  152. ppe@E234000 {
  153. compatible = "lantiq,ppe-arx100";
  154. interrupt-parent = <&icu0>;
  155. interrupts = <96>;
  156. };
  157. pci0: pci@E105400 {
  158. status = "disabled";
  159. #address-cells = <3>;
  160. #size-cells = <2>;
  161. #interrupt-cells = <1>;
  162. compatible = "lantiq,pci-xway";
  163. bus-range = <0x0 0x0>;
  164. ranges = <0x2000000 0 0x8000000 0x8000000 0 0x2000000 /* pci memory */
  165. 0x1000000 0 0x00000000 0xAE00000 0 0x200000>; /* io space */
  166. reg = <0x7000000 0x8000 /* config space */
  167. 0xE105400 0x400>; /* pci bridge */
  168. lantiq,bus-clock = <33333333>;
  169. interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
  170. interrupt-map = <0x7000 0 0 1 &icu0 30 1>;
  171. req-mask = <0x1>;
  172. };
  173. };
  174. adsl {
  175. compatible = "lantiq,adsl-arx100";
  176. };
  177. };