0014-MTD-lantiq-xway-the-latched-command-should-be-persis.patch 1.4 KB

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  1. From b454cefd675fc1bd3d8c690c1bd1d8f4678e9922 Mon Sep 17 00:00:00 2001
  2. From: John Crispin <blogic@openwrt.org>
  3. Date: Sun, 28 Jul 2013 18:06:39 +0200
  4. Subject: [PATCH 14/36] MTD: lantiq: xway: the latched command should be
  5. persistent
  6. Signed-off-by: John Crispin <blogic@openwrt.org>
  7. ---
  8. drivers/mtd/nand/xway_nand.c | 12 ++++++------
  9. 1 file changed, 6 insertions(+), 6 deletions(-)
  10. --- a/drivers/mtd/nand/xway_nand.c
  11. +++ b/drivers/mtd/nand/xway_nand.c
  12. @@ -54,6 +54,8 @@
  13. #define NAND_CON_CSMUX (1 << 1)
  14. #define NAND_CON_NANDM 1
  15. +static u32 xway_latchcmd;
  16. +
  17. static void xway_reset_chip(struct nand_chip *chip)
  18. {
  19. unsigned long nandaddr = (unsigned long) chip->IO_ADDR_W;
  20. @@ -94,17 +96,15 @@ static void xway_cmd_ctrl(struct mtd_inf
  21. unsigned long flags;
  22. if (ctrl & NAND_CTRL_CHANGE) {
  23. - nandaddr &= ~(NAND_WRITE_CMD | NAND_WRITE_ADDR);
  24. if (ctrl & NAND_CLE)
  25. - nandaddr |= NAND_WRITE_CMD;
  26. - else
  27. - nandaddr |= NAND_WRITE_ADDR;
  28. - this->IO_ADDR_W = (void __iomem *) nandaddr;
  29. + xway_latchcmd = NAND_WRITE_CMD;
  30. + else if (ctrl & NAND_ALE)
  31. + xway_latchcmd = NAND_WRITE_ADDR;
  32. }
  33. if (cmd != NAND_CMD_NONE) {
  34. spin_lock_irqsave(&ebu_lock, flags);
  35. - writeb(cmd, this->IO_ADDR_W);
  36. + writeb(cmd, (void __iomem *) (nandaddr | xway_latchcmd));
  37. while ((ltq_ebu_r32(EBU_NAND_WAIT) & NAND_WAIT_WR_C) == 0)
  38. ;
  39. spin_unlock_irqrestore(&ebu_lock, flags);