armada-385-linksys-rango.dts 8.6 KB

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  1. /*
  2. * Device Tree file for the Linksys WRT3200ACM (Rango)
  3. *
  4. * Copyright (C) 2016 Imre Kaloz <kaloz@openwrt.org>
  5. *
  6. *
  7. * This file is dual-licensed: you can use it either under the terms
  8. * of the GPL or the X11 license, at your option. Note that this dual
  9. * licensing only applies to this file, and not this project as a
  10. * whole.
  11. *
  12. * a) This file is licensed under the terms of the GNU General Public
  13. * License version 2. This program is licensed "as is" without
  14. * any warranty of any kind, whether express or implied.
  15. *
  16. * Or, alternatively,
  17. *
  18. * b) Permission is hereby granted, free of charge, to any person
  19. * obtaining a copy of this software and associated documentation
  20. * files (the "Software"), to deal in the Software without
  21. * restriction, including without limitation the rights to use,
  22. * copy, modify, merge, publish, distribute, sublicense, and/or
  23. * sell copies of the Software, and to permit persons to whom the
  24. * Software is furnished to do so, subject to the following
  25. * conditions:
  26. *
  27. * The above copyright notice and this permission notice shall be
  28. * included in all copies or substantial portions of the Software.
  29. *
  30. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  31. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  32. * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  33. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  34. * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  35. * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  36. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  37. * OTHER DEALINGS IN THE SOFTWARE.
  38. */
  39. /dts-v1/;
  40. #include <dt-bindings/gpio/gpio.h>
  41. #include <dt-bindings/input/input.h>
  42. #include "armada-385.dtsi"
  43. / {
  44. model = "Linksys WRT3200ACM";
  45. compatible = "linksys,rango", "linksys,armada385", "marvell,armada385",
  46. "marvell,armada380";
  47. chosen {
  48. stdout-path = "serial0:115200n8";
  49. };
  50. memory {
  51. device_type = "memory";
  52. reg = <0x00000000 0x20000000>; /* 512 MB */
  53. };
  54. soc {
  55. ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
  56. MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000
  57. MBUS_ID(0x09, 0x19) 0 0xf1100000 0x10000
  58. MBUS_ID(0x09, 0x15) 0 0xf1110000 0x10000
  59. MBUS_ID(0x0c, 0x04) 0 0xf1200000 0x100000>;
  60. internal-regs {
  61. spi@10600 {
  62. status = "disabled";
  63. };
  64. i2c@11000 {
  65. pinctrl-names = "default";
  66. pinctrl-0 = <&i2c0_pins>;
  67. status = "okay";
  68. tmp421@4c {
  69. compatible = "ti,tmp421";
  70. reg = <0x4c>;
  71. };
  72. pca9635@68 {
  73. #address-cells = <1>;
  74. #size-cells = <0>;
  75. compatible = "nxp,pca9635";
  76. reg = <0x68>;
  77. wan_amber@0 {
  78. label = "rango:amber:wan";
  79. reg = <0x0>;
  80. };
  81. wan_white@1 {
  82. label = "rango:white:wan";
  83. reg = <0x1>;
  84. };
  85. wlan_2g@2 {
  86. label = "rango:white:wlan_2g";
  87. reg = <0x2>;
  88. };
  89. wlan_5g@3 {
  90. label = "rango:white:wlan_5g";
  91. reg = <0x3>;
  92. };
  93. usb2@5 {
  94. label = "rango:white:usb2";
  95. reg = <0x5>;
  96. };
  97. usb3_1@6 {
  98. label = "rango:white:usb3_1";
  99. reg = <0x6>;
  100. };
  101. usb3_2@7 {
  102. label = "rango:white:usb3_2";
  103. reg = <0x7>;
  104. };
  105. wps_white@8 {
  106. label = "rango:white:wps";
  107. reg = <0x8>;
  108. };
  109. wps_amber@9 {
  110. label = "rango:amber:wps";
  111. reg = <0x9>;
  112. };
  113. };
  114. };
  115. /* J10: VCC, NC, RX, NC, TX, GND */
  116. serial@12000 {
  117. status = "okay";
  118. };
  119. ethernet@70000 {
  120. status = "okay";
  121. phy-mode = "rgmii-id";
  122. buffer-manager = <&bm>;
  123. bm,pool-long = <0>;
  124. bm,pool-short = <3>;
  125. fixed-link {
  126. speed = <1000>;
  127. full-duplex;
  128. };
  129. };
  130. ethernet@34000 {
  131. status = "okay";
  132. phy-mode = "sgmii";
  133. buffer-manager = <&bm>;
  134. bm,pool-long = <2>;
  135. bm,pool-short = <3>;
  136. fixed-link {
  137. speed = <1000>;
  138. full-duplex;
  139. };
  140. };
  141. mdio {
  142. status = "okay";
  143. };
  144. bm@c8000 {
  145. status = "okay";
  146. };
  147. sata@a8000 {
  148. status = "okay";
  149. };
  150. sdhci@d8000 {
  151. pinctrl-names = "default";
  152. pinctrl-0 = <&sdhci_pins>;
  153. no-1-8-v;
  154. broken-cd;
  155. wp-inverted;
  156. bus-width = <8>;
  157. status = "okay";
  158. };
  159. /* USB part of the eSATA/USB 2.0 port */
  160. usb@58000 {
  161. status = "okay";
  162. };
  163. usb3@f8000 {
  164. status = "okay";
  165. usb-phy = <&usb3_phy>;
  166. };
  167. flash@d0000 {
  168. status = "okay";
  169. num-cs = <1>;
  170. marvell,nand-keep-config;
  171. marvell,nand-enable-arbiter;
  172. nand-on-flash-bbt;
  173. partition@0 {
  174. label = "u-boot";
  175. reg = <0x0000000 0x200000>; /* 2MB */
  176. read-only;
  177. };
  178. partition@200000 {
  179. label = "u_env";
  180. reg = <0x200000 0x20000>; /* 128KB */
  181. };
  182. partition@220000 {
  183. label = "s_env";
  184. reg = <0x220000 0x40000>; /* 256KB */
  185. };
  186. partition@7e0000 {
  187. label = "devinfo";
  188. reg = <0x7e0000 0x40000>; /* 256KB */
  189. read-only;
  190. };
  191. partition@820000 {
  192. label = "sysdiag";
  193. reg = <0x820000 0x1e0000>; /* 1920KB */
  194. read-only;
  195. };
  196. /* kernel1 overlaps with rootfs1 by design */
  197. partition@a00000 {
  198. label = "kernel1";
  199. reg = <0xa00000 0x5000000>; /* 80MB */
  200. };
  201. partition@1000000 {
  202. label = "rootfs1";
  203. reg = <0x1000000 0x4a00000>; /* 74MB */
  204. };
  205. /* kernel2 overlaps with rootfs2 by design */
  206. partition@5a00000 {
  207. label = "kernel2";
  208. reg = <0x5a00000 0x5000000>; /* 80MB */
  209. };
  210. partition@6000000 {
  211. label = "rootfs2";
  212. reg = <0x6000000 0x4a00000>; /* 74MB */
  213. };
  214. /*
  215. * 86MB, last MB is for the BBT, not writable
  216. */
  217. partition@aa00000 {
  218. label = "syscfg";
  219. reg = <0xaa00000 0x5600000>;
  220. };
  221. /*
  222. * Unused area between "s_env" and "devinfo".
  223. * Moved here because otherwise the renumbered
  224. * partitions would break the bootloader
  225. * supplied bootargs
  226. */
  227. partition@180000 {
  228. label = "unused_area";
  229. reg = <0x260000 0x5c0000>; /* 5.75MB */
  230. };
  231. };
  232. };
  233. bm-bppi {
  234. status = "okay";
  235. };
  236. pcie-controller {
  237. status = "okay";
  238. pcie@1,0 {
  239. /* Marvell 88W8964, 5GHz-only */
  240. status = "okay";
  241. mwlwifi {
  242. marvell,2ghz = <0>;
  243. marvell,chainmask = <4 4>;
  244. };
  245. };
  246. pcie@2,0 {
  247. /* Marvell 88W8964, 2GHz-only */
  248. status = "okay";
  249. mwlwifi {
  250. marvell,5ghz = <0>;
  251. marvell,chainmask = <4 4>;
  252. };
  253. };
  254. };
  255. };
  256. usb3_phy: usb3_phy {
  257. compatible = "usb-nop-xceiv";
  258. vcc-supply = <&reg_xhci0_vbus>;
  259. };
  260. reg_xhci0_vbus: xhci0-vbus {
  261. compatible = "regulator-fixed";
  262. pinctrl-names = "default";
  263. pinctrl-0 = <&xhci0_vbus_pins>;
  264. regulator-name = "xhci0-vbus";
  265. regulator-min-microvolt = <5000000>;
  266. regulator-max-microvolt = <5000000>;
  267. enable-active-high;
  268. gpio = <&gpio1 16 GPIO_ACTIVE_HIGH>;
  269. };
  270. gpio_keys {
  271. compatible = "gpio-keys";
  272. #address-cells = <1>;
  273. #size-cells = <0>;
  274. pinctrl-0 = <&keys_pin>;
  275. pinctrl-names = "default";
  276. button@1 {
  277. label = "WPS";
  278. linux,code = <KEY_WPS_BUTTON>;
  279. gpios = <&gpio0 24 GPIO_ACTIVE_LOW>;
  280. };
  281. button@2 {
  282. label = "Factory Reset Button";
  283. linux,code = <KEY_RESTART>;
  284. gpios = <&gpio0 29 GPIO_ACTIVE_LOW>;
  285. };
  286. };
  287. gpio-leds {
  288. compatible = "gpio-leds";
  289. pinctrl-0 = <&power_led_pin &sata_led_pin>;
  290. pinctrl-names = "default";
  291. power {
  292. gpios = <&gpio1 24 GPIO_ACTIVE_HIGH>;
  293. default-state = "on";
  294. };
  295. sata {
  296. gpios = <&gpio0 21 GPIO_ACTIVE_LOW>;
  297. default-state = "off";
  298. };
  299. };
  300. dsa@0 {
  301. compatible = "marvell,dsa";
  302. #address-cells = <2>;
  303. #size-cells = <0>;
  304. dsa,ethernet = <&eth2>;
  305. dsa,mii-bus = <&mdio>;
  306. switch@0 {
  307. #address-cells = <1>;
  308. #size-cells = <0>;
  309. reg = <0x0 0>; /* MDIO address 0, switch 0 in tree */
  310. port@0 {
  311. reg = <0>;
  312. label = "lan4";
  313. };
  314. port@1 {
  315. reg = <1>;
  316. label = "lan3";
  317. };
  318. port@2 {
  319. reg = <2>;
  320. label = "lan2";
  321. };
  322. port@3 {
  323. reg = <3>;
  324. label = "lan1";
  325. };
  326. port@4 {
  327. reg = <4>;
  328. label = "wan";
  329. };
  330. port@5 {
  331. reg = <5>;
  332. label = "cpu";
  333. };
  334. };
  335. };
  336. gpio-leds {
  337. power {
  338. label = "rango:white:power";
  339. };
  340. sata {
  341. label = "rango:white:sata";
  342. };
  343. };
  344. mvsw61xx {
  345. #address-cells = <1>;
  346. #size-cells = <0>;
  347. compatible = "marvell,88e6352";
  348. status = "okay";
  349. reg = <0x10>;
  350. mii-bus = <&mdio>;
  351. cpu-port-0 = <5>;
  352. cpu-port-1 = <6>;
  353. };
  354. };
  355. &pinctrl {
  356. keys_pin: keys-pin {
  357. marvell,pins = "mpp24", "mpp29";
  358. marvell,function = "gpio";
  359. };
  360. power_led_pin: power-led-pin {
  361. marvell,pins = "mpp56";
  362. marvell,function = "gpio";
  363. };
  364. sata_led_pin: sata-led-pin {
  365. marvell,pins = "mpp21";
  366. marvell,function = "gpio";
  367. };
  368. xhci0_vbus_pins: xhci0-vbus-pins {
  369. marvell,pins = "mpp47";
  370. marvell,function = "gpio";
  371. };
  372. };