0033-ARM-socfpga-Enable-QSPI-flash-on-SoCKit.patch 1.1 KB

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  1. From 8c1cd66d13406533f9948dbcd25d4b53d389c109 Mon Sep 17 00:00:00 2001
  2. From: Marek Vasut <marex@denx.de>
  3. Date: Sun, 21 Jun 2015 23:00:06 +0200
  4. Subject: [PATCH 33/33] ARM: socfpga: Enable QSPI flash on SoCKit
  5. Add the QSPI NOR node on SoCkit.
  6. Signed-off-by: Marek Vasut <marex@denx.de>
  7. ---
  8. arch/arm/boot/dts/socfpga_cyclone5_sockit.dts | 21 +++++++++++++++++++++
  9. 1 file changed, 21 insertions(+)
  10. diff --git a/arch/arm/boot/dts/socfpga_cyclone5_sockit.dts b/arch/arm/boot/dts/socfpga_cyclone5_sockit.dts
  11. index 02e22f5..d706348 100644
  12. --- a/arch/arm/boot/dts/socfpga_cyclone5_sockit.dts
  13. +++ b/arch/arm/boot/dts/socfpga_cyclone5_sockit.dts
  14. @@ -175,6 +175,27 @@
  15. status = "okay";
  16. };
  17. +&qspi {
  18. + status = "okay";
  19. +
  20. + flash0: n25q00@0 {
  21. + #address-cells = <1>;
  22. + #size-cells = <1>;
  23. + compatible = "n25q00";
  24. + reg = <0>; /* chip select */
  25. + spi-max-frequency = <100000000>;
  26. + m25p,fast-read;
  27. +
  28. + cdns,page-size = <256>;
  29. + cdns,block-size = <16>;
  30. + cdns,read-delay = <4>;
  31. + cdns,tshsl-ns = <50>;
  32. + cdns,tsd2d-ns = <50>;
  33. + cdns,tchsh-ns = <4>;
  34. + cdns,tslch-ns = <4>;
  35. + };
  36. +};
  37. +
  38. &usb1 {
  39. status = "okay";
  40. };
  41. --
  42. 2.8.1