164-2-dt-add-codec-clock-into-dtsi.patch 2.0 KB

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  1. From b404f3daca1807a74e07180397c6e85046b7a5cd Mon Sep 17 00:00:00 2001
  2. From: =?UTF-8?q?Emilio=20L=C3=B3pez?= <emilio@elopez.com.ar>
  3. Date: Fri, 18 Jul 2014 15:58:58 -0300
  4. Subject: [PATCH] ARM: sunxi: Add codec clock support
  5. MIME-Version: 1.0
  6. Content-Type: text/plain; charset=UTF-8
  7. Content-Transfer-Encoding: 8bit
  8. This commit adds the codec clock definition to the sun4i, sun5i and
  9. sun7i device trees. The codec clock is used in the analog codec block.
  10. Signed-off-by: Emilio López <emilio@elopez.com.ar>
  11. Signed-off-by: Hans de Goede <hdegoede@redhat.com>
  12. ---
  13. arch/arm/boot/dts/sun4i-a10.dtsi | 8 ++++++++
  14. arch/arm/boot/dts/sun5i.dtsi | 8 ++++++++
  15. arch/arm/boot/dts/sun7i-a20.dtsi | 8 ++++++++
  16. 3 files changed, 24 insertions(+)
  17. --- a/arch/arm/boot/dts/sun4i-a10.dtsi
  18. +++ b/arch/arm/boot/dts/sun4i-a10.dtsi
  19. @@ -420,6 +420,14 @@
  20. clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
  21. clock-output-names = "spi3";
  22. };
  23. +
  24. + codec_clk: clk@01c20140 {
  25. + #clock-cells = <0>;
  26. + compatible = "allwinner,sun4i-a10-codec-clk";
  27. + reg = <0x01c20140 0x4>;
  28. + clocks = <&pll2 0>;
  29. + clock-output-names = "codec";
  30. + };
  31. };
  32. soc@01c00000 {
  33. --- a/arch/arm/boot/dts/sun5i-a13.dtsi
  34. +++ b/arch/arm/boot/dts/sun5i-a13.dtsi
  35. @@ -350,6 +350,14 @@
  36. clock-output-names = "usb_ohci0", "usb_phy";
  37. };
  38. + codec_clk: clk@01c20140 {
  39. + #clock-cells = <0>;
  40. + compatible = "allwinner,sun4i-a10-codec-clk";
  41. + reg = <0x01c20140 0x4>;
  42. + clocks = <&pll2 0>;
  43. + clock-output-names = "codec";
  44. + };
  45. +
  46. mbus_clk: clk@01c2015c {
  47. #clock-cells = <0>;
  48. compatible = "allwinner,sun5i-a13-mbus-clk";
  49. --- a/arch/arm/boot/dts/sun7i-a20.dtsi
  50. +++ b/arch/arm/boot/dts/sun7i-a20.dtsi
  51. @@ -464,6 +464,14 @@
  52. clock-output-names = "spi3";
  53. };
  54. + codec_clk: clk@01c20140 {
  55. + #clock-cells = <0>;
  56. + compatible = "allwinner,sun4i-a10-codec-clk";
  57. + reg = <0x01c20140 0x4>;
  58. + clocks = <&pll2 0>;
  59. + clock-output-names = "codec";
  60. + };
  61. +
  62. mbus_clk: clk@01c2015c {
  63. #clock-cells = <0>;
  64. compatible = "allwinner,sun5i-a13-mbus-clk";