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610-rt2x00-fix-rt3352-ext-pa.patch

610-rt2x00-fix-rt3352-ext-pa.patch 7.2 KB
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  1. --- a/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
    2. 

  2. +++ b/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
    3. 

  3. @@ -3529,11 +3529,18 @@ static void rt2800_config_channel(struct
    4. 

  4.  	/*
    5. 

  5.  	 * Change BBP settings
    6. 

  6.  	 */
    7. 

  7. +
    8. 

  8.  	if (rt2x00_rt(rt2x00dev, RT3352)) {
    9. 

  9. +		rt2800_bbp_write(rt2x00dev, 62, 0x37 - rt2x00dev->lna_gain);
    10. 

  10. +		rt2800_bbp_write(rt2x00dev, 63, 0x37 - rt2x00dev->lna_gain);
    11. 

  11. +		rt2800_bbp_write(rt2x00dev, 64, 0x37 - rt2x00dev->lna_gain);
    12. 

  12. +
    13. 

  13.  		rt2800_bbp_write(rt2x00dev, 27, 0x0);
    14. 

  14.  		rt2800_bbp_write(rt2x00dev, 66, 0x26 + rt2x00dev->lna_gain);
    15. 

  15.  		rt2800_bbp_write(rt2x00dev, 27, 0x20);
    16. 

  16.  		rt2800_bbp_write(rt2x00dev, 66, 0x26 + rt2x00dev->lna_gain);
    17. 

  17. +		rt2800_bbp_write(rt2x00dev, 86, 0x38);
    18. 

  18. +		rt2800_bbp_write(rt2x00dev, 83, 0x6a);
    19. 

  19.  	} else if (rt2x00_rt(rt2x00dev, RT3593)) {
    20. 

  20.  		if (rf->channel > 14) {
    21. 

  21.  			/* Disable CCK Packet detection on 5GHz */
    22. 

  22. @@ -6595,6 +6602,12 @@ static void rt2800_init_rfcsr_3290(struc
    23. 

  23.  
    24. 

  24.  static void rt2800_init_rfcsr_3352(struct rt2x00_dev *rt2x00dev)
    25. 

  25.  {
    26. 

  26. +	int tx0_int_pa = test_bit(CAPABILITY_INTERNAL_PA_TX0,
    27. 

  27. +				  &rt2x00dev->cap_flags);
    28. 

  28. +	int tx1_int_pa = test_bit(CAPABILITY_INTERNAL_PA_TX1,
    29. 

  29. +				  &rt2x00dev->cap_flags);
    30. 

  30. +	u8 rfcsr;
    31. 

  31. +
    32. 

  32.  	rt2800_rf_init_calibration(rt2x00dev, 30);
    33. 

  33.  
    34. 

  34.  	rt2800_rfcsr_write(rt2x00dev, 0, 0xf0);
    35. 

  35. @@ -6630,15 +6643,30 @@ static void rt2800_init_rfcsr_3352(struc
    36. 

  36.  	rt2800_rfcsr_write(rt2x00dev, 31, 0x80);
    37. 

  37.  	rt2800_rfcsr_write(rt2x00dev, 32, 0x80);
    38. 

  38.  	rt2800_rfcsr_write(rt2x00dev, 33, 0x00);
    39. 

  39. -	rt2800_rfcsr_write(rt2x00dev, 34, 0x01);
    40. 

  40. +	rfcsr = 0x01;
    41. 

  41. +	if (!tx0_int_pa)
    42. 

  42. +		rt2x00_set_field8(&rfcsr, RFCSR34_TX0_EXT_PA, 1);
    43. 

  43. +	if (!tx1_int_pa)
    44. 

  44. +		rt2x00_set_field8(&rfcsr, RFCSR34_TX1_EXT_PA, 1);
    45. 

  45. +	rt2800_rfcsr_write(rt2x00dev, 34, rfcsr);
    46. 

  46.  	rt2800_rfcsr_write(rt2x00dev, 35, 0x03);
    47. 

  47.  	rt2800_rfcsr_write(rt2x00dev, 36, 0xbd);
    48. 

  48.  	rt2800_rfcsr_write(rt2x00dev, 37, 0x3c);
    49. 

  49.  	rt2800_rfcsr_write(rt2x00dev, 38, 0x5f);
    50. 

  50.  	rt2800_rfcsr_write(rt2x00dev, 39, 0xc5);
    51. 

  51.  	rt2800_rfcsr_write(rt2x00dev, 40, 0x33);
    52. 

  52. -	rt2800_rfcsr_write(rt2x00dev, 41, 0x5b);
    53. 

  53. -	rt2800_rfcsr_write(rt2x00dev, 42, 0x5b);
    54. 

  54. +	rfcsr = 0x52;
    55. 

  55. +	if (tx0_int_pa) {
    56. 

  56. +		rt2x00_set_field8(&rfcsr, RFCSR41_BIT1, 1);
    57. 

  57. +		rt2x00_set_field8(&rfcsr, RFCSR41_BIT4, 1);
    58. 

  58. +	}
    59. 

  59. +	rt2800_rfcsr_write(rt2x00dev, 41, rfcsr);
    60. 

  60. +	rfcsr = 0x52;
    61. 

  61. +	if (tx1_int_pa) {
    62. 

  62. +		rt2x00_set_field8(&rfcsr, RFCSR42_BIT1, 1);
    63. 

  63. +		rt2x00_set_field8(&rfcsr, RFCSR42_BIT4, 1);
    64. 

  64. +	}
    65. 

  65. +	rt2800_rfcsr_write(rt2x00dev, 42, rfcsr);
    66. 

  66.  	rt2800_rfcsr_write(rt2x00dev, 43, 0xdb);
    67. 

  67.  	rt2800_rfcsr_write(rt2x00dev, 44, 0xdb);
    68. 

  68.  	rt2800_rfcsr_write(rt2x00dev, 45, 0xdb);
    69. 

  69. @@ -6646,15 +6674,20 @@ static void rt2800_init_rfcsr_3352(struc
    70. 

  70.  	rt2800_rfcsr_write(rt2x00dev, 47, 0x0d);
    71. 

  71.  	rt2800_rfcsr_write(rt2x00dev, 48, 0x14);
    72. 

  72.  	rt2800_rfcsr_write(rt2x00dev, 49, 0x00);
    73. 

  73. -	rt2800_rfcsr_write(rt2x00dev, 50, 0x2d);
    74. 

  74. -	rt2800_rfcsr_write(rt2x00dev, 51, 0x7f);
    75. 

  75. -	rt2800_rfcsr_write(rt2x00dev, 52, 0x00);
    76. 

  76. -	rt2800_rfcsr_write(rt2x00dev, 53, 0x52);
    77. 

  77. -	rt2800_rfcsr_write(rt2x00dev, 54, 0x1b);
    78. 

  78. -	rt2800_rfcsr_write(rt2x00dev, 55, 0x7f);
    79. 

  79. -	rt2800_rfcsr_write(rt2x00dev, 56, 0x00);
    80. 

  80. -	rt2800_rfcsr_write(rt2x00dev, 57, 0x52);
    81. 

  81. -	rt2800_rfcsr_write(rt2x00dev, 58, 0x1b);
    82. 

  82. +	rfcsr = 0x2d;
    83. 

  83. +	if (!tx0_int_pa)
    84. 

  84. +		rt2x00_set_field8(&rfcsr, RFCSR50_TX0_EXT_PA, 1);
    85. 

  85. +	if (!tx1_int_pa)
    86. 

  86. +		rt2x00_set_field8(&rfcsr, RFCSR50_TX1_EXT_PA, 1);
    87. 

  87. +	rt2800_rfcsr_write(rt2x00dev, 50, rfcsr);
    88. 

  88. +	rt2800_rfcsr_write(rt2x00dev, 51, (tx0_int_pa ? 0x7f : 0x52));
    89. 

  89. +	rt2800_rfcsr_write(rt2x00dev, 52, (tx0_int_pa ? 0x00 : 0xc0));
    90. 

  90. +	rt2800_rfcsr_write(rt2x00dev, 53, (tx0_int_pa ? 0x52 : 0xd2));
    91. 

  91. +	rt2800_rfcsr_write(rt2x00dev, 54, (tx0_int_pa ? 0x1b : 0xc0));
    92. 

  92. +	rt2800_rfcsr_write(rt2x00dev, 55, (tx1_int_pa ? 0x7f : 0x52));
    93. 

  93. +	rt2800_rfcsr_write(rt2x00dev, 56, (tx1_int_pa ? 0x00 : 0xc0));
    94. 

  94. +	rt2800_rfcsr_write(rt2x00dev, 57, (tx0_int_pa ? 0x52 : 0x49));
    95. 

  95. +	rt2800_rfcsr_write(rt2x00dev, 58, (tx1_int_pa ? 0x1b : 0xc0));
    96. 

  96.  	rt2800_rfcsr_write(rt2x00dev, 59, 0x00);
    97. 

  97.  	rt2800_rfcsr_write(rt2x00dev, 60, 0x00);
    98. 

  98.  	rt2800_rfcsr_write(rt2x00dev, 61, 0x00);
    99. 

  99. @@ -7675,6 +7708,7 @@ static int rt2800_init_eeprom(struct rt2
    100. 

  100.  	 * RT53xx: defined in "EEPROM_CHIP_ID" field
    101. 

  101.  	 */
    102. 

  102.  	if (rt2x00_rt(rt2x00dev, RT3290) ||
    103. 

  103. +	    rt2x00_rt(rt2x00dev, RT3352) ||
    104. 

  104.  	    rt2x00_rt(rt2x00dev, RT5390) ||
    105. 

  105.  	    rt2x00_rt(rt2x00dev, RT5392))
    106. 

  106.  		rt2800_eeprom_read(rt2x00dev, EEPROM_CHIP_ID, &rf);
    107. 

  107. @@ -7770,7 +7804,8 @@ static int rt2800_init_eeprom(struct rt2
    108. 

  108.  	/*
    109. 

  109.  	 * Detect if this device has Bluetooth co-existence.
    110. 

  110.  	 */
    111. 

  111. -	if (rt2x00_get_field16(eeprom, EEPROM_NIC_CONF1_BT_COEXIST))
    112. 

  112. +	if (!rt2x00_rt(rt2x00dev, RT3352) &&
    113. 

  113. +	    rt2x00_get_field16(eeprom, EEPROM_NIC_CONF1_BT_COEXIST))
    114. 

  114.  		__set_bit(CAPABILITY_BT_COEXIST, &rt2x00dev->cap_flags);
    115. 

  115.  
    116. 

  116.  	/*
    117. 

  117. @@ -7799,6 +7834,22 @@ static int rt2800_init_eeprom(struct rt2
    118. 

  118.  					EIRP_MAX_TX_POWER_LIMIT)
    119. 

  119.  		__set_bit(CAPABILITY_POWER_LIMIT, &rt2x00dev->cap_flags);
    120. 

  120.  
    121. 

  121. +	/*
    122. 

  122. +	 * Detect if device uses internal or external PA
    123. 

  123. +	 */
    124. 

  124. +	rt2800_eeprom_read(rt2x00dev, EEPROM_NIC_CONF1, &eeprom);
    125. 

  125. +
    126. 

  126. +	if (rt2x00_rt(rt2x00dev, RT3352)) {
    127. 

  127. +		if (!rt2x00_get_field16(eeprom,
    128. 

  128. +		    EEPROM_NIC_CONF1_EXTERNAL_TX0_PA_3352))
    129. 

  129. +			__set_bit(CAPABILITY_INTERNAL_PA_TX0,
    130. 

  130. +				  &rt2x00dev->cap_flags);
    131. 

  131. +		if (!rt2x00_get_field16(eeprom,
    132. 

  132. +		    EEPROM_NIC_CONF1_EXTERNAL_TX1_PA_3352))
    133. 

  133. +			__set_bit(CAPABILITY_INTERNAL_PA_TX1,
    134. 

  134. +				  &rt2x00dev->cap_flags);
    135. 

  135. +	}
    136. 

  136. +
    137. 

  137.  	return 0;
    138. 

  138.  }
    139. 

  139.  
    140. 

  140. --- a/drivers/net/wireless/ralink/rt2x00/rt2800.h
    141. 

  141. +++ b/drivers/net/wireless/ralink/rt2x00/rt2800.h
    142. 

  142. @@ -2335,6 +2335,12 @@ struct mac_iveiv_entry {
    143. 

  143.  #define RFCSR36_RF_BS			FIELD8(0x80)
    144. 

  144.  
    145. 

  145.  /*
    146. 

  146. + * RFCSR 34:
    147. 

  147. + */
    148. 

  148. +#define RFCSR34_TX0_EXT_PA		FIELD8(0x04)
    149. 

  149. +#define RFCSR34_TX1_EXT_PA		FIELD8(0x08)
    150. 

  150. +
    151. 

  151. +/*
    152. 

  152.   * RFCSR 38:
    153. 

  153.   */
    154. 

  154.  #define RFCSR38_RX_LO1_EN		FIELD8(0x20)
    155. 

  155. @@ -2346,6 +2352,18 @@ struct mac_iveiv_entry {
    156. 

  156.  #define RFCSR39_RX_LO2_EN		FIELD8(0x80)
    157. 

  157.  
    158. 

  158.  /*
    159. 

  159. + * RFCSR 41:
    160. 

  160. + */
    161. 

  161. +#define RFCSR41_BIT1			FIELD8(0x01)
    162. 

  162. +#define RFCSR41_BIT4			FIELD8(0x08)
    163. 

  163. +
    164. 

  164. +/*
    165. 

  165. + * RFCSR 42:
    166. 

  166. + */
    167. 

  167. +#define RFCSR42_BIT1			FIELD8(0x01)
    168. 

  168. +#define RFCSR42_BIT4			FIELD8(0x08)
    169. 

  169. +
    170. 

  170. +/*
    171. 

  171.   * RFCSR 49:
    172. 

  172.   */
    173. 

  173.  #define RFCSR49_TX			FIELD8(0x3f)
    174. 

  174. @@ -2358,6 +2376,8 @@ struct mac_iveiv_entry {
    175. 

  175.   * RFCSR 50:
    176. 

  176.   */
    177. 

  177.  #define RFCSR50_TX			FIELD8(0x3f)
    178. 

  178. +#define RFCSR50_TX0_EXT_PA		FIELD8(0x02)
    179. 

  179. +#define RFCSR50_TX1_EXT_PA		FIELD8(0x10)
    180. 

  180.  #define RFCSR50_EP			FIELD8(0xc0)
    181. 

  181.  /* bits for RT3593 */
    182. 

  182.  #define RFCSR50_TX_LO1_EN		FIELD8(0x20)
    183. 

  183. @@ -2505,6 +2525,8 @@ enum rt2800_eeprom_word {
    184. 

  184.   * INTERNAL_TX_ALC: 0: disable, 1: enable
    185. 

  185.   * BT_COEXIST: 0: disable, 1: enable
    186. 

  186.   * DAC_TEST: 0: disable, 1: enable
    187. 

  187. + * EXTERNAL_TX0_PA: 0: disable, 1: enable (only on RT3352)
    188. 

  188. + * EXTERNAL_TX1_PA: 0: disable, 1: enable (only on RT3352)
    189. 

  189.   */
    190. 

  190.  #define EEPROM_NIC_CONF1_HW_RADIO		FIELD16(0x0001)
    191. 

  191.  #define EEPROM_NIC_CONF1_EXTERNAL_TX_ALC	FIELD16(0x0002)
    192. 

  192. @@ -2521,6 +2543,8 @@ enum rt2800_eeprom_word {
    193. 

  193.  #define EEPROM_NIC_CONF1_INTERNAL_TX_ALC	FIELD16(0x2000)
    194. 

  194.  #define EEPROM_NIC_CONF1_BT_COEXIST		FIELD16(0x4000)
    195. 

  195.  #define EEPROM_NIC_CONF1_DAC_TEST		FIELD16(0x8000)
    196. 

  196. +#define EEPROM_NIC_CONF1_EXTERNAL_TX0_PA_3352	FIELD16(0x4000)
    197. 

  197. +#define EEPROM_NIC_CONF1_EXTERNAL_TX1_PA_3352	FIELD16(0x8000)
    198. 

  198.  
    199. 

  199.  /*
    200. 

  200.   * EEPROM frequency
    201. 

  201. --- a/drivers/net/wireless/ralink/rt2x00/rt2x00.h
    202. 

  202. +++ b/drivers/net/wireless/ralink/rt2x00/rt2x00.h
    203. 

  203. @@ -719,6 +719,8 @@ enum rt2x00_capability_flags {
    204. 

  204.  	CAPABILITY_DOUBLE_ANTENNA,
    205. 

  205.  	CAPABILITY_BT_COEXIST,
    206. 

  206.  	CAPABILITY_VCO_RECALIBRATION,
    207. 

  207. +	CAPABILITY_INTERNAL_PA_TX0,
    208. 

  208. +	CAPABILITY_INTERNAL_PA_TX1,
    209. 

  209.  };
    210. 

  210.  
    211. 

  211.  /*
    212.