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616-rt2x00-support-rt5350.patch

616-rt2x00-support-rt5350.patch 9.1 KB
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  1. --- a/drivers/net/wireless/ralink/rt2x00/rt2800.h
    2. 

  2. +++ b/drivers/net/wireless/ralink/rt2x00/rt2800.h
    3. 

  3. @@ -74,6 +74,7 @@
    4. 

  4.  #define RF3070				0x3070
    5. 

  5.  #define RF3290				0x3290
    6. 

  6.  #define RF3853				0x3853
    7. 

  7. +#define RF5350				0x5350
    8. 

  8.  #define RF5360				0x5360
    9. 

  9.  #define RF5362				0x5362
    10. 

  10.  #define RF5370				0x5370
    11. 

  11. --- a/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
    12. 

  12. +++ b/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
    13. 

  13. @@ -3015,6 +3015,13 @@ static void rt2800_config_channel_rf53xx
    14. 

  14.  
    15. 

  15.  				rt2800_rfcsr_write(rt2x00dev, 59,
    16. 

  16.  						   r59_non_bt[idx]);
    17. 

  17. +			} else if (rt2x00_rt(rt2x00dev, RT5350)) {
    18. 

  18. +				static const char r59_non_bt[] = {0x0b, 0x0b,
    19. 

  19. +					0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0a,
    20. 

  20. +					0x0a, 0x09, 0x08, 0x07, 0x07, 0x06};
    21. 

  21. +
    22. 

  22. +				rt2800_rfcsr_write(rt2x00dev, 59,
    23. 

  23. +						   r59_non_bt[idx]);
    24. 

  24.  			}
    25. 

  25.  		}
    26. 

  26.  	}
    27. 

  27. @@ -3493,6 +3500,7 @@ static void rt2800_config_channel(struct
    28. 

  28.  		rt2800_config_channel_rf3853(rt2x00dev, conf, rf, info);
    29. 

  29.  		break;
    30. 

  30.  	case RF3070:
    31. 

  31. +	case RF5350:
    32. 

  32.  	case RF5360:
    33. 

  33.  	case RF5362:
    34. 

  34.  	case RF5370:
    35. 

  35. @@ -3511,6 +3519,7 @@ static void rt2800_config_channel(struct
    36. 

  36.  	if (rt2x00_rf(rt2x00dev, RF3070) ||
    37. 

  37.  	    rt2x00_rf(rt2x00dev, RF3290) ||
    38. 

  38.  	    rt2x00_rf(rt2x00dev, RF3322) ||
    39. 

  39. +	    rt2x00_rf(rt2x00dev, RF5350) ||
    40. 

  40.  	    rt2x00_rf(rt2x00dev, RF5360) ||
    41. 

  41.  	    rt2x00_rf(rt2x00dev, RF5362) ||
    42. 

  42.  	    rt2x00_rf(rt2x00dev, RF5370) ||
    43. 

  43. @@ -3789,7 +3798,8 @@ static void rt2800_config_channel(struct
    44. 

  44.  	/*
    45. 

  45.  	 * Clear update flag
    46. 

  46.  	 */
    47. 

  47. -	if (rt2x00_rt(rt2x00dev, RT3352)) {
    48. 

  48. +	if (rt2x00_rt(rt2x00dev, RT3352) ||
    49. 

  49. +	    rt2x00_rt(rt2x00dev, RT5350)) {
    50. 

  50.  		rt2800_bbp_read(rt2x00dev, 49, &bbp);
    51. 

  51.  		rt2x00_set_field8(&bbp, BBP49_UPDATE_FLAG, 0);
    52. 

  52.  		rt2800_bbp_write(rt2x00dev, 49, bbp);
    53. 

  53. @@ -4675,6 +4685,7 @@ void rt2800_vco_calibration(struct rt2x0
    54. 

  54.  	case RF3070:
    55. 

  55.  	case RF3290:
    56. 

  56.  	case RF3853:
    57. 

  57. +	case RF5350:
    58. 

  58.  	case RF5360:
    59. 

  59.  	case RF5362:
    60. 

  60.  	case RF5370:
    61. 

  61. @@ -5088,6 +5099,8 @@ static int rt2800_init_registers(struct
    62. 

  62.  		rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000404);
    63. 

  63.  		rt2800_register_write(rt2x00dev, TX_SW_CFG1, 0x00080606);
    64. 

  64.  		rt2800_register_write(rt2x00dev, TX_SW_CFG2, 0x00000000);
    65. 

  65. +	} else if (rt2x00_rt(rt2x00dev, RT5350)) {
    66. 

  66. +		rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000404);
    67. 

  67.  	} else {
    68. 

  68.  		rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000000);
    69. 

  69.  		rt2800_register_write(rt2x00dev, TX_SW_CFG1, 0x00080606);
    70. 

  70. @@ -5743,9 +5756,13 @@ static void rt2800_init_bbp_3352(struct
    71. 

  71.  
    72. 

  72.  	rt2800_bbp_write(rt2x00dev, 82, 0x62);
    73. 

  73.  
    74. 

  74. -	rt2800_bbp_write(rt2x00dev, 83, 0x6a);
    75. 

  75. -
    76. 

  76. -	rt2800_bbp_write(rt2x00dev, 84, 0x99);
    77. 

  77. +	if (rt2x00_rt(rt2x00dev, RT5350)) {
    78. 

  78. +		rt2800_bbp_write(rt2x00dev, 83, 0x7a);
    79. 

  79. +		rt2800_bbp_write(rt2x00dev, 84, 0x9a);
    80. 

  80. +	} else {
    81. 

  81. +		rt2800_bbp_write(rt2x00dev, 83, 0x6a);
    82. 

  82. +		rt2800_bbp_write(rt2x00dev, 84, 0x99);
    83. 

  83. +	}
    84. 

  84.  
    85. 

  85.  	rt2800_bbp_write(rt2x00dev, 86, 0x38);
    86. 

  86.  
    87. 

  87. @@ -5759,9 +5776,13 @@ static void rt2800_init_bbp_3352(struct
    88. 

  88.  
    89. 

  89.  	rt2800_bbp_write(rt2x00dev, 104, 0x92);
    90. 

  90.  
    91. 

  91. -	rt2800_bbp_write(rt2x00dev, 105, 0x34);
    92. 

  92. -
    93. 

  93. -	rt2800_bbp_write(rt2x00dev, 106, 0x05);
    94. 

  94. +	if (rt2x00_rt(rt2x00dev, RT5350)) {
    95. 

  95. +		rt2800_bbp_write(rt2x00dev, 105, 0x3c);
    96. 

  96. +		rt2800_bbp_write(rt2x00dev, 106, 0x03);
    97. 

  97. +	} else {
    98. 

  98. +		rt2800_bbp_write(rt2x00dev, 105, 0x34);
    99. 

  99. +		rt2800_bbp_write(rt2x00dev, 106, 0x05);
    100. 

  100. +	}
    101. 

  101.  
    102. 

  102.  	rt2800_bbp_write(rt2x00dev, 120, 0x50);
    103. 

  103.  
    104. 

  104. @@ -5786,6 +5807,13 @@ static void rt2800_init_bbp_3352(struct
    105. 

  105.  	rt2800_bbp_write(rt2x00dev, 143, 0xa2);
    106. 

  106.  
    107. 

  107.  	rt2800_bbp_write(rt2x00dev, 148, 0xc8);
    108. 

  108. +
    109. 

  109. +	if (rt2x00_rt(rt2x00dev, RT5350)) {
    110. 

  110. +		rt2800_bbp_write(rt2x00dev, 150, 0x40); /* Antenna Software OFDM */
    111. 

  111. +		rt2800_bbp_write(rt2x00dev, 151, 0x30); /* Antenna Software CCK */
    112. 

  112. +		rt2800_bbp_write(rt2x00dev, 152, 0xa3);
    113. 

  113. +		rt2800_bbp_write(rt2x00dev, 154, 0); /* Clear previously selected antenna */
    114. 

  114. +	}
    115. 

  115.  }
    116. 

  116.  
    117. 

  117.  static void rt2800_init_bbp_3390(struct rt2x00_dev *rt2x00dev)
    118. 

  118. @@ -6127,6 +6155,7 @@ static void rt2800_init_bbp(struct rt2x0
    119. 

  119.  		rt2800_init_bbp_3290(rt2x00dev);
    120. 

  120.  		break;
    121. 

  121.  	case RT3352:
    122. 

  122. +	case RT5350:
    123. 

  123.  		rt2800_init_bbp_3352(rt2x00dev);
    124. 

  124.  		break;
    125. 

  125.  	case RT3390:
    126. 

  126. @@ -7078,6 +7107,76 @@ static void rt2800_init_rfcsr_3883(struc
    127. 

  127.  	rt2800_rfcsr_write(rt2x00dev, 20, rfcsr);
    128. 

  128.  }
    129. 

  129.  
    130. 

  130. +static void rt2800_init_rfcsr_5350(struct rt2x00_dev *rt2x00dev)
    131. 

  131. +{
    132. 

  132. +	rt2800_rfcsr_write(rt2x00dev, 0, 0xf0);
    133. 

  133. +	rt2800_rfcsr_write(rt2x00dev, 1, 0x23);
    134. 

  134. +	rt2800_rfcsr_write(rt2x00dev, 2, 0x50);
    135. 

  135. +	rt2800_rfcsr_write(rt2x00dev, 3, 0x08);
    136. 

  136. +	rt2800_rfcsr_write(rt2x00dev, 4, 0x49);
    137. 

  137. +	rt2800_rfcsr_write(rt2x00dev, 5, 0x10);
    138. 

  138. +	rt2800_rfcsr_write(rt2x00dev, 6, 0xe0);
    139. 

  139. +	rt2800_rfcsr_write(rt2x00dev, 7, 0x00);
    140. 

  140. +	rt2800_rfcsr_write(rt2x00dev, 8, 0xf1);
    141. 

  141. +	rt2800_rfcsr_write(rt2x00dev, 9, 0x02);
    142. 

  142. +	rt2800_rfcsr_write(rt2x00dev, 10, 0x53);
    143. 

  143. +	rt2800_rfcsr_write(rt2x00dev, 11, 0x4a);
    144. 

  144. +	rt2800_rfcsr_write(rt2x00dev, 12, 0x46);
    145. 

  145. +	if(rt2x00dev->spec.clk_is_20mhz)
    146. 

  146. +		rt2800_rfcsr_write(rt2x00dev, 13, 0x1f);
    147. 

  147. +	else
    148. 

  148. +		rt2800_rfcsr_write(rt2x00dev, 13, 0x9f);
    149. 

  149. +	rt2800_rfcsr_write(rt2x00dev, 14, 0x00);
    150. 

  150. +	rt2800_rfcsr_write(rt2x00dev, 15, 0x00);
    151. 

  151. +	rt2800_rfcsr_write(rt2x00dev, 16, 0xc0);
    152. 

  152. +	rt2800_rfcsr_write(rt2x00dev, 18, 0x03);
    153. 

  153. +	rt2800_rfcsr_write(rt2x00dev, 19, 0x00);
    154. 

  154. +	rt2800_rfcsr_write(rt2x00dev, 20, 0x00);
    155. 

  155. +	rt2800_rfcsr_write(rt2x00dev, 21, 0x00);
    156. 

  156. +	rt2800_rfcsr_write(rt2x00dev, 22, 0x20);
    157. 

  157. +	rt2800_rfcsr_write(rt2x00dev, 23, 0x00);
    158. 

  158. +	rt2800_rfcsr_write(rt2x00dev, 24, 0x00);
    159. 

  159. +	rt2800_rfcsr_write(rt2x00dev, 25, 0x80);
    160. 

  160. +	rt2800_rfcsr_write(rt2x00dev, 26, 0x00);
    161. 

  161. +	rt2800_rfcsr_write(rt2x00dev, 27, 0x03);
    162. 

  162. +	rt2800_rfcsr_write(rt2x00dev, 28, 0x00);
    163. 

  163. +	rt2800_rfcsr_write(rt2x00dev, 29, 0xd0);
    164. 

  164. +	rt2800_rfcsr_write(rt2x00dev, 30, 0x10);
    165. 

  165. +	rt2800_rfcsr_write(rt2x00dev, 31, 0x80);
    166. 

  166. +	rt2800_rfcsr_write(rt2x00dev, 32, 0x80);
    167. 

  167. +	rt2800_rfcsr_write(rt2x00dev, 33, 0x00);
    168. 

  168. +	rt2800_rfcsr_write(rt2x00dev, 34, 0x07);
    169. 

  169. +	rt2800_rfcsr_write(rt2x00dev, 35, 0x12);
    170. 

  170. +	rt2800_rfcsr_write(rt2x00dev, 36, 0x00);
    171. 

  171. +	rt2800_rfcsr_write(rt2x00dev, 37, 0x08);
    172. 

  172. +	rt2800_rfcsr_write(rt2x00dev, 38, 0x85);
    173. 

  173. +	rt2800_rfcsr_write(rt2x00dev, 39, 0x1b);
    174. 

  174. +	rt2800_rfcsr_write(rt2x00dev, 40, 0x0b);
    175. 

  175. +	rt2800_rfcsr_write(rt2x00dev, 41, 0xbb);
    176. 

  176. +	rt2800_rfcsr_write(rt2x00dev, 42, 0xd5);
    177. 

  177. +	rt2800_rfcsr_write(rt2x00dev, 43, 0x9b);
    178. 

  178. +	rt2800_rfcsr_write(rt2x00dev, 44, 0x0c);
    179. 

  179. +	rt2800_rfcsr_write(rt2x00dev, 45, 0xa6);
    180. 

  180. +	rt2800_rfcsr_write(rt2x00dev, 46, 0x73);
    181. 

  181. +	rt2800_rfcsr_write(rt2x00dev, 47, 0x00);
    182. 

  182. +	rt2800_rfcsr_write(rt2x00dev, 48, 0x10);
    183. 

  183. +	rt2800_rfcsr_write(rt2x00dev, 49, 0x80);
    184. 

  184. +	rt2800_rfcsr_write(rt2x00dev, 50, 0x00);
    185. 

  185. +	rt2800_rfcsr_write(rt2x00dev, 51, 0x00);
    186. 

  186. +	rt2800_rfcsr_write(rt2x00dev, 52, 0x38);
    187. 

  187. +	rt2800_rfcsr_write(rt2x00dev, 53, 0x00);
    188. 

  188. +	rt2800_rfcsr_write(rt2x00dev, 54, 0x38);
    189. 

  189. +	rt2800_rfcsr_write(rt2x00dev, 55, 0x43);
    190. 

  190. +	rt2800_rfcsr_write(rt2x00dev, 56, 0x82);
    191. 

  191. +	rt2800_rfcsr_write(rt2x00dev, 57, 0x00);
    192. 

  192. +	rt2800_rfcsr_write(rt2x00dev, 58, 0x39);
    193. 

  193. +	rt2800_rfcsr_write(rt2x00dev, 59, 0x0b);
    194. 

  194. +	rt2800_rfcsr_write(rt2x00dev, 60, 0x45);
    195. 

  195. +	rt2800_rfcsr_write(rt2x00dev, 61, 0xd1);
    196. 

  196. +	rt2800_rfcsr_write(rt2x00dev, 62, 0x00);
    197. 

  197. +	rt2800_rfcsr_write(rt2x00dev, 63, 0x00);
    198. 

  198. +}
    199. 

  199. +
    200. 

  200.  static void rt2800_init_rfcsr_5390(struct rt2x00_dev *rt2x00dev)
    201. 

  201.  {
    202. 

  202.  	rt2800_rf_init_calibration(rt2x00dev, 2);
    203. 

  203. @@ -7318,6 +7417,9 @@ static void rt2800_init_rfcsr(struct rt2
    204. 

  204.  	case RT3593:
    205. 

  205.  		rt2800_init_rfcsr_3593(rt2x00dev);
    206. 

  206.  		break;
    207. 

  207. +	case RT5350:
    208. 

  208. +		rt2800_init_rfcsr_5350(rt2x00dev);
    209. 

  209. +		break;
    210. 

  210.  	case RT5390:
    211. 

  211.  		rt2800_init_rfcsr_5390(rt2x00dev);
    212. 

  212.  		break;
    213. 

  213. @@ -7577,6 +7679,12 @@ static int rt2800_validate_eeprom(struct
    214. 

  214.  		rt2x00_set_field16(&word, EEPROM_NIC_CONF0_RF_TYPE, RF2820);
    215. 

  215.  		rt2800_eeprom_write(rt2x00dev, EEPROM_NIC_CONF0, word);
    216. 

  216.  		rt2x00_eeprom_dbg(rt2x00dev, "Antenna: 0x%04x\n", word);
    217. 

  217. +	} else if (rt2x00_rt(rt2x00dev, RT5350)) {
    218. 

  218. +		rt2x00_set_field16(&word, EEPROM_NIC_CONF0_RXPATH, 1);
    219. 

  219. +		rt2x00_set_field16(&word, EEPROM_NIC_CONF0_TXPATH, 1);
    220. 

  220. +		rt2x00_set_field16(&word, EEPROM_NIC_CONF0_RF_TYPE, RF3320);
    221. 

  221. +		rt2x00_eeprom_write(rt2x00dev, EEPROM_NIC_CONF0, word);
    222. 

  222. +		rt2x00_eeprom_dbg(rt2x00dev, "Antenna: 0x%04x\n", word);
    223. 

  223.  	} else if (rt2x00_rt(rt2x00dev, RT2860) ||
    224. 

  224.  		   rt2x00_rt(rt2x00dev, RT2872)) {
    225. 

  225.  		/*
    226. 

  226. @@ -7715,6 +7823,8 @@ static int rt2800_init_eeprom(struct rt2
    227. 

  227.  		rt2800_eeprom_read(rt2x00dev, EEPROM_CHIP_ID, &rf);
    228. 

  228.  	else if (rt2x00_rt(rt2x00dev, RT3883))
    229. 

  229.  		rf = RF3853;
    230. 

  230. +	else if (rt2x00_rt(rt2x00dev, RT5350))
    231. 

  231. +		rf = RF5350;
    232. 

  232.  	else
    233. 

  233.  		rf = rt2x00_get_field16(eeprom, EEPROM_NIC_CONF0_RF_TYPE);
    234. 

  234.  
    235. 

  235. @@ -7734,6 +7844,7 @@ static int rt2800_init_eeprom(struct rt2
    236. 

  236.  	case RF3320:
    237. 

  237.  	case RF3322:
    238. 

  238.  	case RF3853:
    239. 

  239. +	case RF5350:
    240. 

  240.  	case RF5360:
    241. 

  241.  	case RF5362:
    242. 

  242.  	case RF5370:
    243. 

  243. @@ -8291,6 +8402,7 @@ static int rt2800_probe_hw_mode(struct r
    244. 

  244.  	case RF3290:
    245. 

  245.  	case RF3320:
    246. 

  246.  	case RF3322:
    247. 

  247. +	case RF5350:
    248. 

  248.  	case RF5360:
    249. 

  249.  	case RF5362:
    250. 

  250.  	case RF5370:
    251. 

  251. @@ -8430,6 +8542,7 @@ static int rt2800_probe_hw_mode(struct r
    252. 

  252.  	case RF3070:
    253. 

  253.  	case RF3290:
    254. 

  254.  	case RF3853:
    255. 

  255. +	case RF5350:
    256. 

  256.  	case RF5360:
    257. 

  257.  	case RF5362:
    258. 

  258.  	case RF5370:
    259. 

  259. @@ -8470,6 +8583,7 @@ static int rt2800_probe_rt(struct rt2x00
    260. 

  260.  	case RT3572:
    261. 

  261.  	case RT3593:
    262. 

  262.  	case RT3883:
    263. 

  263. +	case RT5350:
    264. 

  264.  	case RT5390:
    265. 

  265.  	case RT5392:
    266. 

  266.  	case RT5592:
    267. 

  267. --- a/drivers/net/wireless/ralink/rt2x00/rt2x00.h
    268. 

  268. +++ b/drivers/net/wireless/ralink/rt2x00/rt2x00.h
    269. 

  269. @@ -170,6 +170,7 @@ struct rt2x00_chip {
    270. 

  270.  #define RT3572		0x3572
    271. 

  271.  #define RT3593		0x3593
    272. 

  272.  #define RT3883		0x3883	/* WSOC */
    273. 

  273. +#define RT5350		0x5350  /* WSOC 2.4GHz */
    274. 

  274.  #define RT5390		0x5390  /* 2.4GHz */
    275. 

  275.  #define RT5392		0x5392  /* 2.4GHz */
    276. 

  276.  #define RT5592		0x5592
    277.