037-0001-ARM-BCM5301X-Add-DT-entry-for-SPI-controller-and-NOR.patch 1.4 KB

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  1. From 1b47b98acce2db0da632d056821420b33205b8b2 Mon Sep 17 00:00:00 2001
  2. From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <zajec5@gmail.com>
  3. Date: Tue, 19 Apr 2016 08:56:46 +0200
  4. Subject: [PATCH] ARM: BCM5301X: Add DT entry for SPI controller and NOR flash
  5. MIME-Version: 1.0
  6. Content-Type: text/plain; charset=UTF-8
  7. Content-Transfer-Encoding: 8bit
  8. Controller is present on every BCM4708* board but only few devices have
  9. serial flash attached so mark it as disabled by default.
  10. Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
  11. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
  12. ---
  13. --- a/arch/arm/boot/dts/bcm4708-luxul-xwc-1000.dts
  14. +++ b/arch/arm/boot/dts/bcm4708-luxul-xwc-1000.dts
  15. @@ -59,3 +59,7 @@
  16. &uart0 {
  17. status = "okay";
  18. };
  19. +
  20. +&spi_nor {
  21. + status = "okay";
  22. +};
  23. --- a/arch/arm/boot/dts/bcm4708-smartrg-sr400ac.dts
  24. +++ b/arch/arm/boot/dts/bcm4708-smartrg-sr400ac.dts
  25. @@ -122,3 +122,7 @@
  26. &uart0 {
  27. status = "okay";
  28. };
  29. +
  30. +&spi_nor {
  31. + status = "okay";
  32. +};
  33. --- a/arch/arm/boot/dts/bcm5301x.dtsi
  34. +++ b/arch/arm/boot/dts/bcm5301x.dtsi
  35. @@ -225,6 +225,20 @@
  36. #address-cells = <1>;
  37. #size-cells = <1>;
  38. };
  39. +
  40. + spi@29000 {
  41. + reg = <0x00029000 0x1000>;
  42. + #address-cells = <1>;
  43. + #size-cells = <0>;
  44. +
  45. + spi_nor: spi-nor@0 {
  46. + compatible = "jedec,spi-nor";
  47. + reg = <0>;
  48. + spi-max-frequency = <20000000>;
  49. + linux,part-probe = "ofpart", "bcm47xxpart";
  50. + status = "disabled";
  51. + };
  52. + };
  53. };
  54. lcpll0: lcpll0@1800c100 {