301-ARM-qcom-add-Netgear-Nighthawk-X4-R7500-device-tree.patch 7.0 KB

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  1. From 7e77aa188a7a7c4391856a9e5ef5ef58f769e679 Mon Sep 17 00:00:00 2001
  2. From: Jonas Gorski <jogo@openwrt.org>
  3. Date: Sun, 9 Aug 2015 13:02:38 +0200
  4. Subject: [PATCH] ARM: qcom: add Netgear Nighthawk X4 R7500 device tree
  5. Signed-off-by: Jonas Gorski <jogo@openwrt.org>
  6. ---
  7. arch/arm/boot/dts/Makefile | 1 +
  8. arch/arm/boot/dts/qcom-ipq8064-r7500.dts | 370 +++++++++++++++++++++++++++++++
  9. 2 files changed, 371 insertions(+)
  10. create mode 100644 arch/arm/boot/dts/qcom-ipq8064-r7500.dts
  11. --- a/arch/arm/boot/dts/Makefile
  12. +++ b/arch/arm/boot/dts/Makefile
  13. @@ -361,6 +361,7 @@ dtb-$(CONFIG_ARCH_QCOM) += \
  14. qcom-apq8084-mtp.dtb \
  15. qcom-ipq8064-ap148.dtb \
  16. qcom-ipq8064-db149.dtb \
  17. + qcom-ipq8064-r7500.dtb \
  18. qcom-msm8660-surf.dtb \
  19. qcom-msm8960-cdp.dtb \
  20. qcom-msm8974-sony-xperia-honami.dtb
  21. --- /dev/null
  22. +++ b/arch/arm/boot/dts/qcom-ipq8064-r7500.dts
  23. @@ -0,0 +1,342 @@
  24. +#include "qcom-ipq8064-v1.0.dtsi"
  25. +
  26. +#include <dt-bindings/input/input.h>
  27. +
  28. +/ {
  29. + model = "Netgear Nighthawk X4 R7500";
  30. + compatible = "netgear,r7500", "qcom,ipq8064";
  31. +
  32. + memory@0 {
  33. + reg = <0x42000000 0xe000000>;
  34. + device_type = "memory";
  35. + };
  36. +
  37. + reserved-memory {
  38. + #address-cells = <1>;
  39. + #size-cells = <1>;
  40. + ranges;
  41. + rsvd@41200000 {
  42. + reg = <0x41200000 0x300000>;
  43. + no-map;
  44. + };
  45. + };
  46. +
  47. + aliases {
  48. + serial0 = &uart4;
  49. + mdio-gpio0 = &mdio0;
  50. + };
  51. +
  52. + chosen {
  53. + bootargs = "rootfstype=squashfs noinitrd";
  54. + linux,stdout-path = "serial0:115200n8";
  55. + };
  56. +
  57. + soc {
  58. + pinmux@800000 {
  59. + i2c4_pins: i2c4_pinmux {
  60. + pins = "gpio12", "gpio13";
  61. + function = "gsbi4";
  62. + bias-disable;
  63. + };
  64. +
  65. + nand_pins: nand_pins {
  66. + mux {
  67. + pins = "gpio34", "gpio35", "gpio36",
  68. + "gpio37", "gpio38", "gpio39",
  69. + "gpio40", "gpio41", "gpio42",
  70. + "gpio43", "gpio44", "gpio45",
  71. + "gpio46", "gpio47";
  72. + function = "nand";
  73. + drive-strength = <10>;
  74. + bias-disable;
  75. + };
  76. + pullups {
  77. + pins = "gpio39";
  78. + bias-pull-up;
  79. + };
  80. + hold {
  81. + pins = "gpio40", "gpio41", "gpio42",
  82. + "gpio43", "gpio44", "gpio45",
  83. + "gpio46", "gpio47";
  84. + bias-bus-hold;
  85. + };
  86. + };
  87. +
  88. + mdio0_pins: mdio0_pins {
  89. + mux {
  90. + pins = "gpio0", "gpio1";
  91. + function = "gpio";
  92. + drive-strength = <8>;
  93. + bias-disable;
  94. + };
  95. + };
  96. +
  97. + rgmii2_pins: rgmii2_pins {
  98. + mux {
  99. + pins = "gpio27", "gpio28", "gpio29", "gpio30", "gpio31", "gpio32",
  100. + "gpio51", "gpio52", "gpio59", "gpio60", "gpio61", "gpio62" ;
  101. + function = "rgmii2";
  102. + drive-strength = <8>;
  103. + bias-disable;
  104. + };
  105. + };
  106. + };
  107. +
  108. + gsbi@16300000 {
  109. + qcom,mode = <GSBI_PROT_I2C_UART>;
  110. + status = "ok";
  111. + serial@16340000 {
  112. + status = "ok";
  113. + };
  114. + /*
  115. + * The i2c device on gsbi4 should not be enabled.
  116. + * On ipq806x designs gsbi4 i2c is meant for exclusive
  117. + * RPM usage. Turning this on in kernel manifests as
  118. + * i2c failure for the RPM.
  119. + */
  120. + };
  121. +
  122. + sata-phy@1b400000 {
  123. + status = "ok";
  124. + };
  125. +
  126. + sata@29000000 {
  127. + status = "ok";
  128. + };
  129. +
  130. + phy@100f8800 { /* USB3 port 1 HS phy */
  131. + status = "ok";
  132. + };
  133. +
  134. + phy@100f8830 { /* USB3 port 1 SS phy */
  135. + status = "ok";
  136. + };
  137. +
  138. + phy@110f8800 { /* USB3 port 0 HS phy */
  139. + status = "ok";
  140. + };
  141. +
  142. + phy@110f8830 { /* USB3 port 0 SS phy */
  143. + status = "ok";
  144. + };
  145. +
  146. + usb30@0 {
  147. + status = "ok";
  148. + };
  149. +
  150. + usb30@1 {
  151. + status = "ok";
  152. + };
  153. +
  154. + pcie0: pci@1b500000 {
  155. + status = "ok";
  156. + };
  157. +
  158. + pcie1: pci@1b700000 {
  159. + status = "ok";
  160. + };
  161. +
  162. + nand@1ac00000 {
  163. + status = "ok";
  164. +
  165. + pinctrl-0 = <&nand_pins>;
  166. + pinctrl-names = "default";
  167. +
  168. + nand-ecc-strength = <4>;
  169. + nand-bus-width = <8>;
  170. +
  171. + #address-cells = <1>;
  172. + #size-cells = <1>;
  173. +
  174. + qcadata@0 {
  175. + label = "qcadata";
  176. + reg = <0x0000000 0x0c80000>;
  177. + read-only;
  178. + };
  179. +
  180. + APPSBL@c80000 {
  181. + label = "APPSBL";
  182. + reg = <0x0c80000 0x0500000>;
  183. + read-only;
  184. + };
  185. +
  186. + APPSBLENV@1180000 {
  187. + label = "APPSBLENV";
  188. + reg = <0x1180000 0x0080000>;
  189. + read-only;
  190. + };
  191. +
  192. + art: art@1200000 {
  193. + label = "art";
  194. + reg = <0x1200000 0x0140000>;
  195. + read-only;
  196. + };
  197. +
  198. + kernel@1340000 {
  199. + label = "kernel";
  200. + reg = <0x1340000 0x0200000>;
  201. + };
  202. +
  203. + ubi@1540000 {
  204. + label = "ubi";
  205. + reg = <0x1540000 0x1800000>;
  206. + };
  207. +
  208. + netgear@2d40000 {
  209. + label = "netgear";
  210. + reg = <0x2d40000 0x0c00000>;
  211. + read-only;
  212. + };
  213. +
  214. + reserve@3940000 {
  215. + label = "reserve";
  216. + reg = <0x3940000 0x46c0000>;
  217. + read-only;
  218. + };
  219. +
  220. + firmware@1340000 {
  221. + label = "firmware";
  222. + reg = <0x1340000 0x1a00000>;
  223. + };
  224. +
  225. + };
  226. +
  227. + mdio0: mdio {
  228. + compatible = "virtual,mdio-gpio";
  229. + #address-cells = <1>;
  230. + #size-cells = <0>;
  231. + gpios = <&qcom_pinmux 1 0 &qcom_pinmux 0 0>;
  232. + pinctrl-0 = <&mdio0_pins>;
  233. + pinctrl-names = "default";
  234. +
  235. + phy0: ethernet-phy@0 {
  236. + device_type = "ethernet-phy";
  237. + reg = <0>;
  238. + qca,ar8327-initvals = <
  239. + 0x00004 0x7600000 /* PAD0_MODE */
  240. + 0x00008 0x1000000 /* PAD5_MODE */
  241. + 0x0000c 0x80 /* PAD6_MODE */
  242. + 0x000e4 0xaa545 /* MAC_POWER_SEL */
  243. + 0x000e0 0xc74164de /* SGMII_CTRL */
  244. + 0x0007c 0x4e /* PORT0_STATUS */
  245. + 0x00094 0x4e /* PORT6_STATUS */
  246. + >;
  247. + };
  248. +
  249. + phy4: ethernet-phy@4 {
  250. + device_type = "ethernet-phy";
  251. + reg = <4>;
  252. + };
  253. + };
  254. +
  255. + gmac1: ethernet@37200000 {
  256. + status = "ok";
  257. + phy-mode = "rgmii";
  258. + qcom,id = <1>;
  259. +
  260. + pinctrl-0 = <&rgmii2_pins>;
  261. + pinctrl-names = "default";
  262. +
  263. + mtd-mac-address = <&art 6>;
  264. +
  265. + fixed-link {
  266. + speed = <1000>;
  267. + full-duplex;
  268. + };
  269. + };
  270. +
  271. + gmac2: ethernet@37400000 {
  272. + status = "ok";
  273. + phy-mode = "sgmii";
  274. + qcom,id = <2>;
  275. +
  276. + mtd-mac-address = <&art 0>;
  277. +
  278. + fixed-link {
  279. + speed = <1000>;
  280. + full-duplex;
  281. + };
  282. + };
  283. + };
  284. +
  285. + gpio-keys {
  286. + compatible = "gpio-keys";
  287. +
  288. + wifi {
  289. + label = "wifi";
  290. + gpios = <&qcom_pinmux 6 1>;
  291. + linux,code = <KEY_WLAN>;
  292. + };
  293. +
  294. + reset {
  295. + label = "reset";
  296. + gpios = <&qcom_pinmux 54 1>;
  297. + linux,code = <KEY_RESTART>;
  298. + };
  299. +
  300. + wps {
  301. + label = "wps";
  302. + gpios = <&qcom_pinmux 65 1>;
  303. + linux,code = <KEY_WPS_BUTTON>;
  304. + };
  305. + };
  306. +
  307. + gpio-leds {
  308. + compatible = "gpio-leds";
  309. +
  310. + usb1 {
  311. + label = "r7500:amber:usb1";
  312. + gpios = <&qcom_pinmux 7 0>;
  313. + };
  314. +
  315. + usb3 {
  316. + label = "r7500:amber:usb3";
  317. + gpios = <&qcom_pinmux 8 0>;
  318. + };
  319. +
  320. + status {
  321. + label = "r7500:amber:status";
  322. + gpios = <&qcom_pinmux 9 0>;
  323. + };
  324. +
  325. + internet {
  326. + label = "r7500:white:internet";
  327. + gpios = <&qcom_pinmux 22 0>;
  328. + };
  329. +
  330. + wan {
  331. + label = "r7500:white:wan";
  332. + gpios = <&qcom_pinmux 23 0>;
  333. + };
  334. +
  335. + wps {
  336. + label = "r7500:white:wps";
  337. + gpios = <&qcom_pinmux 24 0>;
  338. + };
  339. +
  340. + esata {
  341. + label = "r7500:white:esata";
  342. + gpios = <&qcom_pinmux 26 0>;
  343. + };
  344. +
  345. + power {
  346. + label = "r7500:white:power";
  347. + gpios = <&qcom_pinmux 53 0>;
  348. + default-state = "on";
  349. + };
  350. +
  351. + rfkill {
  352. + label = "r7500:white:rfkill";
  353. + gpios = <&qcom_pinmux 64 0>;
  354. + };
  355. +
  356. + wifi5g {
  357. + label = "r7500:white:wifi5g";
  358. + gpios = <&qcom_pinmux 67 0>;
  359. + };
  360. + };
  361. +};
  362. +
  363. +&adm_dma {
  364. + status = "ok";
  365. +};