707-ARM-dts-qcom-add-mdio-nodes-to-ap148-db149.patch 3.1 KB

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  1. From e81de9d28bd0421c236df322872e64edf4ee1852 Mon Sep 17 00:00:00 2001
  2. From: Mathieu Olivari <mathieu@codeaurora.org>
  3. Date: Mon, 11 May 2015 16:32:09 -0700
  4. Subject: [PATCH 7/8] ARM: dts: qcom: add mdio nodes to ap148 & db149
  5. Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org>
  6. ---
  7. arch/arm/boot/dts/qcom-ipq8064-ap148.dts | 40 ++++++++++++++++++++++++++-
  8. arch/arm/boot/dts/qcom-ipq8064-db149.dts | 46 ++++++++++++++++++++++++++++++++
  9. 2 files changed, 85 insertions(+), 1 deletion(-)
  10. --- a/arch/arm/boot/dts/qcom-ipq8064-ap148.dts
  11. +++ b/arch/arm/boot/dts/qcom-ipq8064-ap148.dts
  12. @@ -19,8 +19,9 @@
  13. };
  14. };
  15. - alias {
  16. + aliases {
  17. serial0 = &uart4;
  18. + mdio-gpio0 = &mdio0;
  19. };
  20. chosen {
  21. @@ -68,6 +69,15 @@
  22. bias-bus-hold;
  23. };
  24. };
  25. +
  26. + mdio0_pins: mdio0_pins {
  27. + mux {
  28. + pins = "gpio0", "gpio1";
  29. + function = "gpio";
  30. + drive-strength = <8>;
  31. + bias-disable;
  32. + };
  33. + };
  34. };
  35. gsbi@16300000 {
  36. @@ -162,6 +172,34 @@
  37. linux,part-probe = "qcom-smem";
  38. };
  39. +
  40. + mdio0: mdio {
  41. + compatible = "virtual,mdio-gpio";
  42. + #address-cells = <1>;
  43. + #size-cells = <0>;
  44. + gpios = <&qcom_pinmux 1 0 &qcom_pinmux 0 0>;
  45. + pinctrl-0 = <&mdio0_pins>;
  46. + pinctrl-names = "default";
  47. +
  48. + phy0: ethernet-phy@0 {
  49. + device_type = "ethernet-phy";
  50. + reg = <0>;
  51. + qca,ar8327-initvals = <
  52. + 0x00004 0x7600000 /* PAD0_MODE */
  53. + 0x00008 0x1000000 /* PAD5_MODE */
  54. + 0x0000c 0x80 /* PAD6_MODE */
  55. + 0x000e4 0xaa545 /* MAC_POWER_SEL */
  56. + 0x000e0 0xc74164de /* SGMII_CTRL */
  57. + 0x0007c 0x4e /* PORT0_STATUS */
  58. + 0x00094 0x4e /* PORT6_STATUS */
  59. + >;
  60. + };
  61. +
  62. + phy4: ethernet-phy@4 {
  63. + device_type = "ethernet-phy";
  64. + reg = <4>;
  65. + };
  66. + };
  67. };
  68. };
  69. --- a/arch/arm/boot/dts/qcom-ipq8064-db149.dts
  70. +++ b/arch/arm/boot/dts/qcom-ipq8064-db149.dts
  71. @@ -16,6 +16,7 @@
  72. alias {
  73. serial0 = &uart2;
  74. + mdio-gpio0 = &mdio0;
  75. };
  76. chosen {
  77. @@ -38,6 +39,15 @@
  78. bias-none;
  79. };
  80. };
  81. +
  82. + mdio0_pins: mdio0_pins {
  83. + mux {
  84. + pins = "gpio0", "gpio1";
  85. + function = "gpio";
  86. + drive-strength = <8>;
  87. + bias-disable;
  88. + };
  89. + };
  90. };
  91. gsbi2: gsbi@12480000 {
  92. @@ -140,5 +150,44 @@
  93. pcie2: pci@1b900000 {
  94. status = "ok";
  95. };
  96. +
  97. + mdio0: mdio {
  98. + compatible = "virtual,mdio-gpio";
  99. + #address-cells = <1>;
  100. + #size-cells = <0>;
  101. + gpios = <&qcom_pinmux 1 0 &qcom_pinmux 0 0>;
  102. +
  103. + pinctrl-0 = <&mdio0_pins>;
  104. + pinctrl-names = "default";
  105. +
  106. + phy0: ethernet-phy@0 {
  107. + device_type = "ethernet-phy";
  108. + reg = <0>;
  109. + qca,ar8327-initvals = <
  110. + 0x00004 0x7600000 /* PAD0_MODE */
  111. + 0x00008 0x1000000 /* PAD5_MODE */
  112. + 0x0000c 0x80 /* PAD6_MODE */
  113. + 0x000e4 0xaa545 /* MAC_POWER_SEL */
  114. + 0x000e0 0xc74164de /* SGMII_CTRL */
  115. + 0x0007c 0x4e /* PORT0_STATUS */
  116. + 0x00094 0x4e /* PORT6_STATUS */
  117. + >;
  118. + };
  119. +
  120. + phy4: ethernet-phy@4 {
  121. + device_type = "ethernet-phy";
  122. + reg = <4>;
  123. + };
  124. +
  125. + phy6: ethernet-phy@6 {
  126. + device_type = "ethernet-phy";
  127. + reg = <6>;
  128. + };
  129. +
  130. + phy7: ethernet-phy@7 {
  131. + device_type = "ethernet-phy";
  132. + reg = <7>;
  133. + };
  134. + };
  135. };
  136. };