126-add-rpm-to-ipq8064-dts.patch 2.1 KB

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  1. --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
  2. +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
  3. @@ -2,6 +2,7 @@
  4. #include "skeleton.dtsi"
  5. #include <dt-bindings/clock/qcom,gcc-ipq806x.h>
  6. +#include <dt-bindings/mfd/qcom-rpm.h>
  7. #include <dt-bindings/clock/qcom,lcc-ipq806x.h>
  8. #include <dt-bindings/soc/qcom,gsbi.h>
  9. #include <dt-bindings/reset/qcom,gcc-ipq806x.h>
  10. @@ -93,6 +94,63 @@
  11. reg-names = "lpass-lpaif";
  12. };
  13. + rpm@108000 {
  14. + compatible = "qcom,rpm-ipq8064";
  15. + reg = <0x108000 0x1000>;
  16. + qcom,ipc = <&l2cc 0x8 2>;
  17. +
  18. + interrupts = <0 19 0>,
  19. + <0 21 0>,
  20. + <0 22 0>;
  21. + interrupt-names = "ack",
  22. + "err",
  23. + "wakeup";
  24. +
  25. + #address-cells = <1>;
  26. + #size-cells = <0>;
  27. +
  28. + smb208_s1a: smb208-s1a {
  29. + compatible = "qcom,rpm-smb208";
  30. + reg = <QCOM_RPM_SMB208_S1a>;
  31. +
  32. + regulator-min-microvolt = <1050000>;
  33. + regulator-max-microvolt = <1150000>;
  34. +
  35. + qcom,switch-mode-frequency = <1200000>;
  36. +
  37. + };
  38. +
  39. + smb208_s1b: smb208-s1b {
  40. + compatible = "qcom,rpm-smb208";
  41. + reg = <QCOM_RPM_SMB208_S1b>;
  42. +
  43. + regulator-min-microvolt = <1050000>;
  44. + regulator-max-microvolt = <1150000>;
  45. +
  46. + qcom,switch-mode-frequency = <1200000>;
  47. + };
  48. +
  49. + smb208_s2a: smb208-s2a {
  50. + compatible = "qcom,rpm-smb208";
  51. + reg = <QCOM_RPM_SMB208_S2a>;
  52. +
  53. + regulator-min-microvolt = < 800000>;
  54. + regulator-max-microvolt = <1250000>;
  55. +
  56. + qcom,switch-mode-frequency = <1200000>;
  57. + };
  58. +
  59. + smb208_s2b: smb208-s2b {
  60. + compatible = "qcom,rpm-smb208";
  61. + reg = <QCOM_RPM_SMB208_S2b>;
  62. +
  63. + regulator-min-microvolt = < 800000>;
  64. + regulator-max-microvolt = <1250000>;
  65. +
  66. + qcom,switch-mode-frequency = <1200000>;
  67. + };
  68. + };
  69. +
  70. qcom_pinmux: pinmux@800000 {
  71. compatible = "qcom,ipq8064-pinctrl";
  72. reg = <0x800000 0x4000>;
  73. @@ -164,6 +222,12 @@
  74. reg = <0x02098000 0x1000>, <0x02008000 0x1000>;
  75. };
  76. + l2cc: clock-controller@2011000 {
  77. + compatible = "qcom,kpss-gcc", "syscon";
  78. + reg = <0x2011000 0x1000>;
  79. + clock-output-names = "acpu_l2_aux";
  80. + };
  81. +
  82. saw0: regulator@2089000 {
  83. compatible = "qcom,saw2";
  84. reg = <0x02089000 0x1000>, <0x02009000 0x1000>;