P2812HNUFX.dtsi 6.6 KB

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  1. /include/ "vr9.dtsi"
  2. / {
  3. chosen {
  4. bootargs = "console=ttyLTQ0,115200 init=/etc/preinit";
  5. leds {
  6. boot = &power_green;
  7. failsafe = &power_red;
  8. running = &power_green;
  9. dsl = &dsl_green;
  10. internet = &internet_green;
  11. wifi = &wireless_green;
  12. };
  13. };
  14. memory@0 {
  15. reg = <0x0 0x8000000>;
  16. };
  17. fpi@10000000 {
  18. #address-cells = <1>;
  19. #size-cells = <1>;
  20. compatible = "lantiq,fpi", "simple-bus";
  21. ranges = <0x0 0x10000000 0xEEFFFFF>;
  22. reg = <0x10000000 0xEF00000>;
  23. localbus@0 {
  24. #address-cells = <2>;
  25. #size-cells = <1>;
  26. ranges = <0 0 0x0 0x3ffffff /* addrsel0 */
  27. 1 0 0x4000000 0x4000010>; /* addsel1 */
  28. compatible = "lantiq,localbus", "simple-bus";
  29. };
  30. gpio: pinmux@E100B10 {
  31. compatible = "lantiq,pinctrl-xr9";
  32. pinctrl-names = "default";
  33. pinctrl-0 = <&state_default>;
  34. interrupt-parent = <&icu0>;
  35. interrupts = <166 135 66 40 41 42 38>;
  36. #gpio-cells = <2>;
  37. gpio-controller;
  38. reg = <0xE100B10 0xA0>;
  39. state_default: pinmux {
  40. exin3 {
  41. lantiq,groups = "exin3";
  42. lantiq,function = "exin";
  43. };
  44. mdio {
  45. lantiq,groups = "mdio";
  46. lantiq,function = "mdio";
  47. };
  48. gphy-leds {
  49. lantiq,groups = "gphy0 led1", "gphy1 led1",
  50. "gphy0 led2", "gphy1 led2";
  51. lantiq,function = "gphy";
  52. lantiq,pull = <2>;
  53. lantiq,open-drain = <0>;
  54. lantiq,output = <1>;
  55. };
  56. stp {
  57. lantiq,groups = "stp";
  58. lantiq,function = "stp";
  59. lantiq,pull = <2>;
  60. lantiq,open-drain = <0>;
  61. lantiq,output = <1>;
  62. };
  63. pci-in {
  64. lantiq,groups = "req1";
  65. lantiq,function = "pci";
  66. lantiq,output = <0>;
  67. lantiq,open-drain = <1>;
  68. lantiq,pull = <2>;
  69. };
  70. pci-out {
  71. lantiq,groups = "gnt1";
  72. lantiq,function = "pci";
  73. lantiq,output = <1>;
  74. lantiq,open-drain = <0>;
  75. lantiq,pull = <0>;
  76. };
  77. pci_rst {
  78. lantiq,pins = "io21";
  79. lantiq,output = <1>;
  80. lantiq,open-drain = <0>;
  81. lantiq,pull = <2>;
  82. };
  83. pcie-rst {
  84. lantiq,pins = "io38";
  85. lantiq,pull = <0>;
  86. lantiq,output = <1>;
  87. };
  88. ifxhcd-rst {
  89. lantiq,pins = "io33";
  90. lantiq,pull = <0>;
  91. lantiq,open-drain = <0>;
  92. lantiq,output = <1>;
  93. };
  94. nand_out {
  95. lantiq,groups = "nand cle", "nand ale";
  96. lantiq,function = "ebu";
  97. lantiq,output = <1>;
  98. lantiq,open-drain = <0>;
  99. lantiq,pull = <0>;
  100. };
  101. nand_cs1 {
  102. lantiq,groups = "nand cs1";
  103. lantiq,function = "ebu";
  104. lantiq,open-drain = <0>;
  105. lantiq,pull = <0>;
  106. };
  107. };
  108. };
  109. stp: stp@E100BB0 {
  110. compatible = "lantiq,gpio-stp-xway";
  111. reg = <0xE100BB0 0x40>;
  112. #gpio-cells = <2>;
  113. gpio-controller;
  114. lantiq,shadow = <0xffffff>;
  115. lantiq,groups = <0x7>;
  116. lantiq,dsl = <0x0>;
  117. lantiq,phy1 = <0x0>;
  118. lantiq,phy2 = <0x0>;
  119. };
  120. ifxhcd@E101000 {
  121. status = "okay";
  122. gpios = <&gpio 33 0>;
  123. lantiq,portmask = <0x3>;
  124. };
  125. ifxhcd@E106000 {
  126. status = "okay";
  127. gpios = <&gpio 33 0>;
  128. };
  129. pci@E105400 {
  130. status = "okay";
  131. #address-cells = <3>;
  132. #size-cells = <2>;
  133. #interrupt-cells = <1>;
  134. compatible = "lantiq,pci-xway";
  135. bus-range = <0x0 0x0>;
  136. ranges = <0x2000000 0 0x8000000 0x8000000 0 0x2000000 /* pci memory */
  137. 0x1000000 0 0x00000000 0xAE00000 0 0x200000>; /* io space */
  138. reg = <0x7000000 0x8000 /* config space */
  139. 0xE105400 0x400>; /* pci bridge */
  140. lantiq,bus-clock = <33333333>;
  141. /*lantiq,external-clock;*/
  142. lantiq,delay-hi = <0>; /* 0ns delay */
  143. lantiq,delay-lo = <0>; /* 0.0ns delay */
  144. interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
  145. interrupt-map = <
  146. 0x7000 0 0 1 &icu0 30 1 // slot 14, irq 30
  147. >;
  148. gpio-reset = <&gpio 21 0>;
  149. req-mask = <0x1>; /* GNT1 */
  150. };
  151. };
  152. gphy-xrx200 {
  153. compatible = "lantiq,phy-xrx200";
  154. firmware1 = "lantiq/vr9_phy11g_a1x.bin"; /*VR9 1.1*/
  155. firmware2 = "lantiq/vr9_phy11g_a2x.bin"; /*VR9 1.2*/
  156. phys = [ 00 01 ];
  157. };
  158. gpio-keys-polled {
  159. compatible = "gpio-keys-polled";
  160. #address-cells = <1>;
  161. #size-cells = <0>;
  162. poll-interval = <100>;
  163. reset {
  164. label = "reset";
  165. gpios = <&gpio 39 1>;
  166. linux,code = <0x198>;
  167. };
  168. rfkill {
  169. label = "rfkill";
  170. gpios = <&gpio 1 1>;
  171. linux,code = <0xf7>;
  172. };
  173. };
  174. gpio-leds {
  175. compatible = "gpio-leds";
  176. internet_red {
  177. label = "p2812hnufx:red:internet";
  178. gpios = <&stp 16 1>;
  179. };
  180. internet_green: internet_green {
  181. label = "p2812hnufx:green:internet";
  182. gpios = <&stp 17 1>;
  183. };
  184. dsl_green: dsl_green {
  185. label = "p2812hnufx:green:dsl";
  186. gpios = <&stp 18 1>;
  187. };
  188. dsl_orange {
  189. label = "p2812hnufx:orange:dsl";
  190. gpios = <&stp 19 1>;
  191. };
  192. wireless_orange {
  193. label = "p2812hnufx:orange:wlan";
  194. gpios = <&stp 20 1>;
  195. };
  196. wireless_green: wireless_green {
  197. label = "p2812hnufx:green:wlan";
  198. gpios = <&stp 21 1>;
  199. };
  200. power_red: power {
  201. label = "p2812hnufx:red:power";
  202. gpios = <&stp 22 1>;
  203. };
  204. power_green: power2 {
  205. label = "p2812hnufx:green:power";
  206. gpios = <&stp 23 1>;
  207. default-state = "keep";
  208. };
  209. phone1 {
  210. label = "p2812hnufx:green:phone";
  211. gpios = <&gpio 11 1>;
  212. };
  213. phone1warn {
  214. label = "p2812hnufx:orange:phone";
  215. gpios = <&gpio 12 1>;
  216. };
  217. phone2warn {
  218. label = "p2812hnufx:orange:phone2";
  219. gpios = <&gpio 26 1>;
  220. };
  221. phone2 {
  222. label = "p2812hnufx:green:phone2";
  223. gpios = <&gpio 28 1>;
  224. };
  225. };
  226. };
  227. &eth0 {
  228. lan: interface@0 {
  229. compatible = "lantiq,xrx200-pdi";
  230. #address-cells = <1>;
  231. #size-cells = <0>;
  232. reg = <0>;
  233. mac-address = [ 00 11 22 33 44 55 ];
  234. lantiq,switch;
  235. ethernet@0 {
  236. compatible = "lantiq,xrx200-pdi-port";
  237. reg = <0>;
  238. phy-mode = "rgmii";
  239. phy-handle = <&phy0>;
  240. };
  241. ethernet@1 {
  242. compatible = "lantiq,xrx200-pdi-port";
  243. reg = <1>;
  244. phy-mode = "rgmii";
  245. phy-handle = <&phy1>;
  246. };
  247. ethernet@2 {
  248. compatible = "lantiq,xrx200-pdi-port";
  249. reg = <2>;
  250. phy-mode = "gmii";
  251. phy-handle = <&phy11>;
  252. };
  253. ethernet@4 {
  254. compatible = "lantiq,xrx200-pdi-port";
  255. reg = <4>;
  256. phy-mode = "gmii";
  257. phy-handle = <&phy13>;
  258. };
  259. ethernet@5 {
  260. compatible = "lantiq,xrx200-pdi-port";
  261. reg = <5>;
  262. phy-mode = "rgmii";
  263. phy-handle = <&phy5>;
  264. };
  265. };
  266. mdio@0 {
  267. #address-cells = <1>;
  268. #size-cells = <0>;
  269. compatible = "lantiq,xrx200-mdio";
  270. phy0: ethernet-phy@0 {
  271. reg = <0x0>;
  272. compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
  273. };
  274. phy1: ethernet-phy@1 {
  275. reg = <0x1>;
  276. compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
  277. };
  278. phy5: ethernet-phy@5 {
  279. reg = <0x5>;
  280. compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
  281. };
  282. phy11: ethernet-phy@11 {
  283. reg = <0x11>;
  284. compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
  285. };
  286. phy13: ethernet-phy@13 {
  287. reg = <0x13>;
  288. compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
  289. };
  290. };
  291. };