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- From ba126a519da8a036dae0032e9d5a89e47570e5fb Mon Sep 17 00:00:00 2001
- From: "chunfeng.yun@mediatek.com" <chunfeng.yun@mediatek.com>
- Date: Tue, 17 Nov 2015 17:18:39 +0800
- Subject: [PATCH 018/102] dt-bindings: Add a binding for Mediatek xHCI host
- controller
- add a DT binding documentation of xHCI host controller for the
- MT8173 SoC from Mediatek.
- Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
- ---
- .../devicetree/bindings/usb/mt8173-xhci.txt | 51 ++++++++++++++++++++
- 1 file changed, 51 insertions(+)
- create mode 100644 Documentation/devicetree/bindings/usb/mt8173-xhci.txt
- --- /dev/null
- +++ b/Documentation/devicetree/bindings/usb/mt8173-xhci.txt
- @@ -0,0 +1,51 @@
- +MT8173 xHCI
- +
- +The device node for Mediatek SOC USB3.0 host controller
- +
- +Required properties:
- + - compatible : should contain "mediatek,mt8173-xhci"
- + - reg : specifies physical base address and size of the registers,
- + the first one for MAC, the second for IPPC
- + - interrupts : interrupt used by the controller
- + - power-domains : a phandle to USB power domain node to control USB's
- + mtcmos
- + - vusb33-supply : regulator of USB avdd3.3v
- +
- + - clocks : a list of phandle + clock-specifier pairs, one for each
- + entry in clock-names
- + - clock-names : must contain
- + "sys_ck": for clock of xHCI MAC
- + "wakeup_deb_p0": for USB wakeup debounce clock of port0
- + "wakeup_deb_p0": for USB wakeup debounce clock of port1
- +
- + - phys : a list of phandle + phy specifier pairs
- +
- +Optional properties:
- + - mediatek,wakeup-src : 1: ip sleep wakeup mode; 2: line state wakeup
- + mode;
- + - mediatek,syscon-wakeup : phandle to syscon used to access USB wakeup
- + control register, it depends on "mediatek,wakeup-src".
- + - vbus-supply : reference to the VBUS regulator;
- + - usb3-lpm-capable : supports USB3.0 LPM
- +
- +Example:
- +usb30: usb@11270000 {
- + compatible = "mediatek,mt8173-xhci";
- + reg = <0 0x11270000 0 0x1000>,
- + <0 0x11280700 0 0x0100>;
- + interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_LOW>;
- + power-domains = <&scpsys MT8173_POWER_DOMAIN_USB>;
- + clocks = <&topckgen CLK_TOP_USB30_SEL>,
- + <&pericfg CLK_PERI_USB0>,
- + <&pericfg CLK_PERI_USB1>;
- + clock-names = "sys_ck",
- + "wakeup_deb_p0",
- + "wakeup_deb_p1";
- + phys = <&phy_port0 PHY_TYPE_USB3>,
- + <&phy_port1 PHY_TYPE_USB2>;
- + vusb33-supply = <&mt6397_vusb_reg>;
- + vbus-supply = <&usb_p1_vbus>;
- + usb3-lpm-capable;
- + mediatek,syscon-wakeup = <&pericfg>;
- + mediatek,wakeup-src = <1>;
- +};
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