MZK-EX750NP.dts 2.2 KB

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  1. /dts-v1/;
  2. #include "mt7620a.dtsi"
  3. / {
  4. compatible = "ralink,mt7620a-soc";
  5. model = "Planex MZK-EX750NP";
  6. gpio-leds {
  7. compatible = "gpio-leds";
  8. power {
  9. label = "mzk-ex750np:red:power";
  10. gpios = <&gpio0 14 1>;
  11. };
  12. wifi {
  13. label = "mzk-ex750np:red:wifi";
  14. gpios = <&gpio3 0 1>;
  15. };
  16. wps {
  17. label = "mzk-ex750np:green:wps";
  18. gpios = <&gpio0 10 1>;
  19. };
  20. rep {
  21. label = "mzk-ex750np:blue:rep";
  22. gpios = <&gpio2 16 1>;
  23. };
  24. wifi1 {
  25. label = "mzk-ex750np:blue:wifi1";
  26. gpios = <&gpio2 19 1>;
  27. };
  28. wifi2 {
  29. label = "mzk-ex750np:blue:wifi2";
  30. gpios = <&gpio2 18 1>;
  31. };
  32. wifi3 {
  33. label = "mzk-ex750np:blue:wifi3";
  34. gpios = <&gpio2 17 1>;
  35. };
  36. };
  37. gpio-keys-polled {
  38. compatible = "gpio-keys-polled";
  39. #address-cells = <1>;
  40. #size-cells = <0>;
  41. poll-interval = <20>;
  42. reset {
  43. label = "reset";
  44. gpios = <&gpio0 9 1>;
  45. linux,code = <0x198>;
  46. };
  47. wps {
  48. label = "wps";
  49. gpios = <&gpio0 13 0>;
  50. linux,code = <0x211>;
  51. };
  52. };
  53. };
  54. &gpio2 {
  55. status = "okay";
  56. };
  57. &gpio3 {
  58. status = "okay";
  59. };
  60. &spi0 {
  61. status = "okay";
  62. m25p80@0 {
  63. #address-cells = <1>;
  64. #size-cells = <1>;
  65. compatible = "jedec,spi-nor";
  66. reg = <0>;
  67. linux,modalias = "m25p80", "w25q64";
  68. spi-max-frequency = <10000000>;
  69. partition@0 {
  70. label = "u-boot";
  71. reg = <0x0 0x30000>;
  72. read-only;
  73. };
  74. partition@30000 {
  75. label = "u-boot-env";
  76. reg = <0x30000 0x10000>;
  77. read-only;
  78. };
  79. factory: partition@40000 {
  80. label = "factory";
  81. reg = <0x40000 0x10000>;
  82. read-only;
  83. };
  84. partition@50000 {
  85. label = "firmware";
  86. reg = <0x50000 0x730000>;
  87. };
  88. partition@780000 {
  89. label = "Udata";
  90. reg = <0x780000 0x80000>;
  91. };
  92. };
  93. };
  94. &pinctrl {
  95. state_default: pinctrl0 {
  96. gpio {
  97. ralink,group = "uartf", "nd_sd", "rgmii2", "wled";
  98. ralink,function = "gpio";
  99. };
  100. };
  101. };
  102. &ethernet {
  103. pinctrl-names = "default";
  104. pinctrl-0 = <&ephy_pins>;
  105. mtd-mac-address = <&factory 0x4>;
  106. mediatek,portmap = "llllw";
  107. };
  108. &wmac {
  109. ralink,mtd-eeprom = <&factory 0>;
  110. };
  111. &pcie {
  112. status = "okay";
  113. pcie-bridge {
  114. mt76@0,0 {
  115. reg = <0x0000 0 0 0 0>;
  116. device_type = "pci";
  117. mediatek,mtd-eeprom = <&factory 0x8000>;
  118. mediatek,2ghz = <0>;
  119. };
  120. };
  121. };