PSG1218.dts 1.8 KB

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  1. /dts-v1/;
  2. #include "mt7620a.dtsi"
  3. / {
  4. compatible = "PSG1218", "ralink,mt7620a-soc";
  5. model = "Phicomm PSG1218";
  6. gpio-leds {
  7. compatible = "gpio-leds";
  8. blue {
  9. label = "psg1218:blue:status";
  10. gpios = <&gpio0 10 1>;
  11. };
  12. yellow {
  13. label = "psg1218:yellow:status";
  14. gpios = <&gpio0 11 1>;
  15. };
  16. red {
  17. label = "psg1218:red:status";
  18. gpios = <&gpio0 8 0>;
  19. };
  20. };
  21. gpio-keys-polled {
  22. compatible = "gpio-keys-polled";
  23. #address-cells = <1>;
  24. #size-cells = <0>;
  25. poll-interval = <20>;
  26. reset {
  27. label = "reset";
  28. gpios = <&gpio0 1 1>;
  29. linux,code = <0x198>;
  30. };
  31. };
  32. };
  33. &gpio0 {
  34. status = "okay";
  35. };
  36. &spi0 {
  37. status = "okay";
  38. m25p80@0 {
  39. #address-cells = <1>;
  40. #size-cells = <1>;
  41. compatible = "jedec,spi-nor";
  42. reg = <0>;
  43. linux,modalias = "m25p80", "en25q64";
  44. spi-max-frequency = <10000000>;
  45. partition@0 {
  46. label = "u-boot";
  47. reg = <0x0 0x30000>;
  48. read-only;
  49. };
  50. partition@20000 {
  51. label = "u-boot-env";
  52. reg = <0x30000 0x10000>;
  53. read-only;
  54. };
  55. factory: partition@30000 {
  56. label = "factory";
  57. reg = <0x40000 0x10000>;
  58. read-only;
  59. };
  60. partition@40000 {
  61. label = "firmware";
  62. reg = <0x50000 0x7b0000>;
  63. };
  64. };
  65. };
  66. &pinctrl {
  67. state_default: pinctrl0 {
  68. gpio {
  69. ralink,group = "i2c", "uartf", "rgmii1", "rgmii2", "ephy", "wled", "nd_sd";
  70. ralink,function = "gpio";
  71. };
  72. pa {
  73. ralink,group = "pa";
  74. ralink,function = "pa";
  75. };
  76. };
  77. };
  78. &ethernet {
  79. pinctrl-names = "default";
  80. pinctrl-0 = <&ephy_pins>;
  81. mtd-mac-address = <&factory 0x28>;
  82. mediatek,portmap = "llllw";
  83. };
  84. &pcie {
  85. status = "okay";
  86. pcie-bridge {
  87. mt76@0,0 {
  88. reg = <0x0000 0 0 0 0>;
  89. device_type = "pci";
  90. mediatek,mtd-eeprom = <&factory 0x8000>;
  91. mediatek,2ghz = <0>;
  92. };
  93. };
  94. };
  95. &wmac {
  96. ralink,mtd-eeprom = <&factory 0>;
  97. };