VOCORE.dtsi 3.2 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196
  1. #include "rt5350.dtsi"
  2. / {
  3. compatible = "VoCore", "ralink,rt5350-soc";
  4. model = "VoCore";
  5. gpio-export {
  6. compatible = "gpio-export";
  7. #size-cells = <0>;
  8. gpio0 {
  9. gpio-export,name = "gpio0";
  10. gpio-export,direction_may_change = <1>;
  11. gpios = <&gpio0 0 0>;
  12. };
  13. /* UARTF */
  14. gpio7 {
  15. /* UARTF_RTS_N */
  16. gpio-export,name = "gpio7";
  17. gpio-export,direction_may_change = <1>;
  18. gpios = <&gpio0 7 0>;
  19. };
  20. gpio8 {
  21. /* UARTF_TXD */
  22. gpio-export,name = "gpio8";
  23. gpio-export,direction_may_change = <1>;
  24. gpios = <&gpio0 8 0>;
  25. };
  26. gpio9 {
  27. /* UARTF_CTS_N */
  28. gpio-export,name = "gpio9";
  29. gpio-export,direction_may_change = <1>;
  30. gpios = <&gpio0 9 0>;
  31. };
  32. gpio12 {
  33. /* UARTF_DCD_N */
  34. gpio-export,name = "gpio12";
  35. gpio-export,direction_may_change = <1>;
  36. gpios = <&gpio0 12 0>;
  37. };
  38. gpio13 {
  39. /* UARTF_DSR_N */
  40. gpio-export,name = "gpio13";
  41. gpio-export,direction_may_change = <1>;
  42. gpios = <&gpio0 13 0>;
  43. };
  44. gpio14 {
  45. /* UARTF_RIN */
  46. gpio-export,name = "gpio14";
  47. gpio-export,direction_may_change = <1>;
  48. gpios = <&gpio0 14 0>;
  49. };
  50. /* JTAG */
  51. gpio17 {
  52. /* JTAG_TDO */
  53. gpio-export,name = "gpio17";
  54. gpio-export,direction_may_change = <1>;
  55. gpios = <&gpio0 17 0>;
  56. };
  57. gpio18 {
  58. /* JTAG_TDI */
  59. gpio-export,name = "gpio18";
  60. gpio-export,direction_may_change = <1>;
  61. gpios = <&gpio0 18 0>;
  62. };
  63. gpio19 {
  64. /* JTAG_TMS */
  65. gpio-export,name = "gpio19";
  66. gpio-export,direction_may_change = <1>;
  67. gpios = <&gpio0 19 0>;
  68. };
  69. gpio20 {
  70. /* JTAG_TCLK */
  71. gpio-export,name = "gpio20";
  72. gpio-export,direction_may_change = <1>;
  73. gpios = <&gpio0 20 0>;
  74. };
  75. gpio21 {
  76. /* JTAG_TRST_N */
  77. gpio-export,name = "gpio21";
  78. gpio-export,direction_may_change = <1>;
  79. gpios = <&gpio0 21 0>;
  80. };
  81. /* ETH LEDs */
  82. gpio22 {
  83. /* ETH0_LED */
  84. gpio-export,name = "gpio22";
  85. gpio-export,direction_may_change = <1>;
  86. gpios = <&gpio1 0 0>;
  87. };
  88. gpio23 {
  89. /* ETH1_LED */
  90. gpio-export,name = "gpio23";
  91. gpio-export,direction_may_change = <1>;
  92. gpios = <&gpio1 1 0>;
  93. };
  94. gpio24 {
  95. /* ETH2_LED */
  96. gpio-export,name = "gpio24";
  97. gpio-export,direction_may_change = <1>;
  98. gpios = <&gpio1 2 0>;
  99. };
  100. gpio25 {
  101. /* ETH3_LED */
  102. gpio-export,name = "gpio25";
  103. gpio-export,direction_may_change = <1>;
  104. gpios = <&gpio1 3 0>;
  105. };
  106. gpio26 {
  107. /* ETH4_LED */
  108. gpio-export,name = "gpio26";
  109. gpio-export,direction_may_change = <1>;
  110. gpios = <&gpio1 4 0>;
  111. };
  112. };
  113. gpio-leds {
  114. compatible = "gpio-leds";
  115. status {
  116. /* UARTF_RXD */
  117. label = "vocore:green:status";
  118. gpios = <&gpio0 10 0>;
  119. };
  120. eth {
  121. /* UARTF_DTR_N */
  122. label = "vocore:orange:eth";
  123. gpios = <&gpio0 11 0>;
  124. };
  125. };
  126. };
  127. &gpio1 {
  128. status = "okay";
  129. };
  130. &i2c {
  131. status = "okay";
  132. };
  133. &pinctrl {
  134. state_default: pinctrl0 {
  135. gpio {
  136. ralink,group = "jtag", "uartf", "led";
  137. ralink,function = "gpio";
  138. };
  139. };
  140. };
  141. &ethernet {
  142. mtd-mac-address = <&factory 0x4>;
  143. };
  144. &esw {
  145. mediatek,portmap = <0x11>;
  146. mediatek,portdisable = <0x2e>;
  147. };
  148. &wmac {
  149. ralink,mtd-eeprom = <&factory 0>;
  150. };
  151. &ehci {
  152. status = "okay";
  153. };
  154. &ohci {
  155. status = "okay";
  156. };
  157. &spi1 {
  158. status = "okay";
  159. spidev@0 {
  160. compatible = "linux,spidev";
  161. spi-max-frequency = <10000000>;
  162. reg = <0>;
  163. };
  164. };