105-mfd-axp20x-add-axp152-support.patch 7.9 KB

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  1. From a50e5abe10c95108ece5d3a91027570e66b5f238 Mon Sep 17 00:00:00 2001
  2. From: Michal Suchanek <hramrach@gmail.com>
  3. Date: Sat, 11 Jul 2015 14:59:56 +0200
  4. Subject: [PATCH] mfd: axp20x: Add axp152 support
  5. The axp152 is a stripped down version of the axp202 pmic with the battery
  6. charging function removed as it is intended for top-set boxes.
  7. Signed-off-by: Michal Suchanek <hramrach@gmail.com>
  8. Signed-off-by: Hans de Goede <hdegoede@redhat.com>
  9. Signed-off-by: Lee Jones <lee.jones@linaro.org>
  10. ---
  11. drivers/mfd/axp20x.c | 83 ++++++++++++++++++++++++++++++++++++++++++++++
  12. include/linux/mfd/axp20x.h | 61 +++++++++++++++++++++++++++++++++-
  13. 2 files changed, 143 insertions(+), 1 deletion(-)
  14. --- a/drivers/mfd/axp20x.c
  15. +++ b/drivers/mfd/axp20x.c
  16. @@ -30,12 +30,34 @@
  17. #define AXP20X_OFF 0x80
  18. static const char * const axp20x_model_names[] = {
  19. + "AXP152",
  20. "AXP202",
  21. "AXP209",
  22. "AXP221",
  23. "AXP288",
  24. };
  25. +static const struct regmap_range axp152_writeable_ranges[] = {
  26. + regmap_reg_range(AXP152_LDO3456_DC1234_CTRL, AXP152_IRQ3_STATE),
  27. + regmap_reg_range(AXP152_DCDC_MODE, AXP152_PWM1_DUTY_CYCLE),
  28. +};
  29. +
  30. +static const struct regmap_range axp152_volatile_ranges[] = {
  31. + regmap_reg_range(AXP152_PWR_OP_MODE, AXP152_PWR_OP_MODE),
  32. + regmap_reg_range(AXP152_IRQ1_EN, AXP152_IRQ3_STATE),
  33. + regmap_reg_range(AXP152_GPIO_INPUT, AXP152_GPIO_INPUT),
  34. +};
  35. +
  36. +static const struct regmap_access_table axp152_writeable_table = {
  37. + .yes_ranges = axp152_writeable_ranges,
  38. + .n_yes_ranges = ARRAY_SIZE(axp152_writeable_ranges),
  39. +};
  40. +
  41. +static const struct regmap_access_table axp152_volatile_table = {
  42. + .yes_ranges = axp152_volatile_ranges,
  43. + .n_yes_ranges = ARRAY_SIZE(axp152_volatile_ranges),
  44. +};
  45. +
  46. static const struct regmap_range axp20x_writeable_ranges[] = {
  47. regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_IRQ5_STATE),
  48. regmap_reg_range(AXP20X_DCDC_MODE, AXP20X_FG_RES),
  49. @@ -99,6 +121,11 @@ static const struct regmap_access_table
  50. .n_yes_ranges = ARRAY_SIZE(axp288_volatile_ranges),
  51. };
  52. +static struct resource axp152_pek_resources[] = {
  53. + DEFINE_RES_IRQ_NAMED(AXP152_IRQ_PEK_RIS_EDGE, "PEK_DBR"),
  54. + DEFINE_RES_IRQ_NAMED(AXP152_IRQ_PEK_FAL_EDGE, "PEK_DBF"),
  55. +};
  56. +
  57. static struct resource axp20x_pek_resources[] = {
  58. {
  59. .name = "PEK_DBR",
  60. @@ -160,6 +187,15 @@ static struct resource axp288_fuel_gauge
  61. },
  62. };
  63. +static const struct regmap_config axp152_regmap_config = {
  64. + .reg_bits = 8,
  65. + .val_bits = 8,
  66. + .wr_table = &axp152_writeable_table,
  67. + .volatile_table = &axp152_volatile_table,
  68. + .max_register = AXP152_PWM1_DUTY_CYCLE,
  69. + .cache_type = REGCACHE_RBTREE,
  70. +};
  71. +
  72. static const struct regmap_config axp20x_regmap_config = {
  73. .reg_bits = 8,
  74. .val_bits = 8,
  75. @@ -190,6 +226,26 @@ static const struct regmap_config axp288
  76. #define INIT_REGMAP_IRQ(_variant, _irq, _off, _mask) \
  77. [_variant##_IRQ_##_irq] = { .reg_offset = (_off), .mask = BIT(_mask) }
  78. +static const struct regmap_irq axp152_regmap_irqs[] = {
  79. + INIT_REGMAP_IRQ(AXP152, LDO0IN_CONNECT, 0, 6),
  80. + INIT_REGMAP_IRQ(AXP152, LDO0IN_REMOVAL, 0, 5),
  81. + INIT_REGMAP_IRQ(AXP152, ALDO0IN_CONNECT, 0, 3),
  82. + INIT_REGMAP_IRQ(AXP152, ALDO0IN_REMOVAL, 0, 2),
  83. + INIT_REGMAP_IRQ(AXP152, DCDC1_V_LOW, 1, 5),
  84. + INIT_REGMAP_IRQ(AXP152, DCDC2_V_LOW, 1, 4),
  85. + INIT_REGMAP_IRQ(AXP152, DCDC3_V_LOW, 1, 3),
  86. + INIT_REGMAP_IRQ(AXP152, DCDC4_V_LOW, 1, 2),
  87. + INIT_REGMAP_IRQ(AXP152, PEK_SHORT, 1, 1),
  88. + INIT_REGMAP_IRQ(AXP152, PEK_LONG, 1, 0),
  89. + INIT_REGMAP_IRQ(AXP152, TIMER, 2, 7),
  90. + INIT_REGMAP_IRQ(AXP152, PEK_RIS_EDGE, 2, 6),
  91. + INIT_REGMAP_IRQ(AXP152, PEK_FAL_EDGE, 2, 5),
  92. + INIT_REGMAP_IRQ(AXP152, GPIO3_INPUT, 2, 3),
  93. + INIT_REGMAP_IRQ(AXP152, GPIO2_INPUT, 2, 2),
  94. + INIT_REGMAP_IRQ(AXP152, GPIO1_INPUT, 2, 1),
  95. + INIT_REGMAP_IRQ(AXP152, GPIO0_INPUT, 2, 0),
  96. +};
  97. +
  98. static const struct regmap_irq axp20x_regmap_irqs[] = {
  99. INIT_REGMAP_IRQ(AXP20X, ACIN_OVER_V, 0, 7),
  100. INIT_REGMAP_IRQ(AXP20X, ACIN_PLUGIN, 0, 6),
  101. @@ -299,6 +355,7 @@ static const struct regmap_irq axp288_re
  102. };
  103. static const struct of_device_id axp20x_of_match[] = {
  104. + { .compatible = "x-powers,axp152", .data = (void *) AXP152_ID },
  105. { .compatible = "x-powers,axp202", .data = (void *) AXP202_ID },
  106. { .compatible = "x-powers,axp209", .data = (void *) AXP209_ID },
  107. { .compatible = "x-powers,axp221", .data = (void *) AXP221_ID },
  108. @@ -323,6 +380,18 @@ static const struct acpi_device_id axp20
  109. };
  110. MODULE_DEVICE_TABLE(acpi, axp20x_acpi_match);
  111. +static const struct regmap_irq_chip axp152_regmap_irq_chip = {
  112. + .name = "axp152_irq_chip",
  113. + .status_base = AXP152_IRQ1_STATE,
  114. + .ack_base = AXP152_IRQ1_STATE,
  115. + .mask_base = AXP152_IRQ1_EN,
  116. + .mask_invert = true,
  117. + .init_ack_masked = true,
  118. + .irqs = axp152_regmap_irqs,
  119. + .num_irqs = ARRAY_SIZE(axp152_regmap_irqs),
  120. + .num_regs = 3,
  121. +};
  122. +
  123. static const struct regmap_irq_chip axp20x_regmap_irq_chip = {
  124. .name = "axp20x_irq_chip",
  125. .status_base = AXP20X_IRQ1_STATE,
  126. @@ -381,6 +450,14 @@ static struct mfd_cell axp22x_cells[] =
  127. },
  128. };
  129. +static struct mfd_cell axp152_cells[] = {
  130. + {
  131. + .name = "axp20x-pek",
  132. + .num_resources = ARRAY_SIZE(axp152_pek_resources),
  133. + .resources = axp152_pek_resources,
  134. + },
  135. +};
  136. +
  137. static struct resource axp288_adc_resources[] = {
  138. {
  139. .name = "GPADC",
  140. @@ -519,6 +596,12 @@ static int axp20x_match_device(struct ax
  141. }
  142. switch (axp20x->variant) {
  143. + case AXP152_ID:
  144. + axp20x->nr_cells = ARRAY_SIZE(axp152_cells);
  145. + axp20x->cells = axp152_cells;
  146. + axp20x->regmap_cfg = &axp152_regmap_config;
  147. + axp20x->regmap_irq_chip = &axp152_regmap_irq_chip;
  148. + break;
  149. case AXP202_ID:
  150. case AXP209_ID:
  151. axp20x->nr_cells = ARRAY_SIZE(axp20x_cells);
  152. --- a/include/linux/mfd/axp20x.h
  153. +++ b/include/linux/mfd/axp20x.h
  154. @@ -12,7 +12,8 @@
  155. #define __LINUX_MFD_AXP20X_H
  156. enum {
  157. - AXP202_ID = 0,
  158. + AXP152_ID = 0,
  159. + AXP202_ID,
  160. AXP209_ID,
  161. AXP221_ID,
  162. AXP288_ID,
  163. @@ -22,6 +23,24 @@ enum {
  164. #define AXP20X_DATACACHE(m) (0x04 + (m))
  165. /* Power supply */
  166. +#define AXP152_PWR_OP_MODE 0x01
  167. +#define AXP152_LDO3456_DC1234_CTRL 0x12
  168. +#define AXP152_ALDO_OP_MODE 0x13
  169. +#define AXP152_LDO0_CTRL 0x15
  170. +#define AXP152_DCDC2_V_OUT 0x23
  171. +#define AXP152_DCDC2_V_SCAL 0x25
  172. +#define AXP152_DCDC1_V_OUT 0x26
  173. +#define AXP152_DCDC3_V_OUT 0x27
  174. +#define AXP152_ALDO12_V_OUT 0x28
  175. +#define AXP152_DLDO1_V_OUT 0x29
  176. +#define AXP152_DLDO2_V_OUT 0x2a
  177. +#define AXP152_DCDC4_V_OUT 0x2b
  178. +#define AXP152_V_OFF 0x31
  179. +#define AXP152_OFF_CTRL 0x32
  180. +#define AXP152_PEK_KEY 0x36
  181. +#define AXP152_DCDC_FREQ 0x37
  182. +#define AXP152_DCDC_MODE 0x80
  183. +
  184. #define AXP20X_PWR_INPUT_STATUS 0x00
  185. #define AXP20X_PWR_OP_MODE 0x01
  186. #define AXP20X_USB_OTG_STATUS 0x02
  187. @@ -69,6 +88,13 @@ enum {
  188. #define AXP22X_CHRG_CTRL3 0x35
  189. /* Interrupt */
  190. +#define AXP152_IRQ1_EN 0x40
  191. +#define AXP152_IRQ2_EN 0x41
  192. +#define AXP152_IRQ3_EN 0x42
  193. +#define AXP152_IRQ1_STATE 0x48
  194. +#define AXP152_IRQ2_STATE 0x49
  195. +#define AXP152_IRQ3_STATE 0x4a
  196. +
  197. #define AXP20X_IRQ1_EN 0x40
  198. #define AXP20X_IRQ2_EN 0x41
  199. #define AXP20X_IRQ3_EN 0x42
  200. @@ -127,6 +153,19 @@ enum {
  201. #define AXP22X_PWREN_CTRL2 0x8d
  202. /* GPIO */
  203. +#define AXP152_GPIO0_CTRL 0x90
  204. +#define AXP152_GPIO1_CTRL 0x91
  205. +#define AXP152_GPIO2_CTRL 0x92
  206. +#define AXP152_GPIO3_CTRL 0x93
  207. +#define AXP152_LDOGPIO2_V_OUT 0x96
  208. +#define AXP152_GPIO_INPUT 0x97
  209. +#define AXP152_PWM0_FREQ_X 0x98
  210. +#define AXP152_PWM0_FREQ_Y 0x99
  211. +#define AXP152_PWM0_DUTY_CYCLE 0x9a
  212. +#define AXP152_PWM1_FREQ_X 0x9b
  213. +#define AXP152_PWM1_FREQ_Y 0x9c
  214. +#define AXP152_PWM1_DUTY_CYCLE 0x9d
  215. +
  216. #define AXP20X_GPIO0_CTRL 0x90
  217. #define AXP20X_LDO5_V_OUT 0x91
  218. #define AXP20X_GPIO1_CTRL 0x92
  219. @@ -224,6 +263,26 @@ enum {
  220. /* IRQs */
  221. enum {
  222. + AXP152_IRQ_LDO0IN_CONNECT = 1,
  223. + AXP152_IRQ_LDO0IN_REMOVAL,
  224. + AXP152_IRQ_ALDO0IN_CONNECT,
  225. + AXP152_IRQ_ALDO0IN_REMOVAL,
  226. + AXP152_IRQ_DCDC1_V_LOW,
  227. + AXP152_IRQ_DCDC2_V_LOW,
  228. + AXP152_IRQ_DCDC3_V_LOW,
  229. + AXP152_IRQ_DCDC4_V_LOW,
  230. + AXP152_IRQ_PEK_SHORT,
  231. + AXP152_IRQ_PEK_LONG,
  232. + AXP152_IRQ_TIMER,
  233. + AXP152_IRQ_PEK_RIS_EDGE,
  234. + AXP152_IRQ_PEK_FAL_EDGE,
  235. + AXP152_IRQ_GPIO3_INPUT,
  236. + AXP152_IRQ_GPIO2_INPUT,
  237. + AXP152_IRQ_GPIO1_INPUT,
  238. + AXP152_IRQ_GPIO0_INPUT,
  239. +};
  240. +
  241. +enum {
  242. AXP20X_IRQ_ACIN_OVER_V = 1,
  243. AXP20X_IRQ_ACIN_PLUGIN,
  244. AXP20X_IRQ_ACIN_REMOVAL,