126-1-dt-sun4i-add-nand-ctrlpin-defs.patch 2.5 KB

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  1. From 00f9956384e3cf011e0d5ffd211847bf9336ec78 Mon Sep 17 00:00:00 2001
  2. From: Michal Suchanek <hramrach@gmail.com>
  3. Date: Tue, 26 May 2015 17:01:33 +0200
  4. Subject: [PATCH] ARM: dts: sun4i: Add NAND controller pin definitions
  5. Define the NAND controller pin configs.
  6. Signed-off-by: Michal Suchanek <hramrach@gmail.com>
  7. Signed-off-by: Hans de Goede <hdegoede@redhat.com>
  8. ---
  9. arch/arm/boot/dts/sun4i-a10.dtsi | 80 ++++++++++++++++++++++++++++++++++++++++
  10. 1 file changed, 80 insertions(+)
  11. --- a/arch/arm/boot/dts/sun4i-a10.dtsi
  12. +++ b/arch/arm/boot/dts/sun4i-a10.dtsi
  13. @@ -774,6 +774,86 @@
  14. allwinner,drive = <SUN4I_PINCTRL_10_MA>;
  15. allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
  16. };
  17. +
  18. + nand_pins_a: nand_base0@0 {
  19. + allwinner,pins = "PC0", "PC1", "PC2",
  20. + "PC5", "PC8", "PC9", "PC10",
  21. + "PC11", "PC12", "PC13", "PC14",
  22. + "PC15", "PC16";
  23. + allwinner,function = "nand0";
  24. + allwinner,drive = <0>;
  25. + allwinner,pull = <0>;
  26. + };
  27. +
  28. + nand_cs0_pins_a: nand_cs@0 {
  29. + allwinner,pins = "PC4";
  30. + allwinner,function = "nand0";
  31. + allwinner,drive = <0>;
  32. + allwinner,pull = <0>;
  33. + };
  34. +
  35. + nand_cs1_pins_a: nand_cs@1 {
  36. + allwinner,pins = "PC3";
  37. + allwinner,function = "nand0";
  38. + allwinner,drive = <0>;
  39. + allwinner,pull = <0>;
  40. + };
  41. +
  42. + nand_cs2_pins_a: nand_cs@2 {
  43. + allwinner,pins = "PC17";
  44. + allwinner,function = "nand0";
  45. + allwinner,drive = <0>;
  46. + allwinner,pull = <0>;
  47. + };
  48. +
  49. + nand_cs3_pins_a: nand_cs@3 {
  50. + allwinner,pins = "PC18";
  51. + allwinner,function = "nand0";
  52. + allwinner,drive = <0>;
  53. + allwinner,pull = <0>;
  54. + };
  55. +
  56. + nand_cs4_pins_a: nand_cs@4 {
  57. + allwinner,pins = "PC19";
  58. + allwinner,function = "nand0";
  59. + allwinner,drive = <0>;
  60. + allwinner,pull = <0>;
  61. + };
  62. +
  63. + nand_cs5_pins_a: nand_cs@5 {
  64. + allwinner,pins = "PC20";
  65. + allwinner,function = "nand0";
  66. + allwinner,drive = <0>;
  67. + allwinner,pull = <0>;
  68. + };
  69. +
  70. + nand_cs6_pins_a: nand_cs@6 {
  71. + allwinner,pins = "PC21";
  72. + allwinner,function = "nand0";
  73. + allwinner,drive = <0>;
  74. + allwinner,pull = <0>;
  75. + };
  76. +
  77. + nand_cs7_pins_a: nand_cs@7 {
  78. + allwinner,pins = "PC22";
  79. + allwinner,function = "nand0";
  80. + allwinner,drive = <0>;
  81. + allwinner,pull = <0>;
  82. + };
  83. +
  84. + nand_rb0_pins_a: nand_rb@0 {
  85. + allwinner,pins = "PC6";
  86. + allwinner,function = "nand0";
  87. + allwinner,drive = <0>;
  88. + allwinner,pull = <0>;
  89. + };
  90. +
  91. + nand_rb1_pins_a: nand_rb@1 {
  92. + allwinner,pins = "PC7";
  93. + allwinner,function = "nand0";
  94. + allwinner,drive = <0>;
  95. + allwinner,pull = <0>;
  96. + };
  97. };
  98. timer@01c20c00 {