0006-sf-add-support-for-4-byte-addressing.patch 4.6 KB

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  1. From 3af3addee645bd81537be1ddee49969f8dfc64ee Mon Sep 17 00:00:00 2001
  2. From: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
  3. Date: Sun, 13 Oct 2013 15:24:56 +0200
  4. Subject: sf: add support for 4-byte addressing
  5. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
  6. --- a/drivers/mtd/spi/sf_internal.h
  7. +++ b/drivers/mtd/spi/sf_internal.h
  8. @@ -38,12 +38,14 @@
  9. #define CMD_READ_ID 0x9f
  10. /* Bank addr access commands */
  11. -#ifdef CONFIG_SPI_FLASH_BAR
  12. -# define CMD_BANKADDR_BRWR 0x17
  13. -# define CMD_BANKADDR_BRRD 0x16
  14. -# define CMD_EXTNADDR_WREAR 0xC5
  15. -# define CMD_EXTNADDR_RDEAR 0xC8
  16. -#endif
  17. +#define CMD_BANKADDR_BRWR 0x17
  18. +#define CMD_BANKADDR_BRRD 0x16
  19. +#define CMD_EXTNADDR_WREAR 0xC5
  20. +#define CMD_EXTNADDR_RDEAR 0xC8
  21. +
  22. +/* Macronix style 4-byte addressing */
  23. +#define CMD_EN4B 0xb7
  24. +#define CMD_EX4B 0xe9
  25. /* Common status */
  26. #define STATUS_WIP 0x01
  27. --- a/drivers/mtd/spi/sf_ops.c
  28. +++ b/drivers/mtd/spi/sf_ops.c
  29. @@ -21,6 +21,7 @@ static void spi_flash_addr(const struct
  30. cmd[1] = addr >> (flash->addr_width * 8 - 8);
  31. cmd[2] = addr >> (flash->addr_width * 8 - 16);
  32. cmd[3] = addr >> (flash->addr_width * 8 - 24);
  33. + cmd[4] = addr >> (flash->addr_width * 8 - 32);
  34. }
  35. static int spi_flash_cmdsz(const struct spi_flash *flash)
  36. @@ -163,7 +164,7 @@ int spi_flash_write_common(struct spi_fl
  37. int spi_flash_cmd_erase_ops(struct spi_flash *flash, u32 offset, size_t len)
  38. {
  39. u32 erase_size;
  40. - u8 cmd[4], cmd_len;
  41. + u8 cmd[5], cmd_len;
  42. int ret = -1;
  43. erase_size = flash->erase_size;
  44. @@ -188,8 +189,8 @@ int spi_flash_cmd_erase_ops(struct spi_f
  45. spi_flash_addr(flash, offset, cmd);
  46. cmd_len = spi_flash_cmdsz(flash);
  47. - debug("SF: erase %2x %2x %2x %2x (%x)\n", cmd[0], cmd[1],
  48. - cmd[2], cmd[3], offset);
  49. + debug("SF: erase %2x %2x %2x %2x %2x (%x)\n", cmd[0], cmd[1],
  50. + cmd[2], cmd[3], cmd[4], offset);
  51. ret = spi_flash_write_common(flash, cmd, cmd_len, NULL, 0);
  52. if (ret < 0) {
  53. @@ -212,7 +213,7 @@ int spi_flash_cmd_write_ops(struct spi_f
  54. {
  55. unsigned long byte_addr, page_size;
  56. size_t chunk_len, actual;
  57. - u8 cmd[4], cmd_len;
  58. + u8 cmd[5], cmd_len;
  59. int ret = -1;
  60. ret = spi_claim_bus(flash->spi);
  61. @@ -239,8 +240,8 @@ int spi_flash_cmd_write_ops(struct spi_f
  62. spi_flash_addr(flash, offset, cmd);
  63. cmd_len = spi_flash_cmdsz(flash);
  64. - debug("PP: 0x%p => cmd = { 0x%02x 0x%02x%02x%02x } chunk_len = %zu\n",
  65. - buf + actual, cmd[0], cmd[1], cmd[2], cmd[3], chunk_len);
  66. + debug("PP: 0x%p => cmd = { 0x%02x 0x%02x%02x%02x%02x } chunk_len = %zu\n",
  67. + buf + actual, cmd[0], cmd[1], cmd[2], cmd[3], cmd[4], chunk_len);
  68. ret = spi_flash_write_common(flash, cmd, cmd_len,
  69. buf + actual, chunk_len);
  70. @@ -276,9 +277,13 @@ int spi_flash_read_common(struct spi_fla
  71. int spi_flash_cmd_read_ops(struct spi_flash *flash, u32 offset,
  72. size_t len, void *data)
  73. {
  74. - u8 cmd[5], cmd_len, bank_sel = 0;
  75. - u32 remain_len, read_len;
  76. + u8 cmd[6], cmd_len;
  77. + u32 read_len;
  78. int ret = -1;
  79. +#ifdef CONFIG_SPI_FLASH_BAR
  80. + u8 bank_sel = 0;
  81. + u32 remain_len;
  82. +#endif
  83. ret = spi_claim_bus(flash->spi);
  84. if (ret) {
  85. @@ -305,12 +310,15 @@ int spi_flash_cmd_read_ops(struct spi_fl
  86. debug("SF: fail to set bank%d\n", bank_sel);
  87. goto done;
  88. }
  89. -#endif
  90. +
  91. remain_len = (SPI_FLASH_16MB_BOUN * (bank_sel + 1)) - offset;
  92. if (len < remain_len)
  93. read_len = len;
  94. else
  95. read_len = remain_len;
  96. +#else
  97. + read_len = len;
  98. +#endif
  99. spi_flash_addr(flash, offset, cmd);
  100. cmd_len = spi_flash_cmdsz(flash);
  101. --- a/drivers/mtd/spi/sf_probe.c
  102. +++ b/drivers/mtd/spi/sf_probe.c
  103. @@ -153,6 +153,25 @@ static const struct spi_flash_params spi
  104. */
  105. };
  106. +int spi_flash_4byte_set(struct spi_flash *flash, u8 idcode0, int enable)
  107. +{
  108. + u8 cmd, bankaddr;
  109. +
  110. + switch (idcode0) {
  111. + case 0xc2:
  112. + case 0xef:
  113. + case 0x1c:
  114. + /* Macronix style */
  115. + cmd = enable ? CMD_EN4B : CMD_EX4B;
  116. + return spi_flash_cmd(flash->spi, cmd, NULL, 0);
  117. + default:
  118. + /* Spansion style */
  119. + cmd = CMD_BANKADDR_BRWR;
  120. + bankaddr = enable << 7;
  121. + return spi_flash_cmd_write(flash->spi, &cmd, 1, &bankaddr, 1);
  122. + }
  123. +}
  124. +
  125. static int spi_flash_validate_params(struct spi_flash *flash,
  126. u8 *idcode)
  127. {
  128. @@ -218,8 +237,18 @@ static int spi_flash_validate_params(str
  129. flash->poll_cmd = CMD_FLAG_STATUS;
  130. #endif
  131. +#ifndef CONFIG_SPI_FLASH_BAR
  132. + /* enable 4-byte addressing if the device exceeds 16MiB */
  133. + if (flash->size > SPI_FLASH_16MB_BOUN) {
  134. + flash->addr_width = 4;
  135. + spi_flash_4byte_set(flash, idcode[0], 1);
  136. + } else {
  137. + flash->addr_width = 3;
  138. + }
  139. +#else
  140. /* Configure default 3-byte addressing */
  141. flash->addr_width = 3;
  142. +#endif
  143. /* Configure the BAR - discover bank cmds and read current bank */
  144. #ifdef CONFIG_SPI_FLASH_BAR