hifnHIPPvar.h 3.3 KB

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  1. /*
  2. * Hifn HIPP-I/HIPP-II (7855/8155) driver.
  3. * Copyright (c) 2006 Michael Richardson <mcr@xelerance.com> *
  4. *
  5. * Redistribution and use in source and binary forms, with or without
  6. * modification, are permitted provided that the following conditions
  7. * are met:
  8. *
  9. * 1. Redistributions of source code must retain the above copyright
  10. * notice, this list of conditions and the following disclaimer.
  11. * 2. Redistributions in binary form must reproduce the above copyright
  12. * notice, this list of conditions and the following disclaimer in the
  13. * documentation and/or other materials provided with the distribution.
  14. * 3. The name of the author may not be used to endorse or promote products
  15. * derived from this software without specific prior written permission.
  16. *
  17. *
  18. * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  19. * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  20. * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  21. * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  22. * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  23. * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  24. * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  25. * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  26. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  27. * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  28. *
  29. * Effort sponsored by Hifn inc.
  30. *
  31. */
  32. #ifndef __HIFNHIPPVAR_H__
  33. #define __HIFNHIPPVAR_H__
  34. #define HIPP_MAX_CHIPS 8
  35. /*
  36. * Holds data specific to a single Hifn HIPP-I board.
  37. */
  38. struct hipp_softc {
  39. softc_device_decl sc_dev;
  40. struct pci_dev *sc_pcidev; /* device backpointer */
  41. ocf_iomem_t sc_bar[5];
  42. caddr_t sc_barphy[5]; /* physical address */
  43. int sc_num; /* for multiple devs */
  44. spinlock_t sc_mtx; /* per-instance lock */
  45. int32_t sc_cid;
  46. int sc_irq;
  47. #if 0
  48. u_int32_t sc_dmaier;
  49. u_int32_t sc_drammodel; /* 1=dram, 0=sram */
  50. u_int32_t sc_pllconfig; /* 7954/7955/7956 PLL config */
  51. struct hifn_dma *sc_dma;
  52. dma_addr_t sc_dma_physaddr;/* physical address of sc_dma */
  53. int sc_dmansegs;
  54. int sc_maxses;
  55. int sc_nsessions;
  56. struct hifn_session *sc_sessions;
  57. int sc_ramsize;
  58. int sc_flags;
  59. #define HIFN_HAS_RNG 0x1 /* includes random number generator */
  60. #define HIFN_HAS_PUBLIC 0x2 /* includes public key support */
  61. #define HIFN_HAS_AES 0x4 /* includes AES support */
  62. #define HIFN_IS_7811 0x8 /* Hifn 7811 part */
  63. #define HIFN_IS_7956 0x10 /* Hifn 7956/7955 don't have SDRAM */
  64. struct timer_list sc_tickto; /* for managing DMA */
  65. int sc_rngfirst;
  66. int sc_rnghz; /* RNG polling frequency */
  67. int sc_c_busy; /* command ring busy */
  68. int sc_s_busy; /* source data ring busy */
  69. int sc_d_busy; /* destination data ring busy */
  70. int sc_r_busy; /* result ring busy */
  71. int sc_active; /* for initial countdown */
  72. int sc_needwakeup; /* ops q'd wating on resources */
  73. int sc_curbatch; /* # ops submitted w/o int */
  74. int sc_suspended;
  75. struct miscdevice sc_miscdev;
  76. #endif
  77. };
  78. #define HIPP_LOCK(_sc) spin_lock_irqsave(&(_sc)->sc_mtx, l_flags)
  79. #define HIPP_UNLOCK(_sc) spin_unlock_irqrestore(&(_sc)->sc_mtx, l_flags)
  80. #endif /* __HIFNHIPPVAR_H__ */