140-MIPS-OCTEON-Update-octeon-model.h-code-for-new-SoCs.patch 4.4 KB

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  1. --- a/arch/mips/include/asm/octeon/octeon-model.h
  2. +++ b/arch/mips/include/asm/octeon/octeon-model.h
  3. @@ -45,6 +45,7 @@
  4. */
  5. #define OCTEON_FAMILY_MASK 0x00ffff00
  6. +#define OCTEON_PRID_MASK 0x00ffffff
  7. /* Flag bits in top byte */
  8. /* Ignores revision in model checks */
  9. @@ -63,6 +64,46 @@
  10. #define OM_MATCH_6XXX_FAMILY_MODELS 0x40000000
  11. /* Match all cnf7XXX Octeon models. */
  12. #define OM_MATCH_F7XXX_FAMILY_MODELS 0x80000000
  13. +/* Match all cn7XXX Octeon models. */
  14. +#define OM_MATCH_7XXX_FAMILY_MODELS 0x10000000
  15. +#define OM_MATCH_FAMILY_MODELS (OM_MATCH_5XXX_FAMILY_MODELS | \
  16. + OM_MATCH_6XXX_FAMILY_MODELS | \
  17. + OM_MATCH_F7XXX_FAMILY_MODELS | \
  18. + OM_MATCH_7XXX_FAMILY_MODELS)
  19. +/*
  20. + * CN7XXX models with new revision encoding
  21. + */
  22. +
  23. +#define OCTEON_CN73XX_PASS1_0 0x000d9700
  24. +#define OCTEON_CN73XX (OCTEON_CN73XX_PASS1_0 | OM_IGNORE_REVISION)
  25. +#define OCTEON_CN73XX_PASS1_X (OCTEON_CN73XX_PASS1_0 | \
  26. + OM_IGNORE_MINOR_REVISION)
  27. +
  28. +#define OCTEON_CN70XX_PASS1_0 0x000d9600
  29. +#define OCTEON_CN70XX_PASS1_1 0x000d9601
  30. +#define OCTEON_CN70XX_PASS1_2 0x000d9602
  31. +
  32. +#define OCTEON_CN70XX_PASS2_0 0x000d9608
  33. +
  34. +#define OCTEON_CN70XX (OCTEON_CN70XX_PASS1_0 | OM_IGNORE_REVISION)
  35. +#define OCTEON_CN70XX_PASS1_X (OCTEON_CN70XX_PASS1_0 | \
  36. + OM_IGNORE_MINOR_REVISION)
  37. +#define OCTEON_CN70XX_PASS2_X (OCTEON_CN70XX_PASS2_0 | \
  38. + OM_IGNORE_MINOR_REVISION)
  39. +
  40. +#define OCTEON_CN71XX OCTEON_CN70XX
  41. +
  42. +#define OCTEON_CN78XX_PASS1_0 0x000d9500
  43. +#define OCTEON_CN78XX_PASS1_1 0x000d9501
  44. +#define OCTEON_CN78XX_PASS2_0 0x000d9508
  45. +
  46. +#define OCTEON_CN78XX (OCTEON_CN78XX_PASS1_0 | OM_IGNORE_REVISION)
  47. +#define OCTEON_CN78XX_PASS1_X (OCTEON_CN78XX_PASS1_0 | \
  48. + OM_IGNORE_MINOR_REVISION)
  49. +#define OCTEON_CN78XX_PASS2_X (OCTEON_CN78XX_PASS2_0 | \
  50. + OM_IGNORE_MINOR_REVISION)
  51. +
  52. +#define OCTEON_CN76XX (0x000d9540 | OM_CHECK_SUBMODEL)
  53. /*
  54. * CNF7XXX models with new revision encoding
  55. @@ -217,6 +258,10 @@
  56. #define OCTEON_CN3XXX (OCTEON_CN58XX_PASS1_0 | OM_MATCH_PREVIOUS_MODELS | OM_IGNORE_REVISION)
  57. #define OCTEON_CN5XXX (OCTEON_CN58XX_PASS1_0 | OM_MATCH_5XXX_FAMILY_MODELS)
  58. #define OCTEON_CN6XXX (OCTEON_CN63XX_PASS1_0 | OM_MATCH_6XXX_FAMILY_MODELS)
  59. +#define OCTEON_CNF7XXX (OCTEON_CNF71XX_PASS1_0 | \
  60. + OM_MATCH_F7XXX_FAMILY_MODELS)
  61. +#define OCTEON_CN7XXX (OCTEON_CN78XX_PASS1_0 | \
  62. + OM_MATCH_7XXX_FAMILY_MODELS)
  63. /* These are used to cover entire families of OCTEON processors */
  64. #define OCTEON_FAM_1 (OCTEON_CN3XXX)
  65. @@ -288,9 +333,16 @@ static inline uint64_t cvmx_read_csr(uin
  66. ((((arg_model) & (OM_FLAG_MASK)) == OM_CHECK_SUBMODEL) \
  67. && __OCTEON_MATCH_MASK__((chip_model), (arg_model), OCTEON_58XX_MODEL_REV_MASK)) || \
  68. ((((arg_model) & (OM_MATCH_5XXX_FAMILY_MODELS)) == OM_MATCH_5XXX_FAMILY_MODELS) \
  69. - && ((chip_model) >= OCTEON_CN58XX_PASS1_0) && ((chip_model) < OCTEON_CN63XX_PASS1_0)) || \
  70. + && ((chip_model & OCTEON_PRID_MASK) >= OCTEON_CN58XX_PASS1_0) \
  71. + && ((chip_model & OCTEON_PRID_MASK) < OCTEON_CN63XX_PASS1_0)) || \
  72. ((((arg_model) & (OM_MATCH_6XXX_FAMILY_MODELS)) == OM_MATCH_6XXX_FAMILY_MODELS) \
  73. - && ((chip_model) >= OCTEON_CN63XX_PASS1_0)) || \
  74. + && ((chip_model & OCTEON_PRID_MASK) >= OCTEON_CN63XX_PASS1_0) \
  75. + && ((chip_model & OCTEON_PRID_MASK) < OCTEON_CNF71XX_PASS1_0)) || \
  76. + ((((arg_model) & (OM_MATCH_F7XXX_FAMILY_MODELS)) == OM_MATCH_F7XXX_FAMILY_MODELS) \
  77. + && ((chip_model & OCTEON_PRID_MASK) >= OCTEON_CNF71XX_PASS1_0) \
  78. + && ((chip_model & OCTEON_PRID_MASK) < OCTEON_CN78XX_PASS1_0)) || \
  79. + ((((arg_model) & (OM_MATCH_7XXX_FAMILY_MODELS)) == OM_MATCH_7XXX_FAMILY_MODELS) \
  80. + && ((chip_model & OCTEON_PRID_MASK) >= OCTEON_CN78XX_PASS1_0)) || \
  81. ((((arg_model) & (OM_MATCH_PREVIOUS_MODELS)) == OM_MATCH_PREVIOUS_MODELS) \
  82. && (((chip_model) & OCTEON_58XX_MODEL_MASK) < ((arg_model) & OCTEON_58XX_MODEL_MASK))) \
  83. )))
  84. @@ -326,6 +378,15 @@ static inline int __octeon_is_model_runt
  85. #define OCTEON_IS_COMMON_BINARY() 1
  86. #undef OCTEON_MODEL
  87. +#define OCTEON_IS_OCTEON1() OCTEON_IS_MODEL(OCTEON_CN3XXX)
  88. +#define OCTEON_IS_OCTEONPLUS() OCTEON_IS_MODEL(OCTEON_CN5XXX)
  89. +#define OCTEON_IS_OCTEON2() \
  90. + (OCTEON_IS_MODEL(OCTEON_CN6XXX) || OCTEON_IS_MODEL(OCTEON_CNF71XX))
  91. +
  92. +#define OCTEON_IS_OCTEON3() OCTEON_IS_MODEL(OCTEON_CN7XXX)
  93. +
  94. +#define OCTEON_IS_OCTEON1PLUS() (OCTEON_IS_OCTEON1() || OCTEON_IS_OCTEONPLUS())
  95. +
  96. const char *octeon_model_get_string(uint32_t chip_id);
  97. const char *octeon_model_get_string_buffer(uint32_t chip_id, char *buffer);