mt7620a.dtsi 8.7 KB

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  1. / {
  2. #address-cells = <1>;
  3. #size-cells = <1>;
  4. compatible = "ralink,mtk7620a-soc";
  5. cpus {
  6. cpu@0 {
  7. compatible = "mips,mips24KEc";
  8. };
  9. };
  10. chosen {
  11. bootargs = "console=ttyS0,57600";
  12. };
  13. cpuintc: cpuintc@0 {
  14. #address-cells = <0>;
  15. #interrupt-cells = <1>;
  16. interrupt-controller;
  17. compatible = "mti,cpu-interrupt-controller";
  18. };
  19. palmbus@10000000 {
  20. compatible = "palmbus";
  21. reg = <0x10000000 0x200000>;
  22. ranges = <0x0 0x10000000 0x1FFFFF>;
  23. #address-cells = <1>;
  24. #size-cells = <1>;
  25. sysc@0 {
  26. compatible = "ralink,mt7620a-sysc", "ralink,rt3050-sysc";
  27. reg = <0x0 0x100>;
  28. };
  29. timer@100 {
  30. compatible = "ralink,mt7620a-timer", "ralink,rt2880-timer";
  31. reg = <0x100 0x20>;
  32. interrupt-parent = <&intc>;
  33. interrupts = <1>;
  34. };
  35. watchdog@120 {
  36. compatible = "ralink,mt7620a-wdt", "ralink,rt2880-wdt";
  37. reg = <0x120 0x10>;
  38. resets = <&rstctrl 8>;
  39. reset-names = "wdt";
  40. interrupt-parent = <&intc>;
  41. interrupts = <1>;
  42. };
  43. intc: intc@200 {
  44. compatible = "ralink,mt7620a-intc", "ralink,rt2880-intc";
  45. reg = <0x200 0x100>;
  46. resets = <&rstctrl 19>;
  47. reset-names = "intc";
  48. interrupt-controller;
  49. #interrupt-cells = <1>;
  50. interrupt-parent = <&cpuintc>;
  51. interrupts = <2>;
  52. };
  53. memc@300 {
  54. compatible = "ralink,mt7620a-memc", "ralink,rt3050-memc";
  55. reg = <0x300 0x100>;
  56. resets = <&rstctrl 20>;
  57. reset-names = "mc";
  58. interrupt-parent = <&intc>;
  59. interrupts = <3>;
  60. };
  61. uart@500 {
  62. compatible = "ralink,mt7620a-uart", "ralink,rt2880-uart", "ns16550a";
  63. reg = <0x500 0x100>;
  64. resets = <&rstctrl 12>;
  65. reset-names = "uart";
  66. interrupt-parent = <&intc>;
  67. interrupts = <5>;
  68. reg-shift = <2>;
  69. status = "disabled";
  70. };
  71. gpio0: gpio@600 {
  72. compatible = "ralink,mt7620a-gpio", "ralink,rt2880-gpio";
  73. reg = <0x600 0x34>;
  74. resets = <&rstctrl 13>;
  75. reset-names = "pio";
  76. interrupt-parent = <&intc>;
  77. interrupts = <6>;
  78. gpio-controller;
  79. #gpio-cells = <2>;
  80. ralink,gpio-base = <0>;
  81. ralink,num-gpios = <24>;
  82. ralink,register-map = [ 00 04 08 0c
  83. 20 24 28 2c
  84. 30 34 ];
  85. };
  86. gpio1: gpio@638 {
  87. compatible = "ralink,mt7620a-gpio", "ralink,rt2880-gpio";
  88. reg = <0x638 0x24>;
  89. interrupt-parent = <&intc>;
  90. interrupts = <6>;
  91. gpio-controller;
  92. #gpio-cells = <2>;
  93. ralink,gpio-base = <24>;
  94. ralink,num-gpios = <16>;
  95. ralink,register-map = [ 00 04 08 0c
  96. 10 14 18 1c
  97. 20 24 ];
  98. status = "disabled";
  99. };
  100. gpio2: gpio@660 {
  101. compatible = "ralink,mt7620a-gpio", "ralink,rt2880-gpio";
  102. reg = <0x660 0x24>;
  103. interrupt-parent = <&intc>;
  104. interrupts = <6>;
  105. gpio-controller;
  106. #gpio-cells = <2>;
  107. ralink,gpio-base = <40>;
  108. ralink,num-gpios = <32>;
  109. ralink,register-map = [ 00 04 08 0c
  110. 10 14 18 1c
  111. 20 24 ];
  112. status = "disabled";
  113. };
  114. gpio3: gpio@688 {
  115. compatible = "ralink,mt7620a-gpio", "ralink,rt2880-gpio";
  116. reg = <0x688 0x24>;
  117. interrupt-parent = <&intc>;
  118. interrupts = <6>;
  119. gpio-controller;
  120. #gpio-cells = <2>;
  121. ralink,gpio-base = <72>;
  122. ralink,num-gpios = <1>;
  123. ralink,register-map = [ 00 04 08 0c
  124. 10 14 18 1c
  125. 20 24 ];
  126. status = "disabled";
  127. };
  128. i2c@900 {
  129. compatible = "link,mt7620a-i2c", "ralink,rt2880-i2c";
  130. reg = <0x900 0x100>;
  131. resets = <&rstctrl 16>;
  132. reset-names = "i2c";
  133. #address-cells = <1>;
  134. #size-cells = <0>;
  135. status = "disabled";
  136. pinctrl-names = "default";
  137. pinctrl-0 = <&i2c_pins>;
  138. };
  139. i2s@a00 {
  140. compatible = "ralink,mt7620a-i2s";
  141. reg = <0xa00 0x100>;
  142. resets = <&rstctrl 17>;
  143. reset-names = "i2s";
  144. interrupt-parent = <&intc>;
  145. interrupts = <10>;
  146. dmas = <&gdma 4>,
  147. <&gdma 5>;
  148. dma-names = "tx", "rx";
  149. status = "disabled";
  150. };
  151. spi@b00 {
  152. compatible = "ralink,mt7620a-spi", "ralink,rt2880-spi";
  153. reg = <0xb00 0x100>;
  154. resets = <&rstctrl 18>;
  155. reset-names = "spi";
  156. #address-cells = <1>;
  157. #size-cells = <1>;
  158. status = "disabled";
  159. pinctrl-names = "default";
  160. pinctrl-0 = <&spi_pins>;
  161. };
  162. uartlite@c00 {
  163. compatible = "ralink,mt7620a-uart", "ralink,rt2880-uart", "ns16550a";
  164. reg = <0xc00 0x100>;
  165. resets = <&rstctrl 19>;
  166. reset-names = "uartl";
  167. interrupt-parent = <&intc>;
  168. interrupts = <12>;
  169. reg-shift = <2>;
  170. pinctrl-names = "default";
  171. pinctrl-0 = <&uartlite_pins>;
  172. };
  173. systick@d00 {
  174. compatible = "ralink,mt7620a-systick", "ralink,cevt-systick";
  175. reg = <0xd00 0x10>;
  176. resets = <&rstctrl 28>;
  177. reset-names = "intc";
  178. interrupt-parent = <&cpuintc>;
  179. interrupts = <7>;
  180. };
  181. pcm@2000 {
  182. compatible = "ralink,mt7620a-pcm";
  183. reg = <0x2000 0x800>;
  184. resets = <&rstctrl 11>;
  185. reset-names = "pcm";
  186. interrupt-parent = <&intc>;
  187. interrupts = <4>;
  188. status = "disabled";
  189. };
  190. gdma: gdma@2800 {
  191. compatible = "ralink,mt7620a-gdma", "ralink,rt2880-gdma";
  192. reg = <0x2800 0x800>;
  193. resets = <&rstctrl 14>;
  194. reset-names = "dma";
  195. interrupt-parent = <&intc>;
  196. interrupts = <7>;
  197. #dma-cells = <1>;
  198. #dma-channels = <16>;
  199. #dma-requests = <16>;
  200. status = "disabled";
  201. };
  202. };
  203. pinctrl {
  204. compatible = "ralink,rt2880-pinmux";
  205. pinctrl-names = "default";
  206. pinctrl-0 = <&state_default>;
  207. state_default: pinctrl0 {
  208. };
  209. pcm_i2s_pins: pcm_i2s {
  210. pcm_i2s {
  211. ralink,group = "uartf";
  212. ralink,function = "pcm i2s";
  213. };
  214. };
  215. uartf_gpio_pins: uartf_gpio {
  216. uartf_gpio {
  217. ralink,group = "uartf";
  218. ralink,function = "gpio uartf";
  219. };
  220. };
  221. spi_pins: spi {
  222. spi {
  223. ralink,group = "spi";
  224. ralink,function = "spi";
  225. };
  226. };
  227. i2c_pins: i2c {
  228. i2c {
  229. ralink,group = "i2c";
  230. ralink,function = "i2c";
  231. };
  232. };
  233. uartlite_pins: uartlite {
  234. uart {
  235. ralink,group = "uartlite";
  236. ralink,function = "uartlite";
  237. };
  238. };
  239. mdio_pins: mdio {
  240. mdio {
  241. ralink,group = "mdio";
  242. ralink,function = "mdio";
  243. };
  244. };
  245. ephy_pins: ephy {
  246. ephy {
  247. ralink,group = "ephy";
  248. ralink,function = "ephy";
  249. };
  250. };
  251. wled_pins: wled {
  252. wled {
  253. ralink,group = "wled";
  254. ralink,function = "wled";
  255. };
  256. };
  257. rgmii1_pins: rgmii1 {
  258. rgmii1 {
  259. ralink,group = "rgmii1";
  260. ralink,function = "rgmii1";
  261. };
  262. };
  263. rgmii2_pins: rgmii2 {
  264. rgmii2 {
  265. ralink,group = "rgmii2";
  266. ralink,function = "rgmii2";
  267. };
  268. };
  269. pcie_pins: pcie {
  270. pcie {
  271. ralink,group = "pcie";
  272. ralink,function = "pcie rst";
  273. };
  274. };
  275. };
  276. rstctrl: rstctrl {
  277. compatible = "ralink,mt7620a-reset", "ralink,rt2880-reset";
  278. #reset-cells = <1>;
  279. };
  280. usbphy: usbphy {
  281. compatible = "ralink,mt7620a-usbphy";
  282. #phy-cells = <1>;
  283. resets = <&rstctrl 22 &rstctrl 25>;
  284. reset-names = "host", "device";
  285. };
  286. ethernet@10100000 {
  287. compatible = "ralink,mt7620a-eth";
  288. reg = <0x10100000 10000>;
  289. #address-cells = <1>;
  290. #size-cells = <0>;
  291. interrupt-parent = <&cpuintc>;
  292. interrupts = <5>;
  293. resets = <&rstctrl 21 &rstctrl 23>;
  294. reset-names = "fe", "esw";
  295. port@4 {
  296. compatible = "ralink,mt7620a-gsw-port", "ralink,eth-port";
  297. reg = <4>;
  298. status = "disabled";
  299. };
  300. port@5 {
  301. compatible = "ralink,mt7620a-gsw-port", "ralink,eth-port";
  302. reg = <5>;
  303. status = "disabled";
  304. };
  305. mdio-bus {
  306. #address-cells = <1>;
  307. #size-cells = <0>;
  308. status = "disabled";
  309. };
  310. };
  311. gsw@10110000 {
  312. compatible = "ralink,mt7620a-gsw";
  313. reg = <0x10110000 8000>;
  314. resets = <&rstctrl 23>;
  315. reset-names = "esw";
  316. interrupt-parent = <&intc>;
  317. interrupts = <17>;
  318. };
  319. sdhci@10130000 {
  320. compatible = "ralink,mt7620-sdhci";
  321. reg = <0x10130000 4000>;
  322. interrupt-parent = <&intc>;
  323. interrupts = <14>;
  324. status = "disabled";
  325. };
  326. ehci@101c0000 {
  327. compatible = "ralink,rt3xxx-ehci";
  328. reg = <0x101c0000 0x1000>;
  329. interrupt-parent = <&intc>;
  330. interrupts = <18>;
  331. phys = <&usbphy 1>;
  332. phy-names = "usb";
  333. status = "disabled";
  334. };
  335. ohci@101c1000 {
  336. compatible = "ralink,rt3xxx-ohci";
  337. reg = <0x101c1000 0x1000>;
  338. interrupt-parent = <&intc>;
  339. interrupts = <18>;
  340. phys = <&usbphy 1>;
  341. phy-names = "usb";
  342. status = "disabled";
  343. };
  344. pcie@10140000 {
  345. compatible = "mediatek,mt7620-pci";
  346. reg = <0x10140000 0x100
  347. 0x10142000 0x100>;
  348. #address-cells = <3>;
  349. #size-cells = <2>;
  350. resets = <&rstctrl 26>;
  351. reset-names = "pcie0";
  352. interrupt-parent = <&cpuintc>;
  353. interrupts = <4>;
  354. pinctrl-names = "default";
  355. pinctrl-0 = <&pcie_pins>;
  356. device_type = "pci";
  357. bus-range = <0 255>;
  358. ranges = <
  359. 0x02000000 0 0x00000000 0x20000000 0 0x10000000 /* pci memory */
  360. 0x01000000 0 0x00000000 0x10160000 0 0x00010000 /* io space */
  361. >;
  362. status = "disabled";
  363. pcie-bridge {
  364. reg = <0x0000 0 0 0 0>;
  365. #address-cells = <3>;
  366. #size-cells = <2>;
  367. device_type = "pci";
  368. };
  369. };
  370. wmac@10180000 {
  371. compatible = "ralink,rt7620-wmac", "ralink,rt2880-wmac";
  372. reg = <0x10180000 40000>;
  373. interrupt-parent = <&cpuintc>;
  374. interrupts = <6>;
  375. ralink,eeprom = "soc_wmac.eeprom";
  376. };
  377. };