openwrt_lede/package/kernel/lantiq/ltq-vdsl-mei/patches/100-compat.patch

--- a/src/drv_mei_cpe_common.c
+++ b/src/drv_mei_cpe_common.c
@@ -19,7 +19,6 @@
 /* get at first the driver configuration */
 #include "drv_mei_cpe_config.h"
 
-#include "ifx_types.h"
 #include "drv_mei_cpe_os.h"
 #include "drv_mei_cpe_dbg.h"
 
--- a/src/drv_mei_cpe_linux.h
+++ b/src/drv_mei_cpe_linux.h
@@ -57,12 +57,6 @@
 #include <linux/poll.h>
 #include <linux/types.h>
 
-#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,10,0))
-   #include <asm/ifx/ifx_types.h>
-#else
-   #include <ifx_types.h>
-#endif
-
 #endif /* #if (MEI_DRV_IFXOS_ENABLE == 0)*/
 
 #include <linux/dma-mapping.h>
--- a/src/drv_mei_cpe_linux.c
+++ b/src/drv_mei_cpe_linux.c
@@ -114,6 +114,8 @@
 
 #include "drv_mei_cpe_api_atm_ptm_intern.h"
 
+#include <lantiq_soc.h>
+
 /* ===================================
    extern function declarations
    =================================== */
@@ -220,6 +222,8 @@ static void MEI_NlSendMsg(IFX_char_t* pM
 /* Local variables (LINUX)             */
 /* =================================== */
 static IFX_uint8_t major_number = 0;
+static struct class *mei_class;
+static dev_t mei_devt;
 #ifdef MODULE
 #if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0))
 MODULE_PARM(major_number, "b");
@@ -2174,9 +2178,11 @@ static int MEI_module_init (void)
       return (result);
    }
 
+#if 0
 #if (MEI_DRV_ATM_PTM_INTERFACE_ENABLE == 1)
    ppa_callback_set(LTQ_MEI_SHOWTIME_CHECK, (void *)ltq_mei_showtime_check);
 #endif /* #if (MEI_DRV_ATM_PTM_INTERFACE_ENABLE == 1) */
+#endif
 
    return 0;
 }
@@ -2304,6 +2310,10 @@ static void MEI_module_exit (void)
 
 #else
    unregister_chrdev ( major_number , DRV_MEI_NAME );
+   device_destroy(mei_class, mei_devt);
+   mei_devt = 0;
+   class_destroy(mei_class);
+   mei_class = NULL;
 #endif
 
 #if CONFIG_PROC_FS
@@ -2388,9 +2398,11 @@ static void MEI_module_exit (void)
             ("MEI_DRV: Chipset Basic Exit failed" MEI_DRV_CRLF));
    }
 
+#if 0
 #if (MEI_DRV_ATM_PTM_INTERFACE_ENABLE == 1)
    ppa_callback_set(LTQ_MEI_SHOWTIME_CHECK, (void *)NULL);
 #endif /* #if (MEI_DRV_ATM_PTM_INTERFACE_ENABLE == 1) */
+#endif
 
 #if (MEI_SUPPORT_DEBUG_LOGGER == 1)
    if (nl_debug_sock)
@@ -2514,6 +2526,10 @@ static int MEI_InitModuleRegCharDev(cons
             ("Using major number %d" MEI_DRV_CRLF, major_number));
    }
 
+   mei_class = class_create(THIS_MODULE, devName);
+   mei_devt = MKDEV(major_number, 0);
+   device_create(mei_class, NULL, mei_devt, NULL, "%s/%i", devName, 0);
+
    return 0;
 #endif      /* CONFIG_DEVFS_FS */
 }
@@ -2563,21 +2579,32 @@ static int MEI_InitModuleBasics(void)
 }
 
 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,10,0))
+
+#define PMU_DFE         BIT(9)
+
 static int MEI_SysClkEnable(struct clk *clk)
 {
+#if 0
    if (IS_ERR(clk))
       return -1;
    clk_enable(clk);
+#else
+   ltq_pmu_enable(PMU_DFE);
+#endif
 
    return 0;
 }
 
 static int MEI_SysClkDisable(struct clk *clk)
 {
+#if 0
    if (IS_ERR(clk))
       return -1;
    clk_disable(clk);
    clk_put(clk);
+#else
+   ltq_pmu_disable(PMU_DFE);
+#endif
 
    return 0;
 }
@@ -2905,11 +2932,15 @@ IFX_int32_t MEI_IoctlInitDevice(
             pMeiDev->eModePoll = e_MEI_DEV_ACCESS_MODE_IRQ;
             pMeiDev->intMask   = ME_ARC2ME_INTERRUPT_UNMASK_ALL;
 
+#if 1
+            virq = (IFX_uint32_t)pInitDev->usedIRQ;
+#else
 #if (LINUX_VERSION_CODE < KERNEL_VERSION(3,8,0))
             virq = (IFX_uint32_t)pInitDev->usedIRQ;
 #else
             virq = irq_create_mapping(NULL, (IFX_uint32_t)pInitDev->usedIRQ);
 #endif
+#endif
 
             pTmpXCntrl = MEI_VrxXDevToIrqListAdd(
                                           MEI_DRV_LINENUM_GET(pMeiDev),
--- a/src/drv_mei_cpe_api_atm_ptm_intern.c
+++ b/src/drv_mei_cpe_api_atm_ptm_intern.c
@@ -147,6 +147,7 @@ IFX_int32_t MEI_InternalXtmSwhowtimeExit
    return retVal;
 }
 
+#if 0
 IFX_int32_t MEI_InternalTcRequest(
                               MEI_DYN_CNTRL_T        *pMeiDynCntrl,
                               MEI_TC_Request_t       *pArgTcRequest)
@@ -232,6 +233,7 @@ IFX_int32_t MEI_InternalTcReset(
 
    return retVal;
 }
+#endif
 
 /**
    Function that is used by the PP subsystem to get some showtime relevant data
@@ -311,10 +313,57 @@ int ifx_mei_atm_led_blink(void)
     return IFX_SUCCESS;
 }
 
+#if MEI_MAX_DFE_CHAN_DEVICES > 1
+#error "Compat functions do not support MEI_MAX_DFE_CHAN_DEVICES > 1 yet"
+#else
+int (*ifx_mei_atm_showtime_enter)(struct port_cell_info *, void *) = NULL;
+int (*ifx_mei_atm_showtime_exit)(void) = NULL;
+
+int ltq_ifx_mei_atm_showtime_enter_compat(IFX_uint8_t dslLineNum,
+				      struct port_cell_info *cellInfo,
+				      void *xdata) {
+	if (ifx_mei_atm_showtime_enter)
+		return ifx_mei_atm_showtime_enter(cellInfo, xdata);
+
+	return -e_MEI_ERR_OP_FAILED;
+}
+
+int ltq_ifx_mei_atm_showtime_exit_compat(IFX_uint8_t dslLineNum) {
+	if (ifx_mei_atm_showtime_exit)
+		return ifx_mei_atm_showtime_exit();
+
+	return -e_MEI_ERR_OP_FAILED;
+}
+
+void* ppa_callback_get(e_ltq_mei_cb_type type) {
+	switch (type) {
+		case LTQ_MEI_SHOWTIME_ENTER:
+			return &ltq_ifx_mei_atm_showtime_enter_compat;
+		case LTQ_MEI_SHOWTIME_EXIT:
+			return &ltq_ifx_mei_atm_showtime_exit_compat;
+			break;
+	}
+
+	BUG();
+}
+
+int ifx_mei_atm_showtime_check(int *is_showtime,
+                              struct port_cell_info *port_cell,
+                              void **xdata_addr) {
+	return ltq_mei_showtime_check(0, is_showtime, port_cell, xdata_addr);
+}
+
+EXPORT_SYMBOL(ifx_mei_atm_showtime_enter);
+EXPORT_SYMBOL(ifx_mei_atm_showtime_exit);
+EXPORT_SYMBOL(ifx_mei_atm_showtime_check);
+#endif
+
 EXPORT_SYMBOL (MEI_InternalXtmSwhowtimeEntrySignal);
 EXPORT_SYMBOL (MEI_InternalXtmSwhowtimeExitSignal);
+#if 0
 EXPORT_SYMBOL (MEI_InternalTcRequest);
 EXPORT_SYMBOL (MEI_InternalTcReset);
+#endif
 EXPORT_SYMBOL(ifx_mei_atm_led_blink);
 
 #endif      /* #if (MEI_EXPORT_INTERNAL_API == 1) && (MEI_DRV_ATM_PTM_INTERFACE_ENABLE == 1) */
--- a/src/drv_mei_cpe_api_atm_ptm_intern.h
+++ b/src/drv_mei_cpe_api_atm_ptm_intern.h
@@ -21,7 +21,6 @@
 
 #include "drv_mei_cpe_config.h"
 #include "drv_mei_cpe_interface.h"
-#include <net/ppa_stack_al.h>
 
 #if (MEI_EXPORT_INTERNAL_API == 1) && (MEI_DRV_ATM_PTM_INTERFACE_ENABLE == 1)
 
@@ -59,8 +58,21 @@ extern IFX_int32_t MEI_InternalTcReset(
                               MEI_DYN_CNTRL_T        *pMeiDynCntrl,
                               MEI_TC_Reset_t         *pArgTcReset);
 
+#if 1
+#include <lantiq_atm.h>
+typedef enum {
+	LTQ_MEI_SHOWTIME_ENTER,
+	LTQ_MEI_SHOWTIME_EXIT
+} e_ltq_mei_cb_type;
+
+typedef void (*ltq_mei_atm_showtime_enter_t)(IFX_uint8_t, struct port_cell_info *, void *);
+typedef void (*ltq_mei_atm_showtime_exit_t)(IFX_uint8_t);
+
+void* ppa_callback_get(e_ltq_mei_cb_type type);
+#else
 extern int ppa_callback_set(e_ltq_mei_cb_type type, void *func);
 extern void* ppa_callback_get(e_ltq_mei_cb_type type);
+#endif
 
 int ltq_mei_showtime_check(
                               const unsigned char line_idx,
--- a/src/drv_mei_cpe_device_vrx.c
+++ b/src/drv_mei_cpe_device_vrx.c
@@ -28,17 +28,6 @@
 #include "drv_mei_cpe_api.h"
 #include "drv_mei_cpe_mei_vrx.h"
 
-#if defined(LINUX)
-#  if (LINUX_VERSION_CODE < KERNEL_VERSION(3,10,0))
-#    if (MEI_SUPPORT_DEVICE_VR10_320 != 1)
-#       include "ifx_pcie.h"
-#    else
-#       include "../drivers/net/ethernet/lantiq/lantiq_pcie.h"
-#    endif
-#  else
-#    include "lantiq_pcie.h"
-#  endif
-#endif /* #if defined(LINUX)*/
 
 IFX_int32_t MEI_GPIntProcess(MEI_MeiRegVal_t processInt, MEI_DEV_T *pMeiDev)
 {
@@ -86,6 +75,7 @@ IFX_int32_t MEI_GetChipInfo(MEI_DEV_T *p
 */
 IFX_int32_t MEI_VR10_PcieEntitiesCheck(IFX_uint8_t nEntityNum)
 {
+#if 0
    IFX_uint32_t pcie_entitiesNum;
 
    /* get information from pcie driver */
@@ -110,6 +100,9 @@ IFX_int32_t MEI_VR10_PcieEntitiesCheck(I
    }
 
    return IFX_SUCCESS;
+#else
+   return IFX_ERROR;
+#endif
 }
 
 /**
@@ -124,6 +117,7 @@ IFX_int32_t MEI_VR10_PcieEntitiesCheck(I
 */
 IFX_int32_t MEI_VR10_PcieEntityInit(MEI_MEI_DRV_CNTRL_T *pMeiDrvCntrl)
 {
+#if 0
    IFX_uint8_t entityNum;
 #if (MEI_SUPPORT_DEVICE_VR10_320 != 1)
    ifx_pcie_ep_dev_t MEI_pcie_ep_dev;
@@ -156,6 +150,9 @@ IFX_int32_t MEI_VR10_PcieEntityInit(MEI_
    pMeiDrvCntrl->MEI_pcie_irq = 99;
 
    return IFX_SUCCESS;
+#else
+   return IFX_ERROR;
+#endif
 }
 
 /**
@@ -170,6 +167,7 @@ IFX_int32_t MEI_VR10_PcieEntityInit(MEI_
 */
 IFX_int32_t MEI_VR10_PcieEntityFree(IFX_uint8_t entityNum)
 {
+#if 0
 #if (MEI_SUPPORT_DEVICE_VR10_320 != 1)
    if (ifx_pcie_ep_dev_info_release(entityNum))
 #else
@@ -183,6 +181,9 @@ IFX_int32_t MEI_VR10_PcieEntityFree(IFX_
    }
 
    return IFX_SUCCESS;
+#else
+   return IFX_ERROR;
+#endif
 }
 
 /**
@@ -197,6 +198,7 @@ IFX_int32_t MEI_VR10_PcieEntityFree(IFX_
 */
 IFX_int32_t MEI_VR10_InternalInitDevice(MEI_DYN_CNTRL_T *pMeiDynCntrl)
 {
+#if 0
    IFX_int32_t         retVal;
    IOCTL_MEI_devInit_t InitDev;
    MEI_DEV_T           *pMeiDev = pMeiDynCntrl->pMeiDev;
@@ -221,6 +223,9 @@ IFX_int32_t MEI_VR10_InternalInitDevice(
    *MEI_GPIO_U32REG(GPIO_P0_ALSEL1) &= ~((1 << 0) | (1 << 3) | (1 << 8));
 
    return IFX_SUCCESS;
+#else
+   return IFX_ERROR;
+#endif
 }
 
 IFX_int32_t MEI_PLL_ConfigInit(MEI_DEV_T *pMeiDev)
--- a/src/drv_mei_cpe_dsm.c
+++ b/src/drv_mei_cpe_dsm.c
@@ -144,7 +144,7 @@ IFX_void_t MEI_VRX_DSM_DataInit(MEI_DEV_
    memset((IFX_uint8_t *)&pMeiDev->firmwareFeatures, 0x00, sizeof(IOCTL_MEI_firmwareFeatures_t));
    pMeiDev->meiFwDlCount = 0;
 
-   pMeiDev->meiERBbuf.pCallBackFunc = mei_dsm_cb_func_hook;
+   pMeiDev->meiERBbuf.pCallBackFunc = NULL;
 
    PRN_DBG_USR_NL( MEI_DRV, MEI_DRV_PRN_LEVEL_NORMAL,
             ("MEI_DRV: PP callback function addr = 0x%08X" MEI_DRV_CRLF,
--- a/src/drv_mei_cpe_download_vrx.c
+++ b/src/drv_mei_cpe_download_vrx.c
@@ -3281,12 +3281,14 @@ IFX_int32_t MEI_DEV_IoctlFirmwareDownloa
    /* reset TC layer */
    if (ret == 0)
    {
+#if 0
       if (MEI_InternalTcReset(pMeiDynCntrl, &tc_reset) != 0)
       {
             PRN_ERR_USR_NL( MEI_DRV, MEI_DRV_PRN_LEVEL_WRN,
                   ("MEI_DRV[%02d]: Could not perform reset of TC-Layer!"
                    MEI_DRV_CRLF, MEI_DRV_LINENUM_GET(pMeiDev)));
       }
+#endif
    }
 #endif