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- From 8ab5f1fbd39c29125403678a0caf0a71046da361 Mon Sep 17 00:00:00 2001
- From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <zajec5@gmail.com>
- Date: Mon, 6 Jun 2016 09:43:49 +0200
- Subject: [PATCH 1/2] ARM: BCM5301X: Specify NAND chip select and ECC in
- separated files
- MIME-Version: 1.0
- Content-Type: text/plain; charset=UTF-8
- Content-Transfer-Encoding: 8bit
- Using separated file with common chip select parameters will allow us
- adding other ECC setups without code duplication.
- Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
- Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
- ---
- arch/arm/boot/dts/bcm5301x-nand-cs0-bch8.dtsi | 16 +++++-----------
- arch/arm/boot/dts/bcm5301x-nand-cs0.dtsi | 18 ++++++++++++++++++
- 2 files changed, 23 insertions(+), 11 deletions(-)
- create mode 100644 arch/arm/boot/dts/bcm5301x-nand-cs0.dtsi
- --- a/arch/arm/boot/dts/bcm5301x-nand-cs0-bch8.dtsi
- +++ b/arch/arm/boot/dts/bcm5301x-nand-cs0-bch8.dtsi
- @@ -9,16 +9,10 @@
- * Licensed under the GNU/GPL. See COPYING for details.
- */
-
- -/ {
- - nand@18028000 {
- - nandcs@0 {
- - compatible = "brcm,nandcs";
- - reg = <0>;
- - #address-cells = <1>;
- - #size-cells = <1>;
- +#include "bcm5301x-nand-cs0.dtsi"
-
- - nand-ecc-strength = <8>;
- - nand-ecc-step-size = <512>;
- - };
- - };
- +&nandcs {
- + nand-ecc-algo = "bch";
- + nand-ecc-strength = <8>;
- + nand-ecc-step-size = <512>;
- };
- --- /dev/null
- +++ b/arch/arm/boot/dts/bcm5301x-nand-cs0.dtsi
- @@ -0,0 +1,18 @@
- +/*
- + * Broadcom Northstar NAND.
- + *
- + * Copyright (C) 2015 Hauke Mehrtens <hauke@hauke-m.de>
- + *
- + * Licensed under the GNU/GPL. See COPYING for details.
- + */
- +
- +/ {
- + nand@18028000 {
- + nandcs: nandcs@0 {
- + compatible = "brcm,nandcs";
- + reg = <0>;
- + #address-cells = <1>;
- + #size-cells = <1>;
- + };
- + };
- +};
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