044-0002-ARM-BCM5301X-Add-basic-dts-for-BCM53573-based-Tenda-.patch 6.2 KB

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  1. From 21c29be6a69d3ef4f5a2e16272deb4845f8208ad Mon Sep 17 00:00:00 2001
  2. From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <zajec5@gmail.com>
  3. Date: Tue, 23 Aug 2016 07:37:43 +0200
  4. Subject: [PATCH] ARM: BCM5301X: Add basic dts for BCM53573 based Tenda AC9
  5. MIME-Version: 1.0
  6. Content-Type: text/plain; charset=UTF-8
  7. Content-Transfer-Encoding: 8bit
  8. BCM53573 seems to be low priced alternative for Northstar chipsts. It
  9. uses single core Cortex-A7 and doesn't have SDU or local (TWD) timer. It
  10. was also stripped out of independent SPI controller and 2 GMACs.
  11. DTS for Tenda AC9 isn't completed yet. It misses e.g. switch entry (we
  12. still need some b53 fixes) and probably some clocks. It adds support for
  13. basic features however and can be improved later.
  14. Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
  15. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
  16. ---
  17. arch/arm/boot/dts/Makefile | 2 +
  18. arch/arm/boot/dts/bcm47189-tenda-ac9.dts | 74 ++++++++++++++++
  19. arch/arm/boot/dts/bcm53573.dtsi | 147 +++++++++++++++++++++++++++++++
  20. 3 files changed, 223 insertions(+)
  21. create mode 100644 arch/arm/boot/dts/bcm47189-tenda-ac9.dts
  22. create mode 100644 arch/arm/boot/dts/bcm53573.dtsi
  23. --- a/arch/arm/boot/dts/Makefile
  24. +++ b/arch/arm/boot/dts/Makefile
  25. @@ -82,6 +82,8 @@ dtb-$(CONFIG_ARCH_BCM_5301X) += \
  26. bcm94709.dtb \
  27. bcm953012er.dtb \
  28. bcm953012k.dtb
  29. +dtb-$(CONFIG_ARCH_BCM_53573) += \
  30. + bcm47189-tenda-ac9.dtb
  31. dtb-$(CONFIG_ARCH_BCM_63XX) += \
  32. bcm963138dvt.dtb
  33. dtb-$(CONFIG_ARCH_BCM_CYGNUS) += \
  34. --- /dev/null
  35. +++ b/arch/arm/boot/dts/bcm47189-tenda-ac9.dts
  36. @@ -0,0 +1,74 @@
  37. +/*
  38. + * Copyright (C) 2016 Rafał Miłecki <rafal@milecki.pl>
  39. + *
  40. + * Licensed under the ISC license.
  41. + */
  42. +
  43. +/dts-v1/;
  44. +
  45. +#include "bcm53573.dtsi"
  46. +
  47. +/ {
  48. + compatible = "tenda,ac9", "brcm,bcm47189", "brcm,bcm53573";
  49. + model = "Tenda AC9";
  50. +
  51. + chosen {
  52. + bootargs = "console=ttyS0,115200 earlycon";
  53. + };
  54. +
  55. + memory {
  56. + reg = <0x00000000 0x08000000>;
  57. + };
  58. +
  59. + leds {
  60. + compatible = "gpio-leds";
  61. +
  62. + usb {
  63. + label = "bcm53xx:blue:usb";
  64. + gpios = <&chipcommon 1 GPIO_ACTIVE_HIGH>;
  65. + linux,default-trigger = "default-off";
  66. + };
  67. +
  68. + wps {
  69. + label = "bcm53xx:blue:wps";
  70. + gpios = <&chipcommon 10 GPIO_ACTIVE_HIGH>;
  71. + linux,default-trigger = "default-off";
  72. + };
  73. +
  74. + 5ghz {
  75. + label = "bcm53xx:blue:5ghz";
  76. + gpios = <&chipcommon 11 GPIO_ACTIVE_HIGH>;
  77. + linux,default-trigger = "default-off";
  78. + };
  79. +
  80. + system {
  81. + label = "bcm53xx:blue:system";
  82. + gpios = <&chipcommon 15 GPIO_ACTIVE_HIGH>;
  83. + linux,default-trigger = "timer";
  84. + };
  85. + };
  86. +
  87. + gpio-keys {
  88. + compatible = "gpio-keys";
  89. + #address-cells = <1>;
  90. + #size-cells = <0>;
  91. +
  92. + rfkill {
  93. + label = "WiFi";
  94. + linux,code = <KEY_RFKILL>;
  95. + gpios = <&chipcommon 3 GPIO_ACTIVE_LOW>;
  96. + };
  97. +
  98. + restart {
  99. + label = "Reset";
  100. + linux,code = <KEY_RESTART>;
  101. + gpios = <&chipcommon 7 GPIO_ACTIVE_LOW>;
  102. + };
  103. +
  104. + wps {
  105. + label = "WPS";
  106. + linux,code = <KEY_WPS_BUTTON>;
  107. + gpios = <&chipcommon 9 GPIO_ACTIVE_LOW>;
  108. + };
  109. + };
  110. +};
  111. --- /dev/null
  112. +++ b/arch/arm/boot/dts/bcm53573.dtsi
  113. @@ -0,0 +1,147 @@
  114. +/*
  115. + * Copyright (C) 2016 Rafał Miłecki <rafal@milecki.pl>
  116. + *
  117. + * Licensed under the ISC license.
  118. + */
  119. +
  120. +#include <dt-bindings/gpio/gpio.h>
  121. +#include <dt-bindings/input/input.h>
  122. +#include <dt-bindings/interrupt-controller/irq.h>
  123. +#include <dt-bindings/interrupt-controller/arm-gic.h>
  124. +#include "skeleton.dtsi"
  125. +
  126. +/ {
  127. + interrupt-parent = <&gic>;
  128. +
  129. + chosen {
  130. + stdout-path = &uart0;
  131. + };
  132. +
  133. + cpus {
  134. + #address-cells = <1>;
  135. + #size-cells = <0>;
  136. +
  137. + cpu@0 {
  138. + device_type = "cpu";
  139. + compatible = "arm,cortex-a7";
  140. + reg = <0x0>;
  141. + };
  142. + };
  143. +
  144. + mpcore {
  145. + compatible = "simple-bus";
  146. + ranges = <0x00000000 0x18310000 0x00008000>;
  147. + #address-cells = <1>;
  148. + #size-cells = <1>;
  149. +
  150. + gic: interrupt-controller@1000 {
  151. + compatible = "arm,cortex-a7-gic";
  152. + #interrupt-cells = <3>;
  153. + #address-cells = <0>;
  154. + interrupt-controller;
  155. + reg = <0x1000 0x1000>,
  156. + <0x2000 0x0100>;
  157. + };
  158. + };
  159. +
  160. + clocks {
  161. + #address-cells = <1>;
  162. + #size-cells = <1>;
  163. + ranges;
  164. +
  165. + alp: oscillator {
  166. + #clock-cells = <0>;
  167. + compatible = "fixed-clock";
  168. + clock-frequency = <40000000>;
  169. + };
  170. + };
  171. +
  172. + axi@18000000 {
  173. + compatible = "brcm,bus-axi";
  174. + reg = <0x18000000 0x1000>;
  175. + ranges = <0x00000000 0x18000000 0x00100000>;
  176. + #address-cells = <1>;
  177. + #size-cells = <1>;
  178. +
  179. + #interrupt-cells = <1>;
  180. + interrupt-map-mask = <0x000fffff 0xffff>;
  181. + interrupt-map =
  182. + /* ChipCommon */
  183. + <0x00000000 0 &gic GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
  184. +
  185. + /* IEEE 802.11 0 */
  186. + <0x00001000 0 &gic GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
  187. +
  188. + /* PCIe Controller 0 */
  189. + <0x00002000 0 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
  190. + <0x00002000 1 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
  191. + <0x00002000 2 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
  192. + <0x00002000 3 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
  193. + <0x00002000 4 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
  194. + <0x00002000 5 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
  195. +
  196. + /* USB 2.0 Controller */
  197. + <0x00004000 0 &gic GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
  198. +
  199. + /* Ethernet Controller 0 */
  200. + <0x00005000 0 &gic GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
  201. +
  202. + /* IEEE 802.11 1 */
  203. + <0x0000a000 0 &gic GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
  204. +
  205. + /* Ethernet Controller 1 */
  206. + <0x0000b000 0 &gic GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
  207. +
  208. + chipcommon: chipcommon@0 {
  209. + compatible = "simple-bus";
  210. + reg = <0x00000000 0x1000>;
  211. + ranges;
  212. +
  213. + #address-cells = <1>;
  214. + #size-cells = <1>;
  215. +
  216. + gpio-controller;
  217. + #gpio-cells = <2>;
  218. +
  219. + uart0: serial@0300 {
  220. + compatible = "ns16550a";
  221. + reg = <0x0300 0x100>;
  222. + interrupt-parent = <&gic>;
  223. + interrupts = <GIC_PPI 16 IRQ_TYPE_LEVEL_HIGH>;
  224. + clocks = <&alp>;
  225. + status = "okay";
  226. + };
  227. + };
  228. +
  229. + usb2: usb2@4000 {
  230. + reg = <0x4000 0x1000>;
  231. + ranges;
  232. + #address-cells = <1>;
  233. + #size-cells = <1>;
  234. +
  235. + ehci: ehci@4000 {
  236. + compatible = "generic-ehci";
  237. + reg = <0x4000 0x1000>;
  238. + interrupt-parent = <&gic>;
  239. + interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
  240. + };
  241. +
  242. + ohci: ohci@d000 {
  243. + #usb-cells = <0>;
  244. +
  245. + compatible = "generic-ohci";
  246. + reg = <0xd000 0x1000>;
  247. + interrupt-parent = <&gic>;
  248. + interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
  249. + };
  250. + };
  251. +
  252. + gmac0: ethernet@5000 {
  253. + reg = <0x5000 0x1000>;
  254. + };
  255. +
  256. + gmac1: ethernet@b000 {
  257. + reg = <0xb000 0x1000>;
  258. + };
  259. + };
  260. +};