0065-ASoC-wm8804-Implement-MCLK-configuration-options-add.patch 1.6 KB

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  1. From dca34e0a5c4f9c77cbdb24f95e780e198d64013a Mon Sep 17 00:00:00 2001
  2. From: Daniel Matuschek <info@crazy-audio.com>
  3. Date: Wed, 15 Jan 2014 21:41:23 +0100
  4. Subject: [PATCH] ASoC: wm8804: Implement MCLK configuration options, add 32bit
  5. support WM8804 can run with PLL frequencies of 256xfs and 128xfs for most
  6. sample rates. At 192kHz only 128xfs is supported. The existing driver selects
  7. 128xfs automatically for some lower samples rates. By using an additional
  8. mclk_div divider, it is now possible to control the behaviour. This allows
  9. using 256xfs PLL frequency on all sample rates up to 96kHz. It should allow
  10. lower jitter and better signal quality. The behavior has to be controlled by
  11. the sound card driver, because some sample frequency share the same setting.
  12. e.g. 192kHz and 96kHz use 24.576MHz master clock. The only difference is the
  13. MCLK divider.
  14. This also added support for 32bit data.
  15. Signed-off-by: Daniel Matuschek <daniel@matuschek.net>
  16. ---
  17. sound/soc/codecs/wm8804.c | 3 ++-
  18. 1 file changed, 2 insertions(+), 1 deletion(-)
  19. --- a/sound/soc/codecs/wm8804.c
  20. +++ b/sound/soc/codecs/wm8804.c
  21. @@ -304,6 +304,7 @@ static int wm8804_hw_params(struct snd_p
  22. blen = 0x1;
  23. break;
  24. case 24:
  25. + case 32:
  26. blen = 0x2;
  27. break;
  28. default:
  29. @@ -515,7 +516,7 @@ static const struct snd_soc_dai_ops wm88
  30. };
  31. #define WM8804_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
  32. - SNDRV_PCM_FMTBIT_S24_LE)
  33. + SNDRV_PCM_FMTBIT_S24_3LE | SNDRV_PCM_FMTBIT_S32_LE)
  34. #define WM8804_RATES (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | \
  35. SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_64000 | \