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- From 3ee855d8520adaba936bccf377433468fb1c3ab0 Mon Sep 17 00:00:00 2001
- From: Eric Anholt <eric@anholt.net>
- Date: Mon, 9 May 2016 17:28:18 -0700
- Subject: [PATCH] clk: bcm2835: Mark GPIO clocks enabled at boot as critical.
- These divide off of PLLD_PER and are used for the ethernet and wifi
- PHYs source PLLs. Neither of them is currently represented by a phy
- device that would grab the clock for us.
- This keeps other drivers from killing the networking PHYs when they
- disable their own clocks and trigger PLLD_PER's refcount going to 0.
- v2: Skip marking as critical if they aren't on at boot.
- Signed-off-by: Eric Anholt <eric@anholt.net>
- ---
- drivers/clk/bcm/clk-bcm2835.c | 13 ++++++++++++-
- 1 file changed, 12 insertions(+), 1 deletion(-)
- --- a/drivers/clk/bcm/clk-bcm2835.c
- +++ b/drivers/clk/bcm/clk-bcm2835.c
- @@ -1254,6 +1254,15 @@ static struct clk *bcm2835_register_cloc
- init.name = data->name;
- init.flags = data->flags | CLK_IGNORE_UNUSED;
-
- + /*
- + * Some GPIO clocks for ethernet/wifi PLLs are marked as
- + * critical (since some platforms use them), but if the
- + * firmware didn't have them turned on then they clearly
- + * aren't actually critical.
- + */
- + if ((cprman_read(cprman, data->ctl_reg) & CM_ENABLE) == 0)
- + init.flags &= ~CLK_IS_CRITICAL;
- +
- if (data->is_vpu_clock) {
- init.ops = &bcm2835_vpu_clock_clk_ops;
- } else {
- @@ -1728,13 +1737,15 @@ static const struct bcm2835_clk_desc clk
- .div_reg = CM_GP1DIV,
- .int_bits = 12,
- .frac_bits = 12,
- + .flags = CLK_IS_CRITICAL,
- .is_mash_clock = true),
- [BCM2835_CLOCK_GP2] = REGISTER_PER_CLK(
- .name = "gp2",
- .ctl_reg = CM_GP2CTL,
- .div_reg = CM_GP2DIV,
- .int_bits = 12,
- - .frac_bits = 12),
- + .frac_bits = 12,
- + .flags = CLK_IS_CRITICAL),
-
- /* HDMI state machine */
- [BCM2835_CLOCK_HSM] = REGISTER_PER_CLK(
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