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- From 10073a205df269abcbd9c3fbc690a813827107ef Mon Sep 17 00:00:00 2001
- From: Matthew McClintock <mmcclint@codeaurora.org>
- Date: Tue, 28 Jun 2016 11:35:21 -0700
- Subject: watchdog: qcom: configure BARK time in addition to BITE time
- For certain parts and some versions of TZ, TZ will reset the chip
- when a BARK is triggered even though it was not configured here. So
- by default let's configure this BARK time as well.
- Signed-off-by: Matthew McClintock <mmcclint@codeaurora.org>
- Reviewed-by: Guenter Roeck <linux@roeck-us.net>
- Signed-off-by: Thomas Pedersen <twp@codeaurora.org>
- Signed-off-by: Guenter Roeck <linux@roeck-us.net>
- Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
- ---
- drivers/watchdog/qcom-wdt.c | 5 +++++
- 1 file changed, 5 insertions(+)
- --- a/drivers/watchdog/qcom-wdt.c
- +++ b/drivers/watchdog/qcom-wdt.c
- @@ -24,6 +24,7 @@ enum wdt_reg {
- WDT_RST,
- WDT_EN,
- WDT_STS,
- + WDT_BARK_TIME,
- WDT_BITE_TIME,
- };
-
- @@ -31,6 +32,7 @@ static const u32 reg_offset_data_apcs_tm
- [WDT_RST] = 0x38,
- [WDT_EN] = 0x40,
- [WDT_STS] = 0x44,
- + [WDT_BARK_TIME] = 0x4C,
- [WDT_BITE_TIME] = 0x5C,
- };
-
- @@ -38,6 +40,7 @@ static const u32 reg_offset_data_kpss[]
- [WDT_RST] = 0x4,
- [WDT_EN] = 0x8,
- [WDT_STS] = 0xC,
- + [WDT_BARK_TIME] = 0x10,
- [WDT_BITE_TIME] = 0x14,
- };
-
- @@ -66,6 +69,7 @@ static int qcom_wdt_start(struct watchdo
-
- writel(0, wdt_addr(wdt, WDT_EN));
- writel(1, wdt_addr(wdt, WDT_RST));
- + writel(wdd->timeout * wdt->rate, wdt_addr(wdt, WDT_BARK_TIME));
- writel(wdd->timeout * wdt->rate, wdt_addr(wdt, WDT_BITE_TIME));
- writel(1, wdt_addr(wdt, WDT_EN));
- return 0;
- @@ -108,6 +112,7 @@ static int qcom_wdt_restart(struct watch
-
- writel(0, wdt_addr(wdt, WDT_EN));
- writel(1, wdt_addr(wdt, WDT_RST));
- + writel(timeout, wdt_addr(wdt, WDT_BARK_TIME));
- writel(timeout, wdt_addr(wdt, WDT_BITE_TIME));
- writel(1, wdt_addr(wdt, WDT_EN));
-
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