144-ARM-dts-qcom-Add-necessary-DT-data-for-Krait-cpufreq.patch 2.1 KB

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  1. --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
  2. +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
  3. @@ -26,6 +26,11 @@
  4. next-level-cache = <&L2>;
  5. qcom,acc = <&acc0>;
  6. qcom,saw = <&saw0>;
  7. + clocks = <&kraitcc 0>, <&kraitcc 4>;
  8. + clock-names = "cpu", "l2";
  9. + clock-latency = <100000>;
  10. + cpu-supply = <&smb208_s2a>;
  11. + voltage-tolerance = <5>;
  12. };
  13. cpu@1 {
  14. @@ -36,12 +41,20 @@
  15. next-level-cache = <&L2>;
  16. qcom,acc = <&acc1>;
  17. qcom,saw = <&saw1>;
  18. + clocks = <&kraitcc 1>, <&kraitcc 4>;
  19. + clock-names = "cpu", "l2";
  20. + clock-latency = <100000>;
  21. + cpu-supply = <&smb208_s2b>;
  22. };
  23. L2: l2-cache {
  24. compatible = "cache";
  25. cache-level = <2>;
  26. };
  27. +
  28. + qcom,l2 {
  29. + qcom,l2-rates = <384000000 1000000000 1200000000>;
  30. + };
  31. };
  32. cpu-pmu {
  33. @@ -73,6 +86,46 @@
  34. };
  35. };
  36. + kraitcc: clock-controller {
  37. + compatible = "qcom,krait-cc-v1";
  38. + #clock-cells = <1>;
  39. + };
  40. +
  41. + qcom,pvs {
  42. + qcom,pvs-format-a;
  43. + qcom,speed0-pvs0-bin-v0 =
  44. + < 1400000000 1250000 >,
  45. + < 1200000000 1200000 >,
  46. + < 1000000000 1150000 >,
  47. + < 800000000 1100000 >,
  48. + < 600000000 1050000 >,
  49. + < 384000000 1000000 >;
  50. +
  51. + qcom,speed0-pvs1-bin-v0 =
  52. + < 1400000000 1175000 >,
  53. + < 1200000000 1125000 >,
  54. + < 1000000000 1075000 >,
  55. + < 800000000 1025000 >,
  56. + < 600000000 975000 >,
  57. + < 384000000 925000 >;
  58. +
  59. + qcom,speed0-pvs2-bin-v0 =
  60. + < 1400000000 1125000 >,
  61. + < 1200000000 1075000 >,
  62. + < 1000000000 1025000 >,
  63. + < 800000000 995000 >,
  64. + < 600000000 925000 >,
  65. + < 384000000 875000 >;
  66. +
  67. + qcom,speed0-pvs3-bin-v0 =
  68. + < 1400000000 1050000 >,
  69. + < 1200000000 1000000 >,
  70. + < 1000000000 950000 >,
  71. + < 800000000 900000 >,
  72. + < 600000000 850000 >,
  73. + < 384000000 800000 >;
  74. + };
  75. +
  76. soc: soc {
  77. #address-cells = <1>;
  78. #size-cells = <1>;
  79. @@ -216,11 +269,13 @@
  80. acc0: clock-controller@2088000 {
  81. compatible = "qcom,kpss-acc-v1";
  82. reg = <0x02088000 0x1000>, <0x02008000 0x1000>;
  83. + clock-output-names = "acpu0_aux";
  84. };
  85. acc1: clock-controller@2098000 {
  86. compatible = "qcom,kpss-acc-v1";
  87. reg = <0x02098000 0x1000>, <0x02008000 0x1000>;
  88. + clock-output-names = "acpu1_aux";
  89. };
  90. l2cc: clock-controller@2011000 {