160-ea4500.patch 3.7 KB

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  1. --- a/arch/arm/boot/dts/Makefile
  2. +++ b/arch/arm/boot/dts/Makefile
  3. @@ -183,6 +183,7 @@ dtb-$(CONFIG_MACH_KIRKWOOD) += \
  4. kirkwood-is2.dtb \
  5. kirkwood-km_kirkwood.dtb \
  6. kirkwood-laplug.dtb \
  7. + kirkwood-linksys-viper.dtb \
  8. kirkwood-lschlv2.dtb \
  9. kirkwood-lswvl.dtb \
  10. kirkwood-lswxl.dtb \
  11. --- /dev/null
  12. +++ b/arch/arm/boot/dts/kirkwood-linksys-viper.dts
  13. @@ -0,0 +1,187 @@
  14. +/*
  15. + * kirkwood-linksys-viper.dts - Device Tree file for Linksys E4200v2/EA4500
  16. + *
  17. + * (c) 2013 Jonas Gorski <jogo@openwrt.org>
  18. + * (c) 2013 Deutsche Telekom Innovation Laboratories
  19. + * (c) 2014 Luka Perkov <luka@openwrt.org>
  20. + *
  21. + * This file is licensed under the terms of the GNU General Public
  22. + * License version 2. This program is licensed "as is" without any
  23. + * warranty of any kind, whether express or implied.
  24. + */
  25. +
  26. +/dts-v1/;
  27. +
  28. +#include "kirkwood.dtsi"
  29. +#include "kirkwood-6282.dtsi"
  30. +
  31. +/ {
  32. + model = "Linksys E4200v2 / EA4500";
  33. + compatible = "linksys,viper", "marvell,kirkwood-88f6282", "marvell,kirkwood";
  34. +
  35. + memory {
  36. + device_type = "memory";
  37. + reg = <0x00000000 0x8000000>;
  38. + };
  39. +
  40. + chosen {
  41. + bootargs = "console=ttyS0,115200n8 earlyprintk";
  42. + };
  43. +
  44. + mbus {
  45. + pcie-controller {
  46. + status = "okay";
  47. +
  48. + pcie@1,0 {
  49. + status = "okay";
  50. + };
  51. +
  52. + pcie@2,0 {
  53. + status = "okay";
  54. + };
  55. + };
  56. + };
  57. +
  58. + ocp@f1000000 {
  59. + pinctrl: pin-controller@10000 {
  60. + pmx_led_white_health: pmx-led-white-health {
  61. + marvell,pins = "mpp7";
  62. + marvell,function = "gpo";
  63. + };
  64. + pmx_led_white_pulse: pmx-led-white-pulse {
  65. + marvell,pins = "mpp14";
  66. + marvell,function = "gpio";
  67. + };
  68. + pmx_btn_wps: pmx-btn-wps {
  69. + marvell,pins = "mpp47";
  70. + marvell,function = "gpio";
  71. + };
  72. + pmx_btn_reset: pmx-btn-reset {
  73. + marvell,pins = "mpp48";
  74. + marvell,function = "gpio";
  75. + };
  76. + };
  77. +
  78. + rtc@10300 {
  79. + status = "disabled";
  80. + };
  81. +
  82. + serial@12000 {
  83. + status = "okay";
  84. + };
  85. +
  86. + };
  87. +
  88. + gpio_keys {
  89. + compatible = "gpio-keys";
  90. + #address-cells = <1>;
  91. + #size-cells = <0>;
  92. + pinctrl-0 = < &pmx_btn_wps &pmx_btn_reset >;
  93. + pinctrl-names = "default";
  94. +
  95. + button@15 {
  96. + label = "WPS Button";
  97. + linux,code = <KEY_WPS_BUTTON>;
  98. + gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
  99. + };
  100. +
  101. + button@16 {
  102. + label = "Reset Button";
  103. + linux,code = <KEY_RESTART>;
  104. + gpios = <&gpio1 16 GPIO_ACTIVE_LOW>;
  105. + };
  106. + };
  107. +
  108. + gpio-leds {
  109. + compatible = "gpio-leds";
  110. + pinctrl-0 = < &pmx_led_white_health &pmx_led_white_pulse >;
  111. + pinctrl-names = "default";
  112. +
  113. + white-health {
  114. + label = "viper:white:health";
  115. + gpios = <&gpio0 7 GPIO_ACTIVE_HIGH>;
  116. + };
  117. +
  118. + white-pulse {
  119. + label = "viper:white:pulse";
  120. + gpios = <&gpio0 14 GPIO_ACTIVE_HIGH>;
  121. + };
  122. + };
  123. +
  124. + mvsw61xx {
  125. + compatible = "marvell,88e6171";
  126. + status = "okay";
  127. + reg = <0x10>;
  128. +
  129. + mii-bus = <&mdio>;
  130. + cpu-port-0 = <5>;
  131. + cpu-port-1 = <6>;
  132. + is-indirect;
  133. + };
  134. +};
  135. +
  136. +&nand {
  137. + status = "okay";
  138. + pinctrl-0 = <&pmx_nand>;
  139. + pinctrl-names = "default";
  140. +
  141. + partition@0 {
  142. + label = "u-boot";
  143. + reg = <0x0 0x80000>;
  144. + };
  145. +
  146. + partition@80000 {
  147. + label = "u_env";
  148. + reg = <0x80000 0x20000>;
  149. + };
  150. +
  151. + partition@a0000 {
  152. + label = "s_env";
  153. + reg = <0xa0000 0x20000>;
  154. + };
  155. +
  156. + partition@200000 {
  157. + label = "kernel1";
  158. + reg = <0x200000 0x1a00000>;
  159. + };
  160. +
  161. + partition@4a0000 {
  162. + label = "rootfs1";
  163. + reg = <0x4a0000 0x1760000>;
  164. + };
  165. +
  166. + partition@1c00000 {
  167. + label = "kernel2";
  168. + reg = <0x1c00000 0x1a00000>;
  169. + };
  170. +
  171. + partition@1ea0000 {
  172. + label = "rootfs2";
  173. + reg = <0x1ea0000 0x1760000>;
  174. + };
  175. +
  176. + partition@3600000 {
  177. + label = "syscfg";
  178. + reg = <0x3600000 0x4a00000>;
  179. + };
  180. +};
  181. +
  182. +&mdio {
  183. + status = "okay";
  184. +};
  185. +
  186. +&eth0 {
  187. + status = "okay";
  188. + ethernet0-port@0 {
  189. + speed = <1000>;
  190. + duplex = <1>;
  191. + };
  192. +};
  193. +
  194. +&eth1 {
  195. + status = "okay";
  196. + ethernet1-port@0 {
  197. + speed = <1000>;
  198. + duplex = <1>;
  199. + };
  200. +};