vr9.dtsi 5.3 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260
  1. #include <dt-bindings/gpio/gpio.h>
  2. / {
  3. #address-cells = <1>;
  4. #size-cells = <1>;
  5. compatible = "lantiq,xway", "lantiq,vr9";
  6. aliases {
  7. serial0 = &asc1;
  8. };
  9. chosen {
  10. stdout-path = "serial0:115200n8";
  11. };
  12. cpus {
  13. cpu@0 {
  14. compatible = "mips,mips34Kc";
  15. };
  16. };
  17. memory@0 {
  18. device_type = "memory";
  19. };
  20. cputemp@0 {
  21. compatible = "lantiq,cputemp";
  22. };
  23. biu@1F800000 {
  24. #address-cells = <1>;
  25. #size-cells = <1>;
  26. compatible = "lantiq,biu", "simple-bus";
  27. reg = <0x1F800000 0x800000>;
  28. ranges = <0x0 0x1F800000 0x7FFFFF>;
  29. icu0: icu@80200 {
  30. #interrupt-cells = <1>;
  31. interrupt-controller;
  32. compatible = "lantiq,icu";
  33. reg = <0x80200 0x28
  34. 0x80228 0x28
  35. 0x80250 0x28
  36. 0x80278 0x28
  37. 0x802a0 0x28>;
  38. };
  39. watchdog@803F0 {
  40. compatible = "lantiq,wdt";
  41. reg = <0x803F0 0x10>;
  42. };
  43. };
  44. sram@1F000000 {
  45. #address-cells = <1>;
  46. #size-cells = <1>;
  47. compatible = "lantiq,sram", "simple-bus";
  48. reg = <0x1F000000 0x800000>;
  49. ranges = <0x0 0x1F000000 0x7FFFFF>;
  50. eiu0: eiu@101000 {
  51. #interrupt-cells = <1>;
  52. interrupt-controller;
  53. compatible = "lantiq,eiu-xway";
  54. reg = <0x101000 0x1000>;
  55. interrupt-parent = <&icu0>;
  56. lantiq,eiu-irqs = <166 135 66 40 41 42>;
  57. };
  58. pmu0: pmu@102000 {
  59. compatible = "lantiq,pmu-xway";
  60. reg = <0x102000 0x1000>;
  61. };
  62. cgu0: cgu@103000 {
  63. compatible = "lantiq,cgu-xway";
  64. reg = <0x103000 0x1000>;
  65. };
  66. dcdc@106a00 {
  67. compatible = "lantiq,dcdc-xrx200";
  68. reg = <0x106a00 0x200>;
  69. };
  70. vmmc@107000 {
  71. status = "disabled";
  72. compatible = "lantiq,vmmc-xway";
  73. reg = <0x103000 0x400>;
  74. interrupt-parent = <&icu0>;
  75. interrupts = <150 151 152 153 154 155>;
  76. };
  77. rcu0: rcu@203000 {
  78. compatible = "lantiq,rcu-xrx200";
  79. reg = <0x203000 0x1000>;
  80. /* irq for thermal sensor */
  81. interrupt-parent = <&icu0>;
  82. interrupts = <115>;
  83. };
  84. xbar0: xbar@400000 {
  85. compatible = "lantiq,xbar-xway";
  86. reg = <0x400000 0x1000>;
  87. };
  88. };
  89. fpi@10000000 {
  90. #address-cells = <1>;
  91. #size-cells = <1>;
  92. compatible = "lantiq,fpi", "simple-bus";
  93. ranges = <0x0 0x10000000 0xEEFFFFF>;
  94. reg = <0x10000000 0xEF00000>;
  95. localbus@0 {
  96. #address-cells = <2>;
  97. #size-cells = <1>;
  98. ranges = <0 0 0x0 0x3ffffff /* addrsel0 */
  99. 1 0 0x4000000 0x4000010>; /* addsel1 */
  100. compatible = "lantiq,localbus", "simple-bus";
  101. };
  102. gptu@E100A00 {
  103. compatible = "lantiq,gptu-xway";
  104. reg = <0xE100A00 0x100>;
  105. interrupt-parent = <&icu0>;
  106. interrupts = <126 127 128 129 130 131>;
  107. };
  108. asc0: serial@E100400 {
  109. compatible = "lantiq,asc";
  110. reg = <0xE100400 0x400>;
  111. interrupt-parent = <&icu0>;
  112. interrupts = <104 105 106>;
  113. status = "disabled";
  114. };
  115. spi: spi@E100800 {
  116. compatible = "lantiq,xrx200-spi";
  117. reg = <0xE100800 0x100>;
  118. interrupt-parent = <&icu0>;
  119. interrupts = <22 23 24>;
  120. interrupt-names = "spi_rx", "spi_tx", "spi_err",
  121. "spi_frm";
  122. #address-cells = <1>;
  123. #size-cells = <1>;
  124. status = "disabled";
  125. };
  126. gpio: pinmux@E100B10 {
  127. compatible = "lantiq,xrx200-pinctrl";
  128. #gpio-cells = <2>;
  129. gpio-controller;
  130. reg = <0xE100B10 0xA0>;
  131. };
  132. asc1: serial@E100C00 {
  133. compatible = "lantiq,asc";
  134. reg = <0xE100C00 0x400>;
  135. interrupt-parent = <&icu0>;
  136. interrupts = <112 113 114>;
  137. };
  138. deu@E103100 {
  139. compatible = "lantiq,deu-xrx200";
  140. reg = <0xE103100 0xf00>;
  141. };
  142. dma0: dma@E104100 {
  143. compatible = "lantiq,dma-xway";
  144. reg = <0xE104100 0x800>;
  145. };
  146. ebu0: ebu@E105300 {
  147. compatible = "lantiq,ebu-xway";
  148. reg = <0xE105300 0x100>;
  149. };
  150. ifxhcd@E101000 {
  151. status = "disabled";
  152. compatible = "lantiq,xrx200-usb", "lantiq,ifxhcd-xrx200";
  153. reg = <0xE101000 0x1000
  154. 0xE120000 0x3f000>;
  155. interrupt-parent = <&icu0>;
  156. interrupts = <62 91>;
  157. dr_mode = "host";
  158. };
  159. ifxhcd@E106000 {
  160. status = "disabled";
  161. compatible = "lantiq,xrx200-usb";
  162. reg = <0xE106000 0x1000>;
  163. interrupt-parent = <&icu0>;
  164. interrupts = <91>;
  165. dr_mode = "host";
  166. };
  167. eth0: eth@E108000 {
  168. #address-cells = <1>;
  169. #size-cells = <0>;
  170. compatible = "lantiq,xrx200-net";
  171. reg = < 0xE108000 0x3000 /* switch */
  172. 0xE10B100 0x70 /* mdio */
  173. 0xE10B1D8 0x30 /* mii */
  174. 0xE10B308 0x30 /* pmac */
  175. >;
  176. interrupt-parent = <&icu0>;
  177. interrupts = <75 73 72>;
  178. };
  179. mei@E116000 {
  180. compatible = "lantiq,mei-xrx200";
  181. reg = <0xE116000 0x9c>;
  182. interrupt-parent = <&icu0>;
  183. interrupts = <63>;
  184. };
  185. ppe@E234000 {
  186. compatible = "lantiq,ppe-xrx200";
  187. interrupt-parent = <&icu0>;
  188. interrupts = <96>;
  189. };
  190. pcie0: pcie@d900000 {
  191. compatible = "lantiq,pcie-xrx200";
  192. #interrupt-cells = <1>;
  193. #size-cells = <2>;
  194. #address-cells = <3>;
  195. interrupt-parent = <&icu0>;
  196. interrupts = <161 144>;
  197. device_type = "pci";
  198. gpio-reset = <&gpio 38 GPIO_ACTIVE_HIGH>;
  199. };
  200. pci0: pci@E105400 {
  201. status = "disabled";
  202. #address-cells = <3>;
  203. #size-cells = <2>;
  204. #interrupt-cells = <1>;
  205. compatible = "lantiq,pci-xway";
  206. bus-range = <0x0 0x0>;
  207. ranges = <0x2000000 0 0x8000000 0x8000000 0 0x2000000 /* pci memory */
  208. 0x1000000 0 0x00000000 0xAE00000 0 0x200000>; /* io space */
  209. reg = <0x7000000 0x8000 /* config space */
  210. 0xE105400 0x400>; /* pci bridge */
  211. lantiq,bus-clock = <33333333>;
  212. interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
  213. interrupt-map = <0x7000 0 0 1 &icu0 30 1>; /* slot 14, irq 30 */
  214. req-mask = <0x1>; /* GNT1 */
  215. };
  216. };
  217. vdsl {
  218. compatible = "lantiq,vdsl-vrx200";
  219. };
  220. };