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- From ad6176d72132d020317db1496be1485056ac88d7 Mon Sep 17 00:00:00 2001
- From: Liu Gang <Gang.Liu@nxp.com>
- Date: Mon, 6 Jun 2016 15:46:00 +0800
- Subject: [PATCH 28/70] dts/ls1043: update dts for ls1043
- Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
- ---
- arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts | 59 +++++
- arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi | 264 +++++++++++++++++++-
- .../boot/dts/freescale/qoriq-qman1-portals.dtsi | 10 +-
- 3 files changed, 321 insertions(+), 12 deletions(-)
- --- a/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts
- +++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts
- @@ -50,6 +50,10 @@
- / {
- model = "LS1043A RDB Board";
- compatible = "fsl,ls1043a-rdb", "fsl,ls1043a";
- +
- + aliases {
- + crypto = &crypto;
- + };
- };
-
- &i2c0 {
- @@ -108,6 +112,35 @@
- };
- };
-
- +&dspi0 {
- + bus-num = <0>;
- + status = "okay";
- +
- + flash@0 {
- + #address-cells = <1>;
- + #size-cells = <1>;
- + compatible = "n25q128a13", "jedec,spi-nor"; /* 16MB */
- + reg = <0>;
- + spi-max-frequency = <1000000>; /* input clock */
- + };
- +
- + slic@2 {
- + compatible = "maxim,ds26522";
- + reg = <2>;
- + spi-max-frequency = <2000000>;
- + fsl,spi-cs-sck-delay = <100>;
- + fsl,spi-sck-cs-delay = <50>;
- + };
- +
- + slic@3 {
- + compatible = "maxim,ds26522";
- + reg = <3>;
- + spi-max-frequency = <2000000>;
- + fsl,spi-cs-sck-delay = <100>;
- + fsl,spi-sck-cs-delay = <50>;
- + };
- +};
- +
- &duart0 {
- status = "okay";
- };
- @@ -176,7 +209,33 @@
- mdio@fd000 {
- aqr105_phy: ethernet-phy@c {
- compatible = "ethernet-phy-ieee802.3-c45";
- + interrupts = <0 132 4>;
- reg = <0x1>;
- };
- };
- };
- +
- +&uqe {
- + ucc_hdlc: ucc@2000 {
- + compatible = "fsl,ucc_hdlc";
- + rx-clock-name = "clk8";
- + tx-clock-name = "clk9";
- + fsl,rx-sync-clock = "rsync_pin";
- + fsl,tx-sync-clock = "tsync_pin";
- + fsl,tx-timeslot = <0xfffffffe>;
- + fsl,rx-timeslot = <0xfffffffe>;
- + fsl,tdm-framer-type = "e1";
- + fsl,tdm-mode = "normal";
- + fsl,tdm-id = <0>;
- + fsl,siram-entry-id = <0>;
- + fsl,tdm-interface;
- + };
- +
- + ucc_serial: ucc@2200 {
- + device_type = "serial";
- + compatible = "ucc_uart";
- + port-number = <0>;
- + rx-clock-name = "brg2";
- + tx-clock-name = "brg2";
- + };
- +};
- --- a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
- +++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
- @@ -44,6 +44,8 @@
- * OTHER DEALINGS IN THE SOFTWARE.
- */
-
- +#include <dt-bindings/thermal/thermal.h>
- +
- / {
- compatible = "fsl,ls1043a";
- interrupt-parent = <&gic>;
- @@ -75,6 +77,7 @@
- compatible = "arm,cortex-a53";
- reg = <0x0>;
- clocks = <&clockgen 1 0>;
- + #cooling-cells = <2>;
- };
-
- cpu1: cpu@1 {
- @@ -118,6 +121,8 @@
- <1 14 0x1>, /* Physical Non-Secure PPI */
- <1 11 0x1>, /* Virtual PPI */
- <1 10 0x1>; /* Hypervisor PPI */
- + arm,reread-timer;
- + fsl,erratum-a008585;
- };
-
- pmu {
- @@ -162,11 +167,64 @@
- big-endian;
- };
-
- + crypto: crypto@1700000 {
- + compatible = "fsl,sec-v5.4", "fsl,sec-v5.0",
- + "fsl,sec-v4.0";
- + fsl,sec-era = <3>;
- + #address-cells = <1>;
- + #size-cells = <1>;
- + ranges = <0x0 0x00 0x1700000 0x100000>;
- + reg = <0x00 0x1700000 0x0 0x100000>;
- + interrupts = <0 75 0x4>;
- +
- + sec_jr0: jr@10000 {
- + compatible = "fsl,sec-v5.4-job-ring",
- + "fsl,sec-v5.0-job-ring",
- + "fsl,sec-v4.0-job-ring";
- + reg = <0x10000 0x10000>;
- + interrupts = <0 71 0x4>;
- + };
- +
- + sec_jr1: jr@20000 {
- + compatible = "fsl,sec-v5.4-job-ring",
- + "fsl,sec-v5.0-job-ring",
- + "fsl,sec-v4.0-job-ring";
- + reg = <0x20000 0x10000>;
- + interrupts = <0 72 0x4>;
- + };
- +
- + sec_jr2: jr@30000 {
- + compatible = "fsl,sec-v5.4-job-ring",
- + "fsl,sec-v5.0-job-ring",
- + "fsl,sec-v4.0-job-ring";
- + interrupts = <0 73 0x4>;
- + };
- +
- + sec_jr3: jr@40000 {
- + compatible = "fsl,sec-v5.4-job-ring",
- + "fsl,sec-v5.0-job-ring",
- + "fsl,sec-v4.0-job-ring";
- + reg = <0x40000 0x10000>;
- + interrupts = <0 74 0x4>;
- + };
- + };
- +
- dcfg: dcfg@1ee0000 {
- compatible = "fsl,ls1043a-dcfg", "syscon";
- reg = <0x0 0x1ee0000 0x0 0x10000>;
- };
-
- + reset: reset@1EE00B0 {
- + compatible = "fsl,ls-reset";
- + reg = <0x0 0x1EE00B0 0x0 0x4>;
- + big-endian;
- + };
- +
- + rcpm: rcpm@1ee2000 {
- + compatible = "fsl,ls1043a-rcpm", "fsl,qoriq-rcpm-2.1";
- + reg = <0x0 0x1ee2000 0x0 0x10000>;
- + };
- +
- ifc: ifc@1530000 {
- compatible = "fsl,ifc", "simple-bus";
- reg = <0x0 0x1530000 0x0 0x10000>;
- @@ -501,6 +559,82 @@
- };
- };
-
- + tmu: tmu@1f00000 {
- + compatible = "fsl,qoriq-tmu", "fsl,ls1043a-tmu";
- + reg = <0x0 0x1f00000 0x0 0x10000>;
- + interrupts = <0 33 0x4>;
- + fsl,tmu-range = <0xb0000 0x9002a 0x6004c 0x30062>;
- + fsl,tmu-calibration = <0x00000000 0x00000026
- + 0x00000001 0x0000002d
- + 0x00000002 0x00000032
- + 0x00000003 0x00000039
- + 0x00000004 0x0000003f
- + 0x00000005 0x00000046
- + 0x00000006 0x0000004d
- + 0x00000007 0x00000054
- + 0x00000008 0x0000005a
- + 0x00000009 0x00000061
- + 0x0000000a 0x0000006a
- + 0x0000000b 0x00000071
- +
- + 0x00010000 0x00000025
- + 0x00010001 0x0000002c
- + 0x00010002 0x00000035
- + 0x00010003 0x0000003d
- + 0x00010004 0x00000045
- + 0x00010005 0x0000004e
- + 0x00010006 0x00000057
- + 0x00010007 0x00000061
- + 0x00010008 0x0000006b
- + 0x00010009 0x00000076
- +
- + 0x00020000 0x00000029
- + 0x00020001 0x00000033
- + 0x00020002 0x0000003d
- + 0x00020003 0x00000049
- + 0x00020004 0x00000056
- + 0x00020005 0x00000061
- + 0x00020006 0x0000006d
- +
- + 0x00030000 0x00000021
- + 0x00030001 0x0000002a
- + 0x00030002 0x0000003c
- + 0x00030003 0x0000004e>;
- + big-endian;
- + #thermal-sensor-cells = <1>;
- + };
- +
- + thermal-zones {
- + cpu_thermal: cpu-thermal {
- + polling-delay-passive = <1000>;
- + polling-delay = <5000>;
- +
- + thermal-sensors = <&tmu 3>;
- +
- + trips {
- + cpu_alert: cpu-alert {
- + temperature = <85000>;
- + hysteresis = <2000>;
- + type = "passive";
- + };
- + cpu_crit: cpu-crit {
- + temperature = <95000>;
- + hysteresis = <2000>;
- + type = "critical";
- + };
- + };
- +
- + cooling-maps {
- + map0 {
- + trip = <&cpu_alert>;
- + cooling-device =
- + <&cpu0 THERMAL_NO_LIMIT
- + THERMAL_NO_LIMIT>;
- + };
- + };
- + };
- + };
- +
- dspi0: dspi@2100000 {
- compatible = "fsl,ls1043a-dspi", "fsl,ls1021a-v1.0-dspi";
- #address-cells = <1>;
- @@ -527,6 +661,20 @@
- status = "disabled";
- };
-
- + qspi: quadspi@1550000 {
- + compatible = "fsl,ls1043a-qspi", "fsl,ls1021a-qspi";
- + #address-cells = <1>;
- + #size-cells = <0>;
- + reg = <0x0 0x1550000 0x0 0x10000>,
- + <0x0 0x40000000 0x0 0x4000000>;
- + reg-names = "QuadSPI", "QuadSPI-memory";
- + interrupts = <0 99 0x4>;
- + clock-names = "qspi_en", "qspi";
- + clocks = <&clockgen 4 0>, <&clockgen 4 0>;
- + big-endian;
- + status = "disabled";
- + };
- +
- i2c0: i2c@2180000 {
- compatible = "fsl,vf610-i2c";
- #address-cells = <1>;
- @@ -602,8 +750,8 @@
- clocks = <&clockgen 4 0>;
- };
-
- - gpio1: gpio@2300000 {
- - compatible = "fsl,ls1043a-gpio";
- + gpio0: gpio@2300000 {
- + compatible = "fsl,qoriq-gpio";
- reg = <0x0 0x2300000 0x0 0x10000>;
- interrupts = <0 66 0x4>;
- gpio-controller;
- @@ -612,8 +760,8 @@
- #interrupt-cells = <2>;
- };
-
- - gpio2: gpio@2310000 {
- - compatible = "fsl,ls1043a-gpio";
- + gpio1: gpio@2310000 {
- + compatible = "fsl,qoriq-gpio";
- reg = <0x0 0x2310000 0x0 0x10000>;
- interrupts = <0 67 0x4>;
- gpio-controller;
- @@ -622,8 +770,8 @@
- #interrupt-cells = <2>;
- };
-
- - gpio3: gpio@2320000 {
- - compatible = "fsl,ls1043a-gpio";
- + gpio2: gpio@2320000 {
- + compatible = "fsl,qoriq-gpio";
- reg = <0x0 0x2320000 0x0 0x10000>;
- interrupts = <0 68 0x4>;
- gpio-controller;
- @@ -632,8 +780,8 @@
- #interrupt-cells = <2>;
- };
-
- - gpio4: gpio@2330000 {
- - compatible = "fsl,ls1043a-gpio";
- + gpio3: gpio@2330000 {
- + compatible = "fsl,qoriq-gpio";
- reg = <0x0 0x2330000 0x0 0x10000>;
- interrupts = <0 134 0x4>;
- gpio-controller;
- @@ -642,6 +790,70 @@
- #interrupt-cells = <2>;
- };
-
- + uqe: uqe@2400000 {
- + #address-cells = <1>;
- + #size-cells = <1>;
- + device_type = "qe";
- + compatible = "fsl,qe", "simple-bus";
- + ranges = <0x0 0x0 0x2400000 0x40000>;
- + reg = <0x0 0x2400000 0x0 0x480>;
- + brg-frequency = <100000000>;
- + bus-frequency = <200000000>;
- +
- + fsl,qe-num-riscs = <1>;
- + fsl,qe-num-snums = <28>;
- +
- + qeic: qeic@80 {
- + compatible = "fsl,qe-ic";
- + reg = <0x80 0x80>;
- + #address-cells = <0>;
- + interrupt-controller;
- + #interrupt-cells = <1>;
- + interrupts = <0 77 0x04 0 77 0x04>;
- + };
- +
- + si1: si@700 {
- + #address-cells = <1>;
- + #size-cells = <0>;
- + compatible = "fsl,qe-si";
- + reg = <0x700 0x80>;
- + };
- +
- + siram1: siram@1000 {
- + #address-cells = <1>;
- + #size-cells = <1>;
- + compatible = "fsl,qe-siram";
- + reg = <0x1000 0x800>;
- + };
- +
- + ucc@2000 {
- + cell-index = <1>;
- + reg = <0x2000 0x200>;
- + interrupts = <32>;
- + interrupt-parent = <&qeic>;
- + };
- +
- + ucc@2200 {
- + cell-index = <3>;
- + reg = <0x2200 0x200>;
- + interrupts = <34>;
- + interrupt-parent = <&qeic>;
- + };
- +
- + muram@10000 {
- + #address-cells = <1>;
- + #size-cells = <1>;
- + compatible = "fsl,qe-muram", "fsl,cpm-muram";
- + ranges = <0x0 0x10000 0x6000>;
- +
- + data-only@0 {
- + compatible = "fsl,qe-muram-data",
- + "fsl,cpm-muram-data";
- + reg = <0x0 0x6000>;
- + };
- + };
- + };
- +
- lpuart0: serial@2950000 {
- compatible = "fsl,ls1021a-lpuart";
- reg = <0x0 0x2950000 0x0 0x1000>;
- @@ -696,6 +908,15 @@
- status = "disabled";
- };
-
- + ftm0: ftm0@29d0000 {
- + compatible = "fsl,ftm-alarm";
- + reg = <0x0 0x29d0000 0x0 0x10000>;
- + interrupts = <0 86 0x4>;
- + big-endian;
- + rcpm-wakeup = <&rcpm 0x0 0x20000000>;
- + status = "okay";
- + };
- +
- wdog0: wdog@2ad0000 {
- compatible = "fsl,ls1043a-wdt", "fsl,imx21-wdt";
- reg = <0x0 0x2ad0000 0x0 0x10000>;
- @@ -726,6 +947,8 @@
- reg = <0x0 0x2f00000 0x0 0x10000>;
- interrupts = <0 60 0x4>;
- dr_mode = "host";
- + configure-gfladj;
- + snps,dis_rxdet_inp3_quirk;
- };
-
- usb1: usb3@3000000 {
- @@ -733,6 +956,8 @@
- reg = <0x0 0x3000000 0x0 0x10000>;
- interrupts = <0 61 0x4>;
- dr_mode = "host";
- + configure-gfladj;
- + snps,dis_rxdet_inp3_quirk;
- };
-
- usb2: usb3@3100000 {
- @@ -740,6 +965,8 @@
- reg = <0x0 0x3100000 0x0 0x10000>;
- interrupts = <0 63 0x4>;
- dr_mode = "host";
- + configure-gfladj;
- + snps,dis_rxdet_inp3_quirk;
- };
-
- sata: sata@3200000 {
- @@ -749,6 +976,20 @@
- clocks = <&clockgen 4 0>;
- };
-
- + qdma: qdma@8380000 {
- + compatible = "fsl,ls1021a-qdma", "fsl,ls1043a-qdma";
- + reg = <0x0 0x838f000 0x0 0x11000 /* Controller regs */
- + 0x0 0x83a0000 0x0 0x40000>; /* Block regs */
- + interrupts = <0 152 0x4>,
- + <0 39 0x4>;
- + interrupt-names = "qdma-error", "qdma-queue";
- + channels = <8>;
- + queues = <2>;
- + status-sizes = <64>;
- + queue-sizes = <64 64>;
- + big-endian;
- + };
- +
- msi1: msi-controller1@1571000 {
- compatible = "fsl,1s1043a-msi";
- reg = <0x0 0x1571000 0x0 0x4>,
- @@ -787,6 +1028,7 @@
- #address-cells = <3>;
- #size-cells = <2>;
- device_type = "pci";
- + dma-coherent;
- num-lanes = <4>;
- bus-range = <0x0 0xff>;
- ranges = <0x81000000 0x0 0x00000000 0x40 0x00010000 0x0 0x00010000 /* downstream I/O */
- @@ -811,6 +1053,7 @@
- #address-cells = <3>;
- #size-cells = <2>;
- device_type = "pci";
- + dma-coherent;
- num-lanes = <2>;
- bus-range = <0x0 0xff>;
- ranges = <0x81000000 0x0 0x00000000 0x48 0x00010000 0x0 0x00010000 /* downstream I/O */
- @@ -835,6 +1078,7 @@
- #address-cells = <3>;
- #size-cells = <2>;
- device_type = "pci";
- + dma-coherent;
- num-lanes = <2>;
- bus-range = <0x0 0xff>;
- ranges = <0x81000000 0x0 0x00000000 0x50 0x00010000 0x0 0x00010000 /* downstream I/O */
- @@ -897,8 +1141,8 @@
- alignment = <0 0x1000000>;
- };
- qman_fqd: qman-fqd {
- - size = <0 0x400000>;
- - alignment = <0 0x400000>;
- + size = <0 0x800000>;
- + alignment = <0 0x800000>;
- };
- qman_pfdr: qman-pfdr {
- size = <0 0x2000000>;
- --- a/arch/arm64/boot/dts/freescale/qoriq-qman1-portals.dtsi
- +++ b/arch/arm64/boot/dts/freescale/qoriq-qman1-portals.dtsi
- @@ -132,5 +132,11 @@
- compatible = "fsl,cgrid-range";
- fsl,cgrid-range = <0 256>;
- };
- -
- -};
- \ No newline at end of file
- + qman-ceetm@0 {
- + compatible = "fsl,qman-ceetm";
- + fsl,ceetm-lfqid-range = <0xf00000 0x1000>;
- + fsl,ceetm-sp-range = <0 12>;
- + fsl,ceetm-lni-range = <0 8>;
- + fsl,ceetm-channel-range = <0 32>;
- + };
- +};
|