0039-soc-mediatek-PMIC-wrap-add-a-slave-specific-struct.patch 10 KB

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  1. From 21bdcd324f769545b1765fe391d939a1edd07cbb Mon Sep 17 00:00:00 2001
  2. From: John Crispin <blogic@openwrt.org>
  3. Date: Wed, 20 Jan 2016 09:55:08 +0100
  4. Subject: [PATCH 039/102] soc: mediatek: PMIC wrap: add a slave specific
  5. struct
  6. This patch adds a new struct pwrap_slv_type that we use to store the slave
  7. specific data. The patch adds 2 new helper functions to access the dew
  8. registers. The slave type is looked up via the wrappers child node.
  9. Signed-off-by: John Crispin <blogic@openwrt.org>
  10. ---
  11. drivers/soc/mediatek/mtk-pmic-wrap.c | 159 ++++++++++++++++++++++++----------
  12. 1 file changed, 112 insertions(+), 47 deletions(-)
  13. --- a/drivers/soc/mediatek/mtk-pmic-wrap.c
  14. +++ b/drivers/soc/mediatek/mtk-pmic-wrap.c
  15. @@ -69,33 +69,54 @@
  16. PWRAP_WDT_SRC_EN_HARB_STAUPD_DLE | \
  17. PWRAP_WDT_SRC_EN_HARB_STAUPD_ALE)
  18. -/* macro for slave device wrapper registers */
  19. -#define PWRAP_DEW_BASE 0xbc00
  20. -#define PWRAP_DEW_EVENT_OUT_EN (PWRAP_DEW_BASE + 0x0)
  21. -#define PWRAP_DEW_DIO_EN (PWRAP_DEW_BASE + 0x2)
  22. -#define PWRAP_DEW_EVENT_SRC_EN (PWRAP_DEW_BASE + 0x4)
  23. -#define PWRAP_DEW_EVENT_SRC (PWRAP_DEW_BASE + 0x6)
  24. -#define PWRAP_DEW_EVENT_FLAG (PWRAP_DEW_BASE + 0x8)
  25. -#define PWRAP_DEW_READ_TEST (PWRAP_DEW_BASE + 0xa)
  26. -#define PWRAP_DEW_WRITE_TEST (PWRAP_DEW_BASE + 0xc)
  27. -#define PWRAP_DEW_CRC_EN (PWRAP_DEW_BASE + 0xe)
  28. -#define PWRAP_DEW_CRC_VAL (PWRAP_DEW_BASE + 0x10)
  29. -#define PWRAP_DEW_MON_GRP_SEL (PWRAP_DEW_BASE + 0x12)
  30. -#define PWRAP_DEW_MON_FLAG_SEL (PWRAP_DEW_BASE + 0x14)
  31. -#define PWRAP_DEW_EVENT_TEST (PWRAP_DEW_BASE + 0x16)
  32. -#define PWRAP_DEW_CIPHER_KEY_SEL (PWRAP_DEW_BASE + 0x18)
  33. -#define PWRAP_DEW_CIPHER_IV_SEL (PWRAP_DEW_BASE + 0x1a)
  34. -#define PWRAP_DEW_CIPHER_LOAD (PWRAP_DEW_BASE + 0x1c)
  35. -#define PWRAP_DEW_CIPHER_START (PWRAP_DEW_BASE + 0x1e)
  36. -#define PWRAP_DEW_CIPHER_RDY (PWRAP_DEW_BASE + 0x20)
  37. -#define PWRAP_DEW_CIPHER_MODE (PWRAP_DEW_BASE + 0x22)
  38. -#define PWRAP_DEW_CIPHER_SWRST (PWRAP_DEW_BASE + 0x24)
  39. -#define PWRAP_MT8173_DEW_CIPHER_IV0 (PWRAP_DEW_BASE + 0x26)
  40. -#define PWRAP_MT8173_DEW_CIPHER_IV1 (PWRAP_DEW_BASE + 0x28)
  41. -#define PWRAP_MT8173_DEW_CIPHER_IV2 (PWRAP_DEW_BASE + 0x2a)
  42. -#define PWRAP_MT8173_DEW_CIPHER_IV3 (PWRAP_DEW_BASE + 0x2c)
  43. -#define PWRAP_MT8173_DEW_CIPHER_IV4 (PWRAP_DEW_BASE + 0x2e)
  44. -#define PWRAP_MT8173_DEW_CIPHER_IV5 (PWRAP_DEW_BASE + 0x30)
  45. +/* defines for slave device wrapper registers */
  46. +enum dew_regs {
  47. + PWRAP_DEW_BASE,
  48. + PWRAP_DEW_DIO_EN,
  49. + PWRAP_DEW_READ_TEST,
  50. + PWRAP_DEW_WRITE_TEST,
  51. + PWRAP_DEW_CRC_EN,
  52. + PWRAP_DEW_CRC_VAL,
  53. + PWRAP_DEW_MON_GRP_SEL,
  54. + PWRAP_DEW_CIPHER_KEY_SEL,
  55. + PWRAP_DEW_CIPHER_IV_SEL,
  56. + PWRAP_DEW_CIPHER_RDY,
  57. + PWRAP_DEW_CIPHER_MODE,
  58. + PWRAP_DEW_CIPHER_SWRST,
  59. +
  60. + /* MT6397 only regs */
  61. + PWRAP_DEW_EVENT_OUT_EN,
  62. + PWRAP_DEW_EVENT_SRC_EN,
  63. + PWRAP_DEW_EVENT_SRC,
  64. + PWRAP_DEW_EVENT_FLAG,
  65. + PWRAP_DEW_MON_FLAG_SEL,
  66. + PWRAP_DEW_EVENT_TEST,
  67. + PWRAP_DEW_CIPHER_LOAD,
  68. + PWRAP_DEW_CIPHER_START,
  69. +};
  70. +
  71. +static const u32 mt6397_regs[] = {
  72. + [PWRAP_DEW_BASE] = 0xbc00,
  73. + [PWRAP_DEW_EVENT_OUT_EN] = 0xbc00,
  74. + [PWRAP_DEW_DIO_EN] = 0xbc02,
  75. + [PWRAP_DEW_EVENT_SRC_EN] = 0xbc04,
  76. + [PWRAP_DEW_EVENT_SRC] = 0xbc06,
  77. + [PWRAP_DEW_EVENT_FLAG] = 0xbc08,
  78. + [PWRAP_DEW_READ_TEST] = 0xbc0a,
  79. + [PWRAP_DEW_WRITE_TEST] = 0xbc0c,
  80. + [PWRAP_DEW_CRC_EN] = 0xbc0e,
  81. + [PWRAP_DEW_CRC_VAL] = 0xbc10,
  82. + [PWRAP_DEW_MON_GRP_SEL] = 0xbc12,
  83. + [PWRAP_DEW_MON_FLAG_SEL] = 0xbc14,
  84. + [PWRAP_DEW_EVENT_TEST] = 0xbc16,
  85. + [PWRAP_DEW_CIPHER_KEY_SEL] = 0xbc18,
  86. + [PWRAP_DEW_CIPHER_IV_SEL] = 0xbc1a,
  87. + [PWRAP_DEW_CIPHER_LOAD] = 0xbc1c,
  88. + [PWRAP_DEW_CIPHER_START] = 0xbc1e,
  89. + [PWRAP_DEW_CIPHER_RDY] = 0xbc20,
  90. + [PWRAP_DEW_CIPHER_MODE] = 0xbc22,
  91. + [PWRAP_DEW_CIPHER_SWRST] = 0xbc24,
  92. +};
  93. enum pwrap_regs {
  94. PWRAP_MUX_SEL,
  95. @@ -349,16 +370,26 @@ static int mt8135_regs[] = {
  96. [PWRAP_DCM_DBC_PRD] = 0x160,
  97. };
  98. +enum pmic_type {
  99. + PMIC_MT6397,
  100. +};
  101. +
  102. enum pwrap_type {
  103. PWRAP_MT8135,
  104. PWRAP_MT8173,
  105. };
  106. +struct pwrap_slv_type {
  107. + const u32 *dew_regs;
  108. + enum pmic_type type;
  109. +};
  110. +
  111. struct pmic_wrapper {
  112. struct device *dev;
  113. void __iomem *base;
  114. struct regmap *regmap;
  115. const struct pmic_wrapper_type *master;
  116. + const struct pwrap_slv_type *slave;
  117. struct clk *clk_spi;
  118. struct clk *clk_wrap;
  119. struct reset_control *rstc;
  120. @@ -544,7 +575,8 @@ static int pwrap_init_sidly(struct pmic_
  121. for (i = 0; i < 4; i++) {
  122. pwrap_writel(wrp, i, PWRAP_SIDLY);
  123. - pwrap_read(wrp, PWRAP_DEW_READ_TEST, &rdata);
  124. + pwrap_read(wrp, wrp->slave->dew_regs[PWRAP_DEW_READ_TEST],
  125. + &rdata);
  126. if (rdata == PWRAP_DEW_READ_TEST_VAL) {
  127. dev_dbg(wrp->dev, "[Read Test] pass, SIDLY=%x\n", i);
  128. pass |= 1 << i;
  129. @@ -593,7 +625,8 @@ static bool pwrap_is_pmic_cipher_ready(s
  130. u32 rdata;
  131. int ret;
  132. - ret = pwrap_read(wrp, PWRAP_DEW_CIPHER_RDY, &rdata);
  133. + ret = pwrap_read(wrp, wrp->slave->dew_regs[PWRAP_DEW_CIPHER_RDY],
  134. + &rdata);
  135. if (ret)
  136. return 0;
  137. @@ -621,12 +654,12 @@ static int pwrap_init_cipher(struct pmic
  138. }
  139. /* Config cipher mode @PMIC */
  140. - pwrap_write(wrp, PWRAP_DEW_CIPHER_SWRST, 0x1);
  141. - pwrap_write(wrp, PWRAP_DEW_CIPHER_SWRST, 0x0);
  142. - pwrap_write(wrp, PWRAP_DEW_CIPHER_KEY_SEL, 0x1);
  143. - pwrap_write(wrp, PWRAP_DEW_CIPHER_IV_SEL, 0x2);
  144. - pwrap_write(wrp, PWRAP_DEW_CIPHER_LOAD, 0x1);
  145. - pwrap_write(wrp, PWRAP_DEW_CIPHER_START, 0x1);
  146. + pwrap_write(wrp, wrp->slave->dew_regs[PWRAP_DEW_CIPHER_SWRST], 0x1);
  147. + pwrap_write(wrp, wrp->slave->dew_regs[PWRAP_DEW_CIPHER_SWRST], 0x0);
  148. + pwrap_write(wrp, wrp->slave->dew_regs[PWRAP_DEW_CIPHER_KEY_SEL], 0x1);
  149. + pwrap_write(wrp, wrp->slave->dew_regs[PWRAP_DEW_CIPHER_IV_SEL], 0x2);
  150. + pwrap_write(wrp, wrp->slave->dew_regs[PWRAP_DEW_CIPHER_LOAD], 0x1);
  151. + pwrap_write(wrp, wrp->slave->dew_regs[PWRAP_DEW_CIPHER_START], 0x1);
  152. /* wait for cipher data ready@AP */
  153. ret = pwrap_wait_for_state(wrp, pwrap_is_cipher_ready);
  154. @@ -643,7 +676,7 @@ static int pwrap_init_cipher(struct pmic
  155. }
  156. /* wait for cipher mode idle */
  157. - pwrap_write(wrp, PWRAP_DEW_CIPHER_MODE, 0x1);
  158. + pwrap_write(wrp, wrp->slave->dew_regs[PWRAP_DEW_CIPHER_MODE], 0x1);
  159. ret = pwrap_wait_for_state(wrp, pwrap_is_fsm_idle_and_sync_idle);
  160. if (ret) {
  161. dev_err(wrp->dev, "cipher mode idle fail, ret=%d\n", ret);
  162. @@ -653,9 +686,11 @@ static int pwrap_init_cipher(struct pmic
  163. pwrap_writel(wrp, 1, PWRAP_CIPHER_MODE);
  164. /* Write Test */
  165. - if (pwrap_write(wrp, PWRAP_DEW_WRITE_TEST, PWRAP_DEW_WRITE_TEST_VAL) ||
  166. - pwrap_read(wrp, PWRAP_DEW_WRITE_TEST, &rdata) ||
  167. - (rdata != PWRAP_DEW_WRITE_TEST_VAL)) {
  168. + if (pwrap_write(wrp, wrp->slave->dew_regs[PWRAP_DEW_WRITE_TEST],
  169. + PWRAP_DEW_WRITE_TEST_VAL) ||
  170. + pwrap_read(wrp, wrp->slave->dew_regs[PWRAP_DEW_WRITE_TEST],
  171. + &rdata) ||
  172. + (rdata != PWRAP_DEW_WRITE_TEST_VAL)) {
  173. dev_err(wrp->dev, "rdata=0x%04X\n", rdata);
  174. return -EFAULT;
  175. }
  176. @@ -677,8 +712,10 @@ static int pwrap_mt8135_init_soc_specifi
  177. writel(0x7ff, wrp->bridge_base + PWRAP_MT8135_BRIDGE_INT_EN);
  178. /* enable PMIC event out and sources */
  179. - if (pwrap_write(wrp, PWRAP_DEW_EVENT_OUT_EN, 0x1) ||
  180. - pwrap_write(wrp, PWRAP_DEW_EVENT_SRC_EN, 0xffff)) {
  181. + if (pwrap_write(wrp, wrp->slave->dew_regs[PWRAP_DEW_EVENT_OUT_EN],
  182. + 0x1) ||
  183. + pwrap_write(wrp, wrp->slave->dew_regs[PWRAP_DEW_EVENT_SRC_EN],
  184. + 0xffff)) {
  185. dev_err(wrp->dev, "enable dewrap fail\n");
  186. return -EFAULT;
  187. }
  188. @@ -689,8 +726,10 @@ static int pwrap_mt8135_init_soc_specifi
  189. static int pwrap_mt8173_init_soc_specific(struct pmic_wrapper *wrp)
  190. {
  191. /* PMIC_DEWRAP enables */
  192. - if (pwrap_write(wrp, PWRAP_DEW_EVENT_OUT_EN, 0x1) ||
  193. - pwrap_write(wrp, PWRAP_DEW_EVENT_SRC_EN, 0xffff)) {
  194. + if (pwrap_write(wrp, wrp->slave->dew_regs[PWRAP_DEW_EVENT_OUT_EN],
  195. + 0x1) ||
  196. + pwrap_write(wrp, wrp->slave->dew_regs[PWRAP_DEW_EVENT_SRC_EN],
  197. + 0xffff)) {
  198. dev_err(wrp->dev, "enable dewrap fail\n");
  199. return -EFAULT;
  200. }
  201. @@ -734,7 +773,7 @@ static int pwrap_init(struct pmic_wrappe
  202. return ret;
  203. /* Enable dual IO mode */
  204. - pwrap_write(wrp, PWRAP_DEW_DIO_EN, 1);
  205. + pwrap_write(wrp, wrp->slave->dew_regs[PWRAP_DEW_DIO_EN], 1);
  206. /* Check IDLE & INIT_DONE in advance */
  207. ret = pwrap_wait_for_state(wrp, pwrap_is_fsm_idle_and_sync_idle);
  208. @@ -746,7 +785,7 @@ static int pwrap_init(struct pmic_wrappe
  209. pwrap_writel(wrp, 1, PWRAP_DIO_EN);
  210. /* Read Test */
  211. - pwrap_read(wrp, PWRAP_DEW_READ_TEST, &rdata);
  212. + pwrap_read(wrp, wrp->slave->dew_regs[PWRAP_DEW_READ_TEST], &rdata);
  213. if (rdata != PWRAP_DEW_READ_TEST_VAL) {
  214. dev_err(wrp->dev, "Read test failed after switch to DIO mode: 0x%04x != 0x%04x\n",
  215. PWRAP_DEW_READ_TEST_VAL, rdata);
  216. @@ -759,12 +798,13 @@ static int pwrap_init(struct pmic_wrappe
  217. return ret;
  218. /* Signature checking - using CRC */
  219. - if (pwrap_write(wrp, PWRAP_DEW_CRC_EN, 0x1))
  220. + if (pwrap_write(wrp, wrp->slave->dew_regs[PWRAP_DEW_CRC_EN], 0x1))
  221. return -EFAULT;
  222. pwrap_writel(wrp, 0x1, PWRAP_CRC_EN);
  223. pwrap_writel(wrp, 0x0, PWRAP_SIG_MODE);
  224. - pwrap_writel(wrp, PWRAP_DEW_CRC_VAL, PWRAP_SIG_ADR);
  225. + pwrap_writel(wrp, wrp->slave->dew_regs[PWRAP_DEW_CRC_VAL],
  226. + PWRAP_SIG_ADR);
  227. pwrap_writel(wrp, wrp->master->arb_en_all, PWRAP_HIPRIO_ARB_EN);
  228. if (wrp->master->type == PWRAP_MT8135)
  229. @@ -818,6 +858,21 @@ static const struct regmap_config pwrap_
  230. .max_register = 0xffff,
  231. };
  232. +static const struct pwrap_slv_type pmic_mt6397 = {
  233. + .dew_regs = mt6397_regs,
  234. + .type = PMIC_MT6397,
  235. +};
  236. +
  237. +static const struct of_device_id of_slave_match_tbl[] = {
  238. + {
  239. + .compatible = "mediatek,mt6397",
  240. + .data = &pmic_mt6397,
  241. + }, {
  242. + /* sentinel */
  243. + }
  244. +};
  245. +MODULE_DEVICE_TABLE(of, of_slave_match_tbl);
  246. +
  247. static struct pmic_wrapper_type pwrap_mt8135 = {
  248. .regs = mt8135_regs,
  249. .type = PWRAP_MT8135,
  250. @@ -862,8 +917,17 @@ static int pwrap_probe(struct platform_d
  251. struct device_node *np = pdev->dev.of_node;
  252. const struct of_device_id *of_id =
  253. of_match_device(of_pwrap_match_tbl, &pdev->dev);
  254. + const struct of_device_id *of_slave_id = NULL;
  255. struct resource *res;
  256. + if (pdev->dev.of_node->child)
  257. + of_slave_id = of_match_node(of_slave_match_tbl,
  258. + pdev->dev.of_node->child);
  259. + if (!of_slave_id) {
  260. + dev_dbg(&pdev->dev, "slave pmic should be defined in dts\n");
  261. + return -EINVAL;
  262. + }
  263. +
  264. wrp = devm_kzalloc(&pdev->dev, sizeof(*wrp), GFP_KERNEL);
  265. if (!wrp)
  266. return -ENOMEM;
  267. @@ -871,6 +935,7 @@ static int pwrap_probe(struct platform_d
  268. platform_set_drvdata(pdev, wrp);
  269. wrp->master = of_id->data;
  270. + wrp->slave = of_slave_id->data;
  271. wrp->dev = &pdev->dev;
  272. res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "pwrap");