0047-regulator-mt6323-Add-support-for-MT6323-regulator.patch 17 KB

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  1. From 94c08223cd696d872cda7d9aa4e817956d0a0b84 Mon Sep 17 00:00:00 2001
  2. From: Chen Zhong <chen.zhong@mediatek.com>
  3. Date: Fri, 8 Jan 2016 04:17:37 +0100
  4. Subject: [PATCH 047/102] regulator: mt6323: Add support for MT6323 regulator
  5. The MT6323 is a regulator found on boards based on MediaTek MT7623 and
  6. probably other SoCs. It is a so called pmic and connects as a slave to
  7. SoC using SPI, wrapped inside the pmic-wrapper.
  8. Signed-off-by: Chen Zhong <chen.zhong@mediatek.com>
  9. Signed-off-by: John Crispin <blogic@openwrt.org>
  10. ---
  11. drivers/regulator/Kconfig | 9 +
  12. drivers/regulator/Makefile | 1 +
  13. drivers/regulator/mt6323-regulator.c | 432 ++++++++++++++++++++++++++++
  14. include/linux/regulator/mt6323-regulator.h | 52 ++++
  15. 4 files changed, 494 insertions(+)
  16. create mode 100644 drivers/regulator/mt6323-regulator.c
  17. create mode 100644 include/linux/regulator/mt6323-regulator.h
  18. --- a/drivers/regulator/Kconfig
  19. +++ b/drivers/regulator/Kconfig
  20. @@ -453,6 +453,15 @@ config REGULATOR_MT6311
  21. This driver supports the control of different power rails of device
  22. through regulator interface.
  23. +config REGULATOR_MT6323
  24. + tristate "MediaTek MT6323 PMIC"
  25. + depends on MFD_MT6397
  26. + help
  27. + Say y here to select this option to enable the power regulator of
  28. + MediaTek MT6323 PMIC.
  29. + This driver supports the control of different power rails of device
  30. + through regulator interface.
  31. +
  32. config REGULATOR_MT6397
  33. tristate "MediaTek MT6397 PMIC"
  34. depends on MFD_MT6397
  35. --- a/drivers/regulator/Makefile
  36. +++ b/drivers/regulator/Makefile
  37. @@ -60,6 +60,7 @@ obj-$(CONFIG_REGULATOR_MC13783) += mc137
  38. obj-$(CONFIG_REGULATOR_MC13892) += mc13892-regulator.o
  39. obj-$(CONFIG_REGULATOR_MC13XXX_CORE) += mc13xxx-regulator-core.o
  40. obj-$(CONFIG_REGULATOR_MT6311) += mt6311-regulator.o
  41. +obj-$(CONFIG_REGULATOR_MT6323) += mt6323-regulator.o
  42. obj-$(CONFIG_REGULATOR_MT6397) += mt6397-regulator.o
  43. obj-$(CONFIG_REGULATOR_QCOM_RPM) += qcom_rpm-regulator.o
  44. obj-$(CONFIG_REGULATOR_QCOM_SMD_RPM) += qcom_smd-regulator.o
  45. --- /dev/null
  46. +++ b/drivers/regulator/mt6323-regulator.c
  47. @@ -0,0 +1,432 @@
  48. +/*
  49. + * Copyright (c) 2016 MediaTek Inc.
  50. + * Author: Chen Zhong <chen.zhong@mediatek.com>
  51. + *
  52. + * This program is free software; you can redistribute it and/or modify
  53. + * it under the terms of the GNU General Public License version 2 as
  54. + * published by the Free Software Foundation.
  55. + */
  56. +
  57. +#include <linux/module.h>
  58. +#include <linux/of.h>
  59. +#include <linux/platform_device.h>
  60. +#include <linux/regmap.h>
  61. +#include <linux/mfd/mt6397/core.h>
  62. +#include <linux/mfd/mt6323/registers.h>
  63. +#include <linux/regulator/driver.h>
  64. +#include <linux/regulator/machine.h>
  65. +#include <linux/regulator/mt6323-regulator.h>
  66. +#include <linux/regulator/of_regulator.h>
  67. +
  68. +#define MT6323_LDO_MODE_NORMAL 0
  69. +#define MT6323_LDO_MODE_LP 1
  70. +
  71. +/*
  72. + * MT6323 regulators' information
  73. + *
  74. + * @desc: standard fields of regulator description.
  75. + * @qi: Mask for query enable signal status of regulators
  76. + * @vselon_reg: Register sections for hardware control mode of bucks
  77. + * @vselctrl_reg: Register for controlling the buck control mode.
  78. + * @vselctrl_mask: Mask for query buck's voltage control mode.
  79. + */
  80. +struct mt6323_regulator_info {
  81. + struct regulator_desc desc;
  82. + u32 qi;
  83. + u32 vselon_reg;
  84. + u32 vselctrl_reg;
  85. + u32 vselctrl_mask;
  86. + u32 modeset_reg;
  87. + u32 modeset_mask;
  88. +};
  89. +
  90. +#define MT6323_BUCK(match, vreg, min, max, step, volt_ranges, enreg, \
  91. + vosel, vosel_mask, voselon, vosel_ctrl) \
  92. +[MT6323_ID_##vreg] = { \
  93. + .desc = { \
  94. + .name = #vreg, \
  95. + .of_match = of_match_ptr(match), \
  96. + .ops = &mt6323_volt_range_ops, \
  97. + .type = REGULATOR_VOLTAGE, \
  98. + .id = MT6323_ID_##vreg, \
  99. + .owner = THIS_MODULE, \
  100. + .n_voltages = (max - min)/step + 1, \
  101. + .linear_ranges = volt_ranges, \
  102. + .n_linear_ranges = ARRAY_SIZE(volt_ranges), \
  103. + .vsel_reg = vosel, \
  104. + .vsel_mask = vosel_mask, \
  105. + .enable_reg = enreg, \
  106. + .enable_mask = BIT(0), \
  107. + }, \
  108. + .qi = BIT(13), \
  109. + .vselon_reg = voselon, \
  110. + .vselctrl_reg = vosel_ctrl, \
  111. + .vselctrl_mask = BIT(1), \
  112. +}
  113. +
  114. +#define MT6323_LDO(match, vreg, ldo_volt_table, enreg, enbit, vosel, \
  115. + vosel_mask, _modeset_reg, _modeset_mask) \
  116. +[MT6323_ID_##vreg] = { \
  117. + .desc = { \
  118. + .name = #vreg, \
  119. + .of_match = of_match_ptr(match), \
  120. + .ops = &mt6323_volt_table_ops, \
  121. + .type = REGULATOR_VOLTAGE, \
  122. + .id = MT6323_ID_##vreg, \
  123. + .owner = THIS_MODULE, \
  124. + .n_voltages = ARRAY_SIZE(ldo_volt_table), \
  125. + .volt_table = ldo_volt_table, \
  126. + .vsel_reg = vosel, \
  127. + .vsel_mask = vosel_mask, \
  128. + .enable_reg = enreg, \
  129. + .enable_mask = BIT(enbit), \
  130. + }, \
  131. + .qi = BIT(15), \
  132. + .modeset_reg = _modeset_reg, \
  133. + .modeset_mask = _modeset_mask, \
  134. +}
  135. +
  136. +#define MT6323_REG_FIXED(match, vreg, enreg, enbit, volt, \
  137. + _modeset_reg, _modeset_mask) \
  138. +[MT6323_ID_##vreg] = { \
  139. + .desc = { \
  140. + .name = #vreg, \
  141. + .of_match = of_match_ptr(match), \
  142. + .ops = &mt6323_volt_fixed_ops, \
  143. + .type = REGULATOR_VOLTAGE, \
  144. + .id = MT6323_ID_##vreg, \
  145. + .owner = THIS_MODULE, \
  146. + .n_voltages = 1, \
  147. + .enable_reg = enreg, \
  148. + .enable_mask = BIT(enbit), \
  149. + .min_uV = volt, \
  150. + }, \
  151. + .qi = BIT(15), \
  152. + .modeset_reg = _modeset_reg, \
  153. + .modeset_mask = _modeset_mask, \
  154. +}
  155. +
  156. +static const struct regulator_linear_range buck_volt_range1[] = {
  157. + REGULATOR_LINEAR_RANGE(700000, 0, 0x7f, 6250),
  158. +};
  159. +
  160. +static const struct regulator_linear_range buck_volt_range2[] = {
  161. + REGULATOR_LINEAR_RANGE(1400000, 0, 0x7f, 12500),
  162. +};
  163. +
  164. +static const struct regulator_linear_range buck_volt_range3[] = {
  165. + REGULATOR_LINEAR_RANGE(500000, 0, 0x3f, 50000),
  166. +};
  167. +
  168. +static const u32 ldo_volt_table1[] = {
  169. + 3300000, 3400000, 3500000, 3600000,
  170. +};
  171. +
  172. +static const u32 ldo_volt_table2[] = {
  173. + 1500000, 1800000, 2500000, 2800000,
  174. +};
  175. +
  176. +static const u32 ldo_volt_table3[] = {
  177. + 1800000, 3300000,
  178. +};
  179. +
  180. +static const u32 ldo_volt_table4[] = {
  181. + 3000000, 3300000,
  182. +};
  183. +
  184. +static const u32 ldo_volt_table5[] = {
  185. + 1200000, 1300000, 1500000, 1800000, 2000000, 2800000, 3000000, 3300000,
  186. +};
  187. +
  188. +static const u32 ldo_volt_table6[] = {
  189. + 1200000, 1300000, 1500000, 1800000, 2500000, 2800000, 3000000, 2000000,
  190. +};
  191. +
  192. +static const u32 ldo_volt_table7[] = {
  193. + 1200000, 1300000, 1500000, 1800000,
  194. +};
  195. +
  196. +static const u32 ldo_volt_table8[] = {
  197. + 1800000, 3000000,
  198. +};
  199. +
  200. +static const u32 ldo_volt_table9[] = {
  201. + 1200000, 1350000, 1500000, 1800000,
  202. +};
  203. +
  204. +static const u32 ldo_volt_table10[] = {
  205. + 1200000, 1300000, 1500000, 1800000,
  206. +};
  207. +
  208. +static int mt6323_get_status(struct regulator_dev *rdev)
  209. +{
  210. + int ret;
  211. + u32 regval;
  212. + struct mt6323_regulator_info *info = rdev_get_drvdata(rdev);
  213. +
  214. + ret = regmap_read(rdev->regmap, info->desc.enable_reg, &regval);
  215. + if (ret != 0) {
  216. + dev_err(&rdev->dev, "Failed to get enable reg: %d\n", ret);
  217. + return ret;
  218. + }
  219. +
  220. + return (regval & info->qi) ? REGULATOR_STATUS_ON : REGULATOR_STATUS_OFF;
  221. +}
  222. +
  223. +static int mt6323_ldo_set_mode(struct regulator_dev *rdev, unsigned int mode)
  224. +{
  225. + int ret, val = 0;
  226. + struct mt6323_regulator_info *info = rdev_get_drvdata(rdev);
  227. +
  228. + if (!info->modeset_mask) {
  229. + dev_err(&rdev->dev, "regulator %s doesn't support set_mode\n",
  230. + info->desc.name);
  231. + return -EINVAL;
  232. + }
  233. +
  234. + switch (mode) {
  235. + case REGULATOR_MODE_STANDBY:
  236. + val = MT6323_LDO_MODE_LP;
  237. + break;
  238. + case REGULATOR_MODE_NORMAL:
  239. + val = MT6323_LDO_MODE_NORMAL;
  240. + break;
  241. + default:
  242. + return -EINVAL;
  243. + }
  244. +
  245. + val <<= ffs(info->modeset_mask) - 1;
  246. +
  247. + ret = regmap_update_bits(rdev->regmap, info->modeset_reg,
  248. + info->modeset_mask, val);
  249. +
  250. + return ret;
  251. +}
  252. +
  253. +static unsigned int mt6323_ldo_get_mode(struct regulator_dev *rdev)
  254. +{
  255. + unsigned int val;
  256. + unsigned int mode;
  257. + int ret;
  258. + struct mt6323_regulator_info *info = rdev_get_drvdata(rdev);
  259. +
  260. + if (!info->modeset_mask) {
  261. + dev_err(&rdev->dev, "regulator %s doesn't support get_mode\n",
  262. + info->desc.name);
  263. + return -EINVAL;
  264. + }
  265. +
  266. + ret = regmap_read(rdev->regmap, info->modeset_reg, &val);
  267. + if (ret < 0)
  268. + return ret;
  269. +
  270. + val &= info->modeset_mask;
  271. + val >>= ffs(info->modeset_mask) - 1;
  272. +
  273. + if (val & 0x1)
  274. + mode = REGULATOR_MODE_STANDBY;
  275. + else
  276. + mode = REGULATOR_MODE_NORMAL;
  277. +
  278. + return mode;
  279. +}
  280. +
  281. +static struct regulator_ops mt6323_volt_range_ops = {
  282. + .list_voltage = regulator_list_voltage_linear_range,
  283. + .map_voltage = regulator_map_voltage_linear_range,
  284. + .set_voltage_sel = regulator_set_voltage_sel_regmap,
  285. + .get_voltage_sel = regulator_get_voltage_sel_regmap,
  286. + .set_voltage_time_sel = regulator_set_voltage_time_sel,
  287. + .enable = regulator_enable_regmap,
  288. + .disable = regulator_disable_regmap,
  289. + .is_enabled = regulator_is_enabled_regmap,
  290. + .get_status = mt6323_get_status,
  291. +};
  292. +
  293. +static struct regulator_ops mt6323_volt_table_ops = {
  294. + .list_voltage = regulator_list_voltage_table,
  295. + .map_voltage = regulator_map_voltage_iterate,
  296. + .set_voltage_sel = regulator_set_voltage_sel_regmap,
  297. + .get_voltage_sel = regulator_get_voltage_sel_regmap,
  298. + .set_voltage_time_sel = regulator_set_voltage_time_sel,
  299. + .enable = regulator_enable_regmap,
  300. + .disable = regulator_disable_regmap,
  301. + .is_enabled = regulator_is_enabled_regmap,
  302. + .get_status = mt6323_get_status,
  303. + .set_mode = mt6323_ldo_set_mode,
  304. + .get_mode = mt6323_ldo_get_mode,
  305. +};
  306. +
  307. +static struct regulator_ops mt6323_volt_fixed_ops = {
  308. + .list_voltage = regulator_list_voltage_linear,
  309. + .enable = regulator_enable_regmap,
  310. + .disable = regulator_disable_regmap,
  311. + .is_enabled = regulator_is_enabled_regmap,
  312. + .get_status = mt6323_get_status,
  313. + .set_mode = mt6323_ldo_set_mode,
  314. + .get_mode = mt6323_ldo_get_mode,
  315. +};
  316. +
  317. +/* The array is indexed by id(MT6323_ID_XXX) */
  318. +static struct mt6323_regulator_info mt6323_regulators[] = {
  319. + MT6323_BUCK("buck_vproc", VPROC, 700000, 1493750, 6250,
  320. + buck_volt_range1, MT6323_VPROC_CON7, MT6323_VPROC_CON9, 0x7f,
  321. + MT6323_VPROC_CON10, MT6323_VPROC_CON5),
  322. + MT6323_BUCK("buck_vsys", VSYS, 1400000, 2987500, 12500,
  323. + buck_volt_range2, MT6323_VSYS_CON7, MT6323_VSYS_CON9, 0x7f,
  324. + MT6323_VSYS_CON10, MT6323_VSYS_CON5),
  325. + MT6323_BUCK("buck_vpa", VPA, 500000, 3650000, 50000,
  326. + buck_volt_range3, MT6323_VPA_CON7, MT6323_VPA_CON9,
  327. + 0x3f, MT6323_VPA_CON10, MT6323_VPA_CON5),
  328. + MT6323_REG_FIXED("ldo_vtcxo", VTCXO, MT6323_ANALDO_CON1, 10, 2800000,
  329. + MT6323_ANALDO_CON1, 0x2),
  330. + MT6323_REG_FIXED("ldo_vcn28", VCN28, MT6323_ANALDO_CON19, 12, 2800000,
  331. + MT6323_ANALDO_CON20, 0x2),
  332. + MT6323_LDO("ldo_vcn33_bt", VCN33_BT, ldo_volt_table1,
  333. + MT6323_ANALDO_CON16, 7, MT6323_ANALDO_CON16, 0xC,
  334. + MT6323_ANALDO_CON21, 0x2),
  335. + MT6323_LDO("ldo_vcn33_wifi", VCN33_WIFI, ldo_volt_table1,
  336. + MT6323_ANALDO_CON17, 12, MT6323_ANALDO_CON16, 0xC,
  337. + MT6323_ANALDO_CON21, 0x2),
  338. + MT6323_REG_FIXED("ldo_va", VA, MT6323_ANALDO_CON2, 14, 2800000,
  339. + MT6323_ANALDO_CON2, 0x2),
  340. + MT6323_LDO("ldo_vcama", VCAMA, ldo_volt_table2,
  341. + MT6323_ANALDO_CON4, 15, MT6323_ANALDO_CON10, 0x60, -1, 0),
  342. + MT6323_REG_FIXED("ldo_vio28", VIO28, MT6323_DIGLDO_CON0, 14, 2800000,
  343. + MT6323_DIGLDO_CON0, 0x2),
  344. + MT6323_REG_FIXED("ldo_vusb", VUSB, MT6323_DIGLDO_CON2, 14, 3300000,
  345. + MT6323_DIGLDO_CON2, 0x2),
  346. + MT6323_LDO("ldo_vmc", VMC, ldo_volt_table3,
  347. + MT6323_DIGLDO_CON3, 12, MT6323_DIGLDO_CON24, 0x10,
  348. + MT6323_DIGLDO_CON3, 0x2),
  349. + MT6323_LDO("ldo_vmch", VMCH, ldo_volt_table4,
  350. + MT6323_DIGLDO_CON5, 14, MT6323_DIGLDO_CON26, 0x80,
  351. + MT6323_DIGLDO_CON5, 0x2),
  352. + MT6323_LDO("ldo_vemc3v3", VEMC3V3, ldo_volt_table4,
  353. + MT6323_DIGLDO_CON6, 14, MT6323_DIGLDO_CON27, 0x80,
  354. + MT6323_DIGLDO_CON6, 0x2),
  355. + MT6323_LDO("ldo_vgp1", VGP1, ldo_volt_table5,
  356. + MT6323_DIGLDO_CON7, 15, MT6323_DIGLDO_CON28, 0xE0,
  357. + MT6323_DIGLDO_CON7, 0x2),
  358. + MT6323_LDO("ldo_vgp2", VGP2, ldo_volt_table6,
  359. + MT6323_DIGLDO_CON8, 15, MT6323_DIGLDO_CON29, 0xE0,
  360. + MT6323_DIGLDO_CON8, 0x2),
  361. + MT6323_LDO("ldo_vgp3", VGP3, ldo_volt_table7,
  362. + MT6323_DIGLDO_CON9, 15, MT6323_DIGLDO_CON30, 0x60,
  363. + MT6323_DIGLDO_CON9, 0x2),
  364. + MT6323_REG_FIXED("ldo_vcn18", VCN18, MT6323_DIGLDO_CON11, 14, 1800000,
  365. + MT6323_DIGLDO_CON11, 0x2),
  366. + MT6323_LDO("ldo_vsim1", VSIM1, ldo_volt_table8,
  367. + MT6323_DIGLDO_CON13, 15, MT6323_DIGLDO_CON34, 0x20,
  368. + MT6323_DIGLDO_CON13, 0x2),
  369. + MT6323_LDO("ldo_vsim2", VSIM2, ldo_volt_table8,
  370. + MT6323_DIGLDO_CON14, 15, MT6323_DIGLDO_CON35, 0x20,
  371. + MT6323_DIGLDO_CON14, 0x2),
  372. + MT6323_REG_FIXED("ldo_vrtc", VRTC, MT6323_DIGLDO_CON15, 8, 2800000,
  373. + -1, 0),
  374. + MT6323_LDO("ldo_vcamaf", VCAMAF, ldo_volt_table5,
  375. + MT6323_DIGLDO_CON31, 15, MT6323_DIGLDO_CON32, 0xE0,
  376. + MT6323_DIGLDO_CON31, 0x2),
  377. + MT6323_LDO("ldo_vibr", VIBR, ldo_volt_table5,
  378. + MT6323_DIGLDO_CON39, 15, MT6323_DIGLDO_CON40, 0xE0,
  379. + MT6323_DIGLDO_CON39, 0x2),
  380. + MT6323_REG_FIXED("ldo_vrf18", VRF18, MT6323_DIGLDO_CON45, 15, 1825000,
  381. + MT6323_DIGLDO_CON45, 0x2),
  382. + MT6323_LDO("ldo_vm", VM, ldo_volt_table9,
  383. + MT6323_DIGLDO_CON47, 14, MT6323_DIGLDO_CON48, 0x30,
  384. + MT6323_DIGLDO_CON47, 0x2),
  385. + MT6323_REG_FIXED("ldo_vio18", VIO18, MT6323_DIGLDO_CON49, 14, 1800000,
  386. + MT6323_DIGLDO_CON49, 0x2),
  387. + MT6323_LDO("ldo_vcamd", VCAMD, ldo_volt_table10,
  388. + MT6323_DIGLDO_CON51, 14, MT6323_DIGLDO_CON52, 0x60,
  389. + MT6323_DIGLDO_CON51, 0x2),
  390. + MT6323_REG_FIXED("ldo_vcamio", VCAMIO, MT6323_DIGLDO_CON53, 14, 1800000,
  391. + MT6323_DIGLDO_CON53, 0x2),
  392. +};
  393. +
  394. +static int mt6323_set_buck_vosel_reg(struct platform_device *pdev)
  395. +{
  396. + struct mt6397_chip *mt6323 = dev_get_drvdata(pdev->dev.parent);
  397. + int i;
  398. + u32 regval;
  399. +
  400. + for (i = 0; i < MT6323_MAX_REGULATOR; i++) {
  401. + if (mt6323_regulators[i].vselctrl_reg) {
  402. + if (regmap_read(mt6323->regmap,
  403. + mt6323_regulators[i].vselctrl_reg,
  404. + &regval) < 0) {
  405. + dev_err(&pdev->dev,
  406. + "Failed to read buck ctrl\n");
  407. + return -EIO;
  408. + }
  409. +
  410. + if (regval & mt6323_regulators[i].vselctrl_mask) {
  411. + mt6323_regulators[i].desc.vsel_reg =
  412. + mt6323_regulators[i].vselon_reg;
  413. + }
  414. + }
  415. + }
  416. +
  417. + return 0;
  418. +}
  419. +
  420. +static int mt6323_regulator_probe(struct platform_device *pdev)
  421. +{
  422. + struct mt6397_chip *mt6323 = dev_get_drvdata(pdev->dev.parent);
  423. + struct regulator_config config = {};
  424. + struct regulator_dev *rdev;
  425. + int i;
  426. + u32 reg_value;
  427. +
  428. + /* Query buck controller to select activated voltage register part */
  429. + if (mt6323_set_buck_vosel_reg(pdev))
  430. + return -EIO;
  431. +
  432. + /* Read PMIC chip revision to update constraints and voltage table */
  433. + if (regmap_read(mt6323->regmap, MT6323_CID, &reg_value) < 0) {
  434. + dev_err(&pdev->dev, "Failed to read Chip ID\n");
  435. + return -EIO;
  436. + }
  437. + dev_info(&pdev->dev, "Chip ID = 0x%x\n", reg_value);
  438. +
  439. + for (i = 0; i < MT6323_MAX_REGULATOR; i++) {
  440. + config.dev = &pdev->dev;
  441. + config.driver_data = &mt6323_regulators[i];
  442. + config.regmap = mt6323->regmap;
  443. + rdev = devm_regulator_register(&pdev->dev,
  444. + &mt6323_regulators[i].desc, &config);
  445. + if (IS_ERR(rdev)) {
  446. + dev_err(&pdev->dev, "failed to register %s\n",
  447. + mt6323_regulators[i].desc.name);
  448. + return PTR_ERR(rdev);
  449. + }
  450. + }
  451. + return 0;
  452. +}
  453. +
  454. +static const struct platform_device_id mt6323_platform_ids[] = {
  455. + {"mt6323-regulator", 0},
  456. + { /* sentinel */ },
  457. +};
  458. +MODULE_DEVICE_TABLE(platform, mt6323_platform_ids);
  459. +
  460. +static const struct of_device_id mt6323_of_match[] = {
  461. + { .compatible = "mediatek,mt6323-regulator", },
  462. + { /* sentinel */ },
  463. +};
  464. +MODULE_DEVICE_TABLE(of, mt6323_of_match);
  465. +
  466. +static struct platform_driver mt6323_regulator_driver = {
  467. + .driver = {
  468. + .name = "mt6323-regulator",
  469. + .of_match_table = of_match_ptr(mt6323_of_match),
  470. + },
  471. + .probe = mt6323_regulator_probe,
  472. + .id_table = mt6323_platform_ids,
  473. +};
  474. +
  475. +module_platform_driver(mt6323_regulator_driver);
  476. +
  477. +MODULE_AUTHOR("Chen Zhong <chen.zhong@mediatek.com>");
  478. +MODULE_DESCRIPTION("Regulator Driver for MediaTek MT6397 PMIC");
  479. +MODULE_LICENSE("GPL v2");
  480. --- /dev/null
  481. +++ b/include/linux/regulator/mt6323-regulator.h
  482. @@ -0,0 +1,52 @@
  483. +/*
  484. + * Copyright (c) 2016 MediaTek Inc.
  485. + * Author: Chen Zhong <chen.zhong@mediatek.com>
  486. + *
  487. + * This program is free software; you can redistribute it and/or modify
  488. + * it under the terms of the GNU General Public License version 2 as
  489. + * published by the Free Software Foundation.
  490. + *
  491. + * This program is distributed in the hope that it will be useful,
  492. + * but WITHOUT ANY WARRANTY; without even the implied warranty of
  493. + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  494. + * GNU General Public License for more details.
  495. + */
  496. +
  497. +#ifndef __LINUX_REGULATOR_MT6323_H
  498. +#define __LINUX_REGULATOR_MT6323_H
  499. +
  500. +enum {
  501. + MT6323_ID_VPROC = 0,
  502. + MT6323_ID_VSYS,
  503. + MT6323_ID_VPA,
  504. + MT6323_ID_VTCXO,
  505. + MT6323_ID_VCN28,
  506. + MT6323_ID_VCN33_BT,
  507. + MT6323_ID_VCN33_WIFI,
  508. + MT6323_ID_VA,
  509. + MT6323_ID_VCAMA,
  510. + MT6323_ID_VIO28 = 9,
  511. + MT6323_ID_VUSB,
  512. + MT6323_ID_VMC,
  513. + MT6323_ID_VMCH,
  514. + MT6323_ID_VEMC3V3,
  515. + MT6323_ID_VGP1,
  516. + MT6323_ID_VGP2,
  517. + MT6323_ID_VGP3,
  518. + MT6323_ID_VCN18,
  519. + MT6323_ID_VSIM1,
  520. + MT6323_ID_VSIM2,
  521. + MT6323_ID_VRTC,
  522. + MT6323_ID_VCAMAF,
  523. + MT6323_ID_VIBR,
  524. + MT6323_ID_VRF18,
  525. + MT6323_ID_VM,
  526. + MT6323_ID_VIO18,
  527. + MT6323_ID_VCAMD,
  528. + MT6323_ID_VCAMIO,
  529. + MT6323_ID_RG_MAX,
  530. +};
  531. +
  532. +#define MT6323_MAX_REGULATOR MT6323_ID_RG_MAX
  533. +
  534. +#endif /* __LINUX_REGULATOR_MT6323_H */